ETC VRE3041B

VRE3041
Low Cost
Precision Reference
THALER CORPORATION • 2015 N. FORBES BOULEVARD • TUCSON, AZ. 85745 • (520) 882-4000
FEATURES
• 4.096 V Output ± 0.409 mV (.01%)
PIN CONFIGURATION
• Temperature Drift: 0.6 ppm/°C
• Low Noise: 3µV p-p (0.1Hz-10Hz)
N/C
• Low Thermal Hysteresis: 1 ppm Typ.
+VIN
1
2
• ±15mA Output Source and Sink Current
N/C
3
• Excellent Line Regulation: 5 ppm/V Typ.
GND
4
• Optional Noise Reduction and Voltage Trim
VRE3041
TOP
VIEW
8
NOISE
REDUCTION
7
N/C
6
VOUT
5
TRIM
FIGURE 1
• Industry Standard Pinout
DESCRIPTION
The VRE3041 is a low cost, high precision 4.096V
reference that operates from +10V. The device
features a buried zener for low noise and excellent
long term stability. Packaged in an 8 pin DIP and
SMT, the device is ideal for high resolution data
conversion systems.
The device provides ultrastable +4.096V output
with ±0.4096 mV (.01%) initial accuracy and a
temperature coefficient of 0.6 ppm/°C.
This
improvement in accuracy is made possible by a
unique, patented multipoint laser compensation
technique developed by Thaler Corporation.
Significant improvements have been made in
other performance parameters as well, including
initial accuracy, warm-up drift, line regulation, and
long-term stability, making the VRE3041 series
the most accurate reference available.
For enhanced performance, the VRE3041 has an
external trim option for users who want less than
0.01% initial error.
For ultra low noise
applications, an external capacitor can be
attached between the noise reduction pin and the
ground pin.
The VRE3041 is recommended for use as a
reference for 14, 16, or 18 bit data converters
which require an external precision reference.
The device is also ideal for calibrating scale factor
on high resolution data converters. The VRE3041
offers superior performance over monolithic
references.
SELECTION GUIDE
Model
VRE3041A
VRE3041B
VRE3041C
VRE3041J
VRE3041K
VRE3041L
Initial
Error
mV
0.410
0.614
0.820
0.410
0.614
0.820
Temp.
Coeff.
ppm/°C
Temp.
Range °C
0.6
1.0
2.0
0.6
1.0
2.0
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
For package option add D for DIP or S for Surface Mount
to end of model number.
VRE3041DS REV. D JULY 2000
ABSOLUTE MAXIMUM RATINGS
Power Supply ………………………-0.3V to +40V
OUT, TRIM …………………………-0.3V to +12V
NR……………………………………-0.3V to +6V
Operating Temp. (A,B,C)……………0 °C to 70°C
Operating Temp. (J,K,L)……………-40 °C to 85°C
Out Short Circuit to GND Duration (VIN< 12V)…...Continuous
Out Short Circuit to GND Duration (VIN< 40V)…….……5 sec
Out Short Circuit to IN Duration (VIN< 12V)……...Continuous
Continuous Power Dissipation (TA = +70°C)………...300mW
Storage Temperature………………………..…-65°C to 150°C
Lead Temperature (soldering,10 sec)…………………..250°C
ELECTRICAL SPECIFICATIONS
Vps =+10V, T = 25°C, Iout=0mA unless otherwise noted.
PARAMETER
Input Voltage
Output Voltage
(Note 1)
SYMBOL
CONDITIONS
VIN
VOUT
MIN
TYP
8
MAX
UNITS
36
V
VRE3041A/J
4.0956
4.096
4.0964
VRE3041B/K
4.0954
4.096
4.0966
VRE3041C/L
4.0952
4.096
4.0968
VRE3041A/J
0.3
0.6
VRE3041B/K
0.5
1.0
VRE3041C/K
1.0
2.0
V
Output Voltage
Temperature Coefficient
(Note 2)
TCVOUT
Trim Adjustment Range
∆VOUT
Figure 3
±4
mV
Turn-On Settling Time
Ton
To 0.01% of final value
2
µs
0.1Hz<f<10Hz
2.4
Output Noise Voltage
en
µVp-p
10Hz<f<1kHz
2
Note 4
1
ppm
∆VOUT/t
6
ppm/
1khrs
Supply Current
IIN
3.5
Load Regulation
∆VOUT/
∆IOUT
Temperature Hysterisis
Long Term Stability
Line Regulation
∆VOUT/
∆VIN
Sourcing:
0mA ≤ IOUT ≤ 15mA
Sinking:
-15mA ≤ IOUT ≤0mA
4
4.0
8
12
8
12
8V ≤ VIN ≤ 10V
25
35
10V ≤ VIN ≤ 18V
5
10
ppm/°C
µVRMS
mA
ppm/
mA
ppm/V
Notes:
1) The specified values are without external trim.
2) The temperature coefficient is determined by the
box method. See discussion on temperature
performance.
3) Line and load regulation are measured with pulses and
do not include voltage changes due to temperature.
4) Hysterisis measured over the operating temperature
range.
VRE3041DS REV. D JULY 2000
TYPICAL PERFORMANCE CURVES
VOUT vs. TEMPERATURE
1.00
0.75
0.75
0.75
0.50
0.50
0.50
0
-0.25
Lower
Lower Limit
Limit
-0.25
Lower
0
20
30
40
50
60
-1.00
70
20
VOUT vs. TEMPERATURE
30
40
50
60
70
-1.00
1.0
1.0
1.0
Upper
0.5
Limit
∆Vout (mV)
∆Vout (mV)
Limit
0
-0.5
Lower
Limit
-1.0
-1.5
-2.0
-50 -25
-1.5
-2.0
-50 -25
75 100
25
50
75 100
Temperature
VRE3041K
Temperature
VRE3041J
SUPPLY CURRENT
VS. SUPPLY VOLTAGE
Limit
Lower
Limit
0
25
50
75 100
(oC)
Temperature
VRE3041L
QUIESCENT CURRENT VS. TEMP
OUTPUT IMPEDIANCE
VS. FREQUENCY
Quiescent Current (mA)
5.0
4.0
3.0
0
5 10 15 20 25 30 35 40
Supply Voltage (V)
Output Impediance ( Ω)
8.0
6.0
0
0
(oC)
(oC)
Upper
70
0
-1.5
-2.0
-50 -25
50
60
-0.5
-1.0
25
50
0.5
-1.0
0
40
VOUT vs. TEMPERATURE
1.5
Lower
30
VOUT vs. TEMPERATURE
1.5
-0.5
20
Temperature (oC)
VRE3041C
1.5
0
0
Temperature (oC)
VRE3041B
2.0
Limit
Limit
-0.50
2.0
Upper
Lower
0
2.0
0.5
Limit
-0.25
-0.75
0
Upper
0.25
Limit
-0.75
Temperature (oC)
VRE3041A
∆Vout (mV)
Limit
0
-0.50
-0.75
-1.00
Upper
0.25
∆Vout (mV)
Upper Limit
Limit
Upper
0.25
-0.50
Supply Current (mA)
VOUT vs. TEMPERATURE
1.00
∆Vout (mV)
∆Vout (mV)
VOUT vs. TEMPERATURE
1.00
6.0
4.0
2.0
0
-50
0
50
Temperature
(oC)
100
Frequency (Hz)
VRE3041DS REV. D JULY 2000
TYPICAL PERFORMANCE CURVES
JUNCTION TEMP. RISE VS.
OUTPUT CURRENT
30
20
c
Vc
=
V
10
10
0
0
4
2
6
100
Ripple Rejection (dB)
Junction Temperature
Rise Above Ambient (oC)
40
8
RIPPLE REJECTION
Vs. FREQUENCY(CNR=0µF)
+10V
A
0V
90
80
B
70
60
10
10
TURN-ON AND TURN-OFF
TRANSIENT RESPONSE
100
1k
10k
1 µs/div
Frequency (Hz)
Output Current (mA)
A: Vin, 10V/div
B: Vout, 1V/div
CHANGE IN OUTPUT VOLTAGE
VS. OUTPUT CURRENT
100
400
60
40
100
1k
Frequency (Hz)
10k
60
300
50
200
40
Vout (ppm)
Vout (µV)
80
20
10
CHANGE IN OUTPUT VOLTAGE
VS. INPUT VOLTAGE
100
0
-100
30
20
10
-200
0
-300
-10
-400
0 2
4
6
8 10 12 14 16
Iout(mA)
-20
0
9 10 11 12 13 14 15 16
Vin(V)
0.1Hz to 10Hz Noise
∆Vout, 1µV/Div
Output Noise Density (nV/√Hz)
OUTPUT NOISE-VOLTAGE
DENSITY vs. FREQUENCY
1 Sec/Div
VRE3041DS REV. D JULY 2000
THEORY OF OPERATION
BASIC CIRCUIT CONNECTION
The following discussion refers to the schematic in
figure 2 below. A FET current source is used to bias a
6.3V zener diode. The zener voltage is divided by the
resistor network R1 and R2. This voltage is then applied
to the noninverting input of the operational amplifier which
amplifies the voltage to produce a 4.096V output. The
gain is determined by the resistor networks R3 and R4:
G=1 + R4/R3. The 6.3V zener diode is used because it is
the most stable diode over time and temperature.
Figure 3 shows the proper connection of the VRE3041
voltage reference with the optional trim resistor for initial
error and optional capacitor for noise reduction.
8
+ VIN
2
2
Optional Noise
Reduction
Capacitor
+
6
8
CN 1µF
+ VOUT
VRE3041
5
10kΩ
4
Optional Fine
Trim Adjustment
6
-
R1
Figure 3 External Connections
R4
R2
5
R3
4
To achieve the specified performance, pay careful
attention to the layout. A low resistance star configuration
will reduce voltage errors, noise pickup, and noise
coupled from the power supply. Commons should be
connected to a single point to minimize interconnect
resistances.
Figure 2 Functional Block Diagram
The current source provides a closely regulated zener
current, which determines the slope of the references’
voltage vs. temperature function. By trimming the zener
current a lower drift over temperature can be achieved.
But since the voltage vs. temperature function is nonlinear
this compensation technique is not well suited for wide
temperature ranges.
Thaler Corporation has developed a nonlinear
compensation network of thermistors and resistors that is
used in the VRE series voltage references. This
proprietary network eliminates most of the nonlinearity in
the voltage vs. temperature function. By adjusting the
slope, Thaler Corporation produces a very stable voltage
over wide temperature ranges.
This network is less than 2% of the overall network
resistance so it has a negligible effect on long term
stability. Figure 3 shows the proper connection of the
VRE3041 series voltage references with the optional trim
resistor for initial error and the optional capacitor for noise
reduction.
PIN DESCRIPTION
1,3,7
N.C.
Internally connected. Do not use
2
Vin
Positive power supply input
4
GND
Ground
5
TRIM
External trim input. Leave open if
not used.
6
OUT
Voltage reference output
8
NR
Noise Reduction
VRE3041DS REV. D JULY 2000
TEMPERATURE PERFORMANCE
THERMAL HYSTERISIS
The VRE3041 is designed for applications where the
initial error at room temperature and drift over
temperature are important to the user.
For many
instrument manufacturers, a voltage reference with a
temperature coefficient less than 1ppm/°C makes it
possible to not have to perform a system temperature
calibration, a slow and costly process.
A change in output voltage as a result of a temperature
change. When references experience a temperature
change and return to the initial temperature, they do not
always have the same initial voltage. Thermal hysterisis
is difficult to correct and is a major error source in
systems that experience temperature changes greater
than 25°C. Reference vendors are starting to include this
important specification in their datasheets.
Of the three TC specification methods (slope, butterfly,
and box), the box method is used commonly used. A box
is formed by the min/max limits for the nominal output
voltage over the operating temperature range. The
equation follows:


Vmax − Vmin
 • 10 6
T .C. = 
V
•
(
T
−
T
)
max
min 
 nominal
This method corresponds more accurately to the
method of test and provides a closer estimate of actual
error than the other methods.
The box method
guarantees limits for the temperature error but does not
specify the exact shape and slope of the device under
test.
A designer who needs a 14-bit accurate data
acquisition system over the industrial temperature range
(-40°C to +85°C), will need a voltage reference with a
temperature coefficient (TC) of 1.0ppm/°C if the reference
is allowed to contribute an error equivalent to 1LSB. For
1/2LSB equivalent error from the reference you would
need a voltage reference with a temperature coefficient of
0.5ppm/°C. Figure 4 shows the required reference TC vs.
delta T change from 25°C for resolution ranging from 8
bits to 20 bits.
10000
1000
100
8 BIT
ReferenceTC
(ppm/°C)
10
10 BIT
12 BIT
1
14 BIT
16 BIT
0.1
18 BIT
0.01
20 BIT
1
10
100
Reference TC vs. ∆T change from 25°C for 1 LSB change
VRE3041DS REV. D JULY 2000
MECHANICAL SPECIFICATIONS
INCHES
MILLIMETER
MAX
INCHES
MILLIMETER
DIM
MIN
MAX
MIN
DIM
MIN
MAX
MIN
A
.110
.120
2.794 3.048
D1
.372
.380
9.45
MAX
B
.095
.105
2.413 2.667
E
.425
.435
10.80 11.05
B1
.021
.027
0.533 0.686
E1
.397
.403
10.08 10.24
C
.055
.065
1.397 1.651
E2
.264
.270
6.71
6.86
C1
.012
.020
0.305 0.508
P
.085
.095
2.16
2.41
C2
.020
.040
0.508 1.016
S
.045
.055
1.14
1.40
D
.395
.405
10.03 10.29
9.65
D
D1
E2 E1
E
1
A
P
C1
B
S
B1
C
C2
VRE3041DS REV. D JULY 2000
MECHANICAL SPECIFICATIONS
INCHES
MILLIMETER
MILLIMETER
DIM
MIN
MAX
MIN
DIM
MIN
MAX
MIN
A
.170
.180
4.318 4.572
E
.425
.435
10.80 11.05
B
.095
.105
2.413 2.667
E1
.397
.403
10.08 10.24
B1
.016
.020
0.406 0.508
E2
.264
.270
6.71
6.86
C
.008
.011
0.203 0.279
G
.290
.310
7.36
7.87
C1
.055
.065
1.397 1.651
L
.175
.225
4.46
5.72
D
.395
.405
10.03 10.29
P
.085
.095
2.16
2.41
D1
.372
.380
S
.045
.055
1.14
1.40
9.45
MAX
INCHES
9.65
MAX
D
D1
E2 E1
E
1
P
A
C1
L
C
S
B
G
B1
VRE3041DS REV. D JULY 2000