VRE4100 Series Low Cost, SOIC-8 Precision References RHOPOINT COMPONENTS LTD • Tel: +44 (0) 1883 717988 • Fax: +44 (0) 1883 712938 • Email: [email protected] Website: www.rhopointcomponents.com FEATURES • 1.024, 1.250, 2.048, 2.500, 4.096V Output PIN CONFIGURATION • Initial Error: ± 0.05% max. • Temperature Drift: 1.0 ppm/°C max. NC • Low Noise: 2.2µVp-p (0.1Hz-10Hz, 1.024V) +VIN • Low Thermal Hysterisis: 20ppm 1 2 Enable 3 GND 4 • ±8mA Output Source • Power Down Mode VRE4100 TOP VIEW 8 NC 7 NC 6 VREF 5 NC FIGURE 1 • Industry Standard SOIC-8 pin out • Commercial and Industrial Temp Ranges • Second source for ADR29X, REF19X ,LT1460, LT1461, LT1798, MAX616X, REF102 SELECTION GUIDE DESCRIPTION The VRE4100 is a low cost, high precision bandgap reference that operates from +5V. The device features low noise, digital error correction, and an SOIC-8 package. The ultrastable output is 0.05% accurate with a temperature coefficient as low as 1.0 ppm/°C. The improvement in overall accuracy is made possible by using EEPROM registers and CMOS DAC’s for temperature and initial error correction. The DAC trimming is done after assembly which eliminates assembly related shifts. The VRE4100 is recommended for use as a reference for 14, 16, or 18 bit data converters which require a precision reference. The VRE4100 offers superior performance over standard on-chip references commonly found with data converters. Model Output Voltage V Temp. Coeff. ppm/°C VRE4110B VRE4110C VRE4110K 1.024 1.024 1.024 1.0 2.0 3.0 0°C to +70°C 0°C to +70°C -40°C to +85°C VRE4112B VRE4112C VRE4112K 1.250 1.250 1.250 1.0 2.0 3.0 0°C to +70°C 0°C to +70°C -40°C to +85°C VRE4120B VRE4120C VRE4120K 2.048 2.048 2.048 1.0 2.0 3.0 0°C to +70°C 0°C to +70°C -40°C to +85°C VRE4125B VRE4125C VRE4125K 2.500 2.500 2.500 1.0 2.0 3.0 0°C to +70°C 0°C to +70°C -40°C to +85°C VRE4141B VRE4141C VRE4141K 4.096 4.096 4.096 1.0 2.0 3.0 0°C to +70°C 0°C to +70°C -40°C to +85°C Temp. Range °C VRE4100DS REV. A MAY 01 www.thaler.com ABSOLUTE MAXIMUM RATINGS Power supply to any input pin ….…-0.3V to +5.6V Operating Temp. (B,C) …………..……0°C to 70°C Operating Temp. (K)………………...-40°C to 85°C Storage Temperature Range……..-65°C to 150°C Output Short Circuit Duration …….…………....Indefinite ESD Susceptibility Human Body Model…….…..…..2kV ESD Susceptibility Machine Model ..………………200V Lead Temperature (soldering,10 sec)………...….260°C ELECTRICAL SPECIFICATIONS Vps =+3V for VRE4110 and VRE4112, Vps =+5V for VRE4125, VRE4125 and VRE4141. T = 25°C, Iload=1mA, Cout=1µF unless otherwise noted. PARAMETER SYMBOL Input Voltage VIN Output Voltage Error VOUT (Note 1) Output Voltage Temperature Coefficient TCVOUT (Note 2) CONDITIONS MIN TYP 1.8 MAX UNITS 5.5 V VRE4100B ± 0.025% ± 0.050% VRE4100C/K ± 0.040% ± 0.080% VRE4100B 0.5 1.0 VRE4100C 1.0 2.0 VRE4100K 1.5 3.0 160 235 % ppm/°C Dropout Voltage (Note 3) VIN -VOUT IL = 8 mA mV Turn-On Settling Time TON To 0.01% of final value 2 µs Output Noise Voltage En 0.1Hz<f<10Hz 2.2 µVp-p Note 5 20 ppm VOUT/T 1000 Hours 50 ppm IIN Vload = 0mA 230 320 1 20 ppm/mA 20 200 ppm/V (Note 4) Temperature Hysterisis Long Term Stability Supply Current Load Regulation (Note 6) VOUT/ IOUT 1mA ILoad 8mA Line Regulation (Note 6) VOUT/ VIN Vref + 200mV Logic High Input Voltage VH Logic High Input Current IH Logic Low Input Voltage VL Logic Low Input Current IL VIN 5.5V 0.8 µA V 2 nA 0.4 1 V nA Notes: 1. High temperature and mechanical stress can effect the initial accuracy of the VRE4100 series references.See discussion on output accuracy. 2. The temperature coefficient is determined by the box method. See discussion on temperature performance. All units are 100% tested over temperature. 3. The minimum input to output differential voltage at which the output voltage drops by 0.5% from nominal. 4. Based on 1.024V output. Noise is linearly proportional to VREF. 5. Defined as change in 25°C output voltage after cycling device over operating temperature range. 6. Line and load regulation are measured with pulses and do not include output voltage changes due to self heating. VRE4100DS REV. A MAY 01 www.thaler.com TYPICAL PERFORMANCE CURVES Load Regulation vs Temperature Output Voltage vs Load Current Load Transient Response Line Regulation vs Temperature Power Up/Down Ground Current Line Transient Response Enable Response Output Impedance Power Supply Rejection Ratio VRE4100DS REV. A MAY 01 www.thaler.com TYPICAL PERFORMANCE CURVES Total Current (Is(ON)) vs Supply Voltage Total Current (Is(OFF)) vs Supply Voltage Ground Current vs Load Current Output Voltage Change vs Sink Current I(SINK) Dropout Voltage vs Load Current IQ vs Temperature Dropout Voltage vs Load Current (VOUT) = 2.0V Spectral Noise Density (0.1Hz to 10Hz) Spectral Noise Density (10Hz to 100kHz) VRE4100DS REV. A MAY 01 www.thaler.com PIN DESCRIPTION BASIC CIRCUIT CONNECTION Figure 3 shows the proper connection of the VRE4100 series voltage reference. 4 GND These must be connected to ground To achieve the specified performance, pay careful attention to the layout. Commons should be connected to a single point to minimize interconnect resistances. This will reduce voltage errors, noise pickup, and noise coupled from the power supply. 2 Vin Positive power supply input 3 Enable Pulled to Vin for normal operation. NC This pin must be left open Vout Reference output 1,5,7,8 6 TEMPERATURE PERFORMANCE The VRE4100 is designed for applications where the initial error at room temperature and drift over temperature are important to the user. For many instrument manufacturers, a voltage reference with a temperature coefficient of 1ppm/°C makes it possible to eliminate a system temperature calibration, a slow and costly process. + VOUT + VIN Enable Figure 2 1,5,7,8 NC External Connections For example a designer who needs a 14-bit accurate data acquisition system over the industrial temperature range (-40°C to +85°C), will need a voltage reference with a temperature coefficient (TC) of 1.0ppm/°C if the reference is allowed to contribute an error equivalent to 1LSB. Figure 3 shows the required reference TC vs. T change from 25°C for resolution ranging from 8 bits to 20 bits. Vmax − Vmin (106 ) Vno min al (Tmax − Tmin ) This method corresponds more accurately to the method of test and provides a closer estimate of actual error than the other methods. The box method guarantees limits for the temperature error but does not specify the exact shape or slope of the device under test. Figure 3 COUT 1µF VRE4100 3 4 Of the three TC specification methods (slope, butterfly, and box), the box method is most commonly used. A box is formed by the min/max limits for the nominal output voltage over the operating temperature range. The equation follows: T .C. = 6 2 Reference TC vs. T change from 25°C for 1 LSB change 10000 1000 100 8 BIT ReferenceTC (ppm/°C) 10 10 BIT 12 BIT 1 14 BIT 16 BIT 0.1 18 BIT 0.01 20 BIT 1 10 100 VRE4100DS REV. A MAY 01 www.thaler.com OPERATIONAL NOTES Input Capacitor ON/OFF Operation An input capacitor is recommended on the VRE4100 device. A supply bypass capacitor on the input will assure that the reference is working from a low impedance source which will improve stability. It can improve the transient response when the load current is suddenly increased. The VRE4100 features a sleep mode that is activated by pulling the enable pin low. To turn the reference on, the enable pin is pulled high. If this feature is not used, the the enable pin should be tied to Vin to keep the reference on at all times. The enable pin must not be left unconnected (floating). Output Capacitor When powered off, the VRE4100 will quickly reduce both Vout and IQ to zero. During power down, the charge across the output capacitor is discharged to ground through the internal circuitry. On power up, the Vout is restored in less than 200µs. The VRE4100 requires a 1µF output capacitor for loop stabilization (compensation) as well as transient response. When the load current changes, the output capacitor must source or sink current during the time it takes the control loop of the VRE4100 to respond. The output capacitor must meet the requirements of minimum capacitance and equivalent series resistance (ESR) range. See Capacitor Selection below. Capacitor Selection A minimum value of 0.2µF over the operating temperature range is recommended. For a 0.22µF capacitor the ESR range for 0°C -70°C is 0.9 to 6.0, 1.0µF is 0.8 to 6.0, and 10µF is 0.4 to 7.0. Surface mount tantalum capacitors offer small size for the value and ESR in the range required for the VRE4100. The optimum performance for the output capacitor is achieved with a 1.0µF value. Aluminum electrolytic capacitors have a relatively large size for the value. They meet the ESR requirements at 1.0µF as long as the temperature is above 0°C. Below 0°C, the ESR increases and it may exceed the limits indicated in the figures. Multilayer ceramic capacitors have a small size for the value, are available in surface mount, and have excellent RF characteristics. They may not meet the minimum ESR requirements and have a large change in value with temperature. Reverse Current Path The P-channel pass transistor used in the VRE4100 has an inherent diode connected between the Vin and VOUT pins. Forcing the output to voltages higher than the input or pulling Vin below the voltage stored in the output capacitor by more than the Vbe will forward bias this diode and current will flow from the Vout pin to Vin. This will not damage the VRE4100 as long as the current does not exceed 50mA. The signal source used to drive the enable pin can come from either a totem-pole output or an open collector output with a pull-up resistor to the VRE4100 input voltage. The signal source must be able to swing above and below the voltage thresholds to guarantee an ON or OFF state. It must not exceed the absolute maximum rating for the enable pin. Output Accuracy The output accuracy after assembly at room temperature is made up of three components: initial accuracy of the device, thermal hysterisis, and mechanical stress. The initial accuracy is measured at the factory and may not reflect the actual output voltage when the devices are mounted to a PCB. The effects of mechanical stress and thermal hysterisis can shift the output voltage. Thermal Hysterisis Thermal hysterisis is a change in output voltage as a result of a temperature change. When references experience a temperature change and return to the initial temperature, they do not always have the same initial voltage. Thermal hysterisis is difficult to correct and is a major error source in systems that experience temperature changes greater than 25°C. Reference vendors are starting to include this important specification in their datasheets Mechanical Hysterisis Recommendations to minimize mechanical stress: 1) Mount the VRE4100 near the edges or corners of the PCB. The center of the board generally has the highest mechanical and thermal stress. 2) Mechanically isolate the device by cutting a U shaped slot around the VRE4100. This provides some mechanical and thermal isolation from the rest of the circuit. VRE4100DS REV. A MAY 01 www.thaler.com MECHANICAL SPECIFICATIONS VRE4100DS REV. A MAY 01 www.thaler.com