W79E8213 8 - 1 2 3 3.1 4 5 6 6.1 6.2 6.3 6.4 6.5 .......................................................................................................................................... 4 .......................................................................................................................................... 4 ............................................................................................................................ 5 (ROHS) ............................................................................................... 5 !#" ................................................................................................................................... 6 #$ ................................................................................................................................... 7 %&$ ................................................................................................................................... 8 ')( FLASH EPROM .............................................................................................................. 8 I/O *,+ ................................................................................................................................. 8 -/.10 ................................................................................................................................... 8 23 ...................................................................................................................................... 8 4567 ............................................................................................................................... 8 CPU 89 ............................................................................................................................... 8 6.6 6.6.1 6.6.2 ALU ............................................................................................................................... 8 (ACC) .................................................................................................................. 9 :<;= 6.6.3 B >@?= ........................................................................................................................ 9 ABCDEF>@?= (PSW) ................................................................................................ 9 6.6.4 GH#IKJ ........................................................................................................................ 9 6.6.5 LMNFO ........................................................................................................................ 9 6.6.6 PQ#RS ............................................................................................................................... 9 6.7 TVU#WX ................................................................................................................................. 10 7 YZ[(V\ ............................................................................................................................. 10 7.1 45\]0 .......................................................................................................................... 10 7.2 45\]0 (MOVX) ............................................................................................................ 10 7.3 ^<\0_`1a ...................................................................................................................... 11 7.4 b)c>?= ................................................................................................................... 12 7.4.1 d#e1fg ...................................................................................................................... 13 7.4.2 LM ............................................................................................................................. 13 7.4.3 h#%/&iUj ...................................................................................................................... 14 8 kl ........................................................................................................................................ 39 9 6mn.1Z ............................................................................................................................. 47 9.1 oVp/q ................................................................................................................................. 50 10 10.1 rs1tu ............................................................................................................................. 50 -1- Publication Release Date: 3. 31, 2008 Revision.SC1 W79E8213 v Ptu ............................................................................................................................. 50 ) wxyz ................................................................................................................................. 51 11 11.1 {<|}Q ............................................................................................................................. 51 11.1.1 ~)@nd ...................................................................................................................... 51 11.1.2 nd (POR) ............................................................................................................ 51 11.1.3 /1=d ........................................................................................................ 51 11.2 {<| ............................................................................................................................. 51 ........................................................................................................................................ 52 12 12.1 23<Q ................................................................................................................................. 52 12.2 23< .......................................................................................................................... 53 12.3 23#. ...................................................................................................................... 54 12.4 23< ............................................................................................................................. 55 j / j .............................................................................................................. 57 13 13.1 -/.10 / 40 0&1 ............................................................................................................... 57 13.1.1 ...................................................................................................................... 57 13.1.2 ¡¢ 0 .......................................................................................................................... 57 13.1.3 ¡¢ 1 ........................................................................................................................... 58 13.1.4 ¡¢ 2 ........................................................................................................................... 58 13.1.5 ¡¢ 3 .......................................................................................................................... 59 14 NVM £U¤j ..................................................................................................................... 61 ¥§¦K¨ j ......................................................................................................................... 62 15 15.1 ©§ª@«¬ .......................................................................................................................... 63 15.2 ©§ª@«¬F.1® ................................................................................................................... 63 ¯°²±³´ .......................................................................................................................... 64 16 µ¶·#¸n< .......................................................................................................................... 66 17 18 I/O ¹º»!" ........................................................................................................................... 68 18.1 ¼½[¾V*+tu¿À ............................................................................................................ 68 18.2 ÁÂ*,+Ãtu¿#À ............................................................................................................... 69 18.3 ÄÅ*,+Ãtu¿#À ............................................................................................................... 69 18.4 ¿À ............................................................................................................................. 70 Æ#Çj .................................................................................................................................... 71 19 19.1 ')( RC ÈÉ<0ÊË .............................................................................................................. 71 19.2 ÌÍF.1®ÊË ............................................................................................................... 71 ÎÏ<jÐÑ ............................................................................................................................. 72 20 10.2 -2- W79E8213 oVp#ÒÓ%/& .......................................................................................................................... 75 21.1 Ô§PÕÖ ............................................................................................................................. 75 21.2 ×ØÕÖ ............................................................................................................................. 75 Ù#ÚÛÜ (PWM)..................................................................................................................... 76 22 ÝÞ#ßà#áj ...................................................................................................................... 79 23 23.1 ADC _1âãäåtæ§PQ :.................................................................................................... 79 24 ICP ( ç§oKè ) FLASH ................................................................................................ 81 !"x .................................................................................................................................... 82 25 21 25.1 25.2 CONFIG0............................................................................................................................ 82 1 ................................................................................................................................. 84 27.1 27.2 20-PIN SOP-300MIL .............................................................................................................. 92 20-PIN PDIP......................................................................................................................... 93 ¿ À oé# ................................................................................................................................. 86 26 26.1 ênë1ì4 ............................................................................................................................. 86 26.2 DC Píî#ï ........................................................................................................................ 87 26.3 ADC ð#ñ DC P@íîï .......................................................................................................... 88 26.4 AC Píîï ........................................................................................................................ 90 26.5 ÌÍF.1®îï ...................................................................................................................... 90 26.6 AC òó ............................................................................................................................... 91 26.7 ôõ[Pö ...................................................................................................................... 91 ÷ø#ùú ................................................................................................................................. 92 27 ûü#ý#þ ........................................................................................................................................... 94 ÿ 8 uC!"$#% !&'(*),+-. 2299/ 270 213 021-62365999 453 021-62365998 -3- Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 687 W79E8213 9:;<,=> 51 ?¬0@2A,BCEDGF!9HJIY)_ (ICP) õYZ Flash EPROM @KCLDGM õJNO0F!9JH2IYEP W79E8213 9n_K6m9JH,QJR!ST¼)_ 80526m9JH,UV . The W79E8213 ,WB 4K XY,Z Flash EPROM; 128 XY RAM; 2< 16-|#-/.10 / 40 ; 4ö 10| PWM; 3<[,\J]^ 23< ; 8ö 10| ADðñ0 . W79E8213 9 ,W_B 128 X Y _ NVM 45 Flash EPROM. `,a 10<)23 I Yåcd@ W79E8213 9 §(Ín_ FLASH EPROMYZ[(V\,`,) a PeI Yfg*P2;,<h Y Q 4n2<3 . Vb Z# i -Jj1@ õkCEDml,no,pJqrsLP . 2 tvu Rw 8| CMOSxJ> 51? ¬0@ .®yz 20 MHZ. CPU .1®QÊ,{ : ÌÍÈ#É0 : CJ| 20MHz .K®å*K } È (M!~ ¿#À| ). ')(ÃÈ#É0 : 20/10MHz ±2% ( M! ~ ¿À| ), 1 -nPØåJ ä . I Y_ (ICP)õYZ Flash EPROM (AP Flash EPROM). 4K XJY,CEDGF!9H Y '§( RAM. 128 X 4! 10K . 128 XY NVM 45 FLASH EPROM @2O 6mS MCS-51UV . 18 < I/O + . 2 16- |#-/.K0 / 40 . `,a 10 n < 2<3<Q@ 4n2<3 . D Ê{! 4 EK t#uå TTL/ J]^ 0, u . I/O +CEV CIY©[ª@«-/.10 C ÊE . 4 ö 10 | PWM yz 1 ö 10| ADC. ( ÍJJ^<0!0 . 3 <[,\J]^23< . B_@*+ ,JB, LED __~_ R ,¡)e P ¢ (50mA). 8 < I/O _ £§PØÕ Ö @CED! F23<å{<| . 8 (20/15mA). ICP ¤¥ : - Lead Free (RoHS) DIP20: - Lead Free (RoHS) SOP20: W79E8213AKG W79E8213ASG -4- W79E8213 3 3.1 ¦¨§ª©v«¬¯® °L± (RoHS)²8³!´Eµ*¶$·¸ª¹ . EPROM FLASH º» W79E8213AKG 4KB W79E8213ASG 4KB ÷ø RAM DATA FLASH 128B 128B 128B DIP-20 Pin 128B SOP-20 Pin ¼J½ 3-1: Lead Free (RoHS) Parts information list -5- Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 4 ¾¿ÁÀ¯Â à 4-1: R_¿À -6- W79E8213 5 ¾¿ÁÄÁ7 Å w#Æ %/& 1 wÆ#%/& 2 wÆ#%& Ý Ç (ICP 3 ) Å $ VDD P VSS P P0.0 AD6 PWM3 I/O P0.1 AD5 PWM0 I/O P0.2 AD4 BRAKE I/O P0.3 AD0 P0.4 AD1 Data I/O P0.5 AD2 Clock I/O P0.6 AD3 P0.7 AD7 P1.0 BUZ I/O T1 I/O I/O P1.1 ED1 I/O P1.2 ED2 P1.3 /INT0 I/O /INT1 I/O P1.5 STADC T0 I/O HV RST I P1.6 PWM1 I/O P1.7 PWM2 I/O P2.0 XTAL2/CLKOUT I/O P2.1 XTAL1 I/O ÏÍ Î ÐÒÑÔÓÖÕ ÐÒÑ×ØÕ ÐÚÙeÛÏÑÜÓØÑm× 5-1: ,ÝÞ * TYPE: P: r, I È PQ *,+ . . 0: `,a 4 * 2 tu . {<õ! É T1, PWM0, PWM3, BRAKE, AD0-7, Data and Clock (for ICP). I/O ED0 P1.4 Å O I/O *,+ 1: `,a 4 * 2tu . ( Ê P1.5 Ë!~ ). {<õ! É /RST, T0, /INT0-1, BUZ, PWM1-2, ED0-2, STADC, and HV (for ICP). ¡)P¢ .. CRYSTAL2: .1®* . CEDV¿À _Ì I/O + . ¿À _Ì I/O +K.2`,a 4 2 tu . D ¿À CRYSTAL1: .1® . CEV _Ì I/O + . ¿À _Ì I/O +K.2`,a 4 2 tu . P1.0-P1.7 50mA . -7- Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 ßáà$ÄÁ7 9 ,:ªâ 4ãy 8051 (Gäå^<\0 , 4K XY Flash EPROM, 128 XY RAM, 18<õ W79E8213 +å 2< 16-|-/.10 / 40Eå 8 ö 10| ADðñ0*å 128XY NVM æç*P 3 <[\],^n2<3< 10 | PWM, (Ín_ FLASH EPROM YZ[(V\C*DâmõJN!O0,è ICP N!O<0N!O 6 6.1 éÁê I/O , 4 ö * Flash EPROM 9 [(KÍJB 4 KX,Y)_1õY#Z\]/r/@Jë_Mõ,F[P@ö,IY.KìJíî[ª_ ICPNO0N!O (Ín_ X,Y Flash EPROM P ICPîïMïðññ /òóô,õö,÷,ðö,V!b<åøJù@ú.û,:,ü*ý kF,þ,ìJíJÿv IC,þ,ìJí ÁJCLDG _2ñõYZ . W79E8213 4 K 6.2 I/O 9 _C| 18< I/O EPeÀ PxM1.yå PxM2. ^<\ 0 @2,B*,+ CEDõ! 4 tuE@<Ä#Å#t/uåø<#tuþ!ì,í#ÌÍ)_Ô@Ì!ûCD"! Ì!§_ I/O +Gè/Á + PeB_@*+ CED#! <½[¾ I/OE * P$*G+ :%& Ô P I/O K W79E8213 6.3 ')(* |-n.0E@#+,~S 8052-!9n2#_-n.0./LPJë! -F.0,Mõ.,@C 0 A1À 2 49<),.B ®2<316 4,pq;!4@_è52 12 <.®34pq!;!4EP"#|#õk6798tæ : q_;uP . 8052 .1®, The W79E8213 6.4 ;< 9)_#239,H!SJT¼ 8052=§23J9,H,B>J?§_K?EPâ@\FA,~åÌ*@#23Q _14Bå)23¾CB, Dö AxP . W79E8213 EGF9HGI å T¼ 8052 ;J 6.5 6.6 CPU W79E8213 9 MCU B |)_14567 8- |_ KML 9, :N@T¼_ 8052 (Gä@2F ^<\0EPCEDCS,qT¼ 8052 _K6mP . W79E8213 6.6.1 16 ALU ALU (DPTR). 3O#PQ8Kõ@R#.\]45å¬Ìn_/(VÍ 9 MCU _2äT@2ABUV:UåWX:U,!~!@AYWJBZ3<åYZð[,!~!P \ ýk!: þ,W79E8213 CªD,Mõ ALU @6m!ï]o0]o!j,ï, ALU å,A§__^`/^\#0#n_":U/8a*P ALU Zí,, îb/^\0 ACCåîb/^<\0 B cdeÊ_f:ULP ALUg,,Th@"$Th\i@ X ^<\0 (PSW) 2 . ALU -8- W79E8213 6.6.2 jkj W79E8213 CPU \0EP (ACC) 9 n_ MCU 2"UV:Ul"WX:UMl45mn_#o!n2@pKx0 ,rGstp_x0@2LDø>6mu,Mõp_xv!, xwyz{| (ACC) :J;J<÷ðqJí)_^ Bv }B~ y 8 v" / _ wz{G| x v B9 # x v . 6.6.3 }~ (PSW) y 8 vG ALU ¡_¢M£¤¥|"¦§¥¨t© 9ª«¬© 9ª PSWx Mª v®¯°±Mªt²³ ´µ¶ . 6.6.4 9 · ¸C¹º W79E8213 Ð tGÑÒ» ¼ ½ . 6.6.5 128 ¾¿ÀÂÁ#ÃÄ RAM |tÅÆ¥¡_ÇÈÂ_ÉÊË {Ì9x½y MÍÎGÏ ÓÔÕÖ y 8- ×ØÙM"ÂÚÛ×Ø¡#ÜÝ| ×ØÃÄ W79E8213 äå RAMàá»¼æ½ çM¡ . 6.6.6 RAM Ï Þ#ß×ØM¡"àáGâãß ì íîèïé¥ ð êGñ9ë ¡ 8052òó W79E8213 »¼½ôõ"´ö ì÷ø | ôõ ÷øù CPU Ë"úûüýç Ë"vMþCÈÉÿã´GËtúûüG|#ö ì÷øù ½¡Ë#úûüM"ßMË G| 6.7 -9- Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 å 9¡!Ï Ð ÅÆÂÁ Ï_´{Ì vÏ|"ÅÆÉÁ Ï ÅÆ W79E8213 t{Ì »vM¼Ï ÉÁ {2Ì ¥ Á ¡"# 7 $ 7.1 '(*),+ »¼à½ Ð 8 . /Ï . W79E8213 7.2 93:3+;3< 4K »¼#½ 7-1: W79E8213 ¾¿¡#ÅÆ¥Á ½-./Ï Ð 10G³#ÇÈ| ¯=>¡ { Ì v9|5?@ äå ¡ÁBA DE v F{Ì . W79E8213 128 NVM NVMADDR, NVMDAT NVMCON 9 H :3 í .+;3< G &3 7.3 ´ &% (MOVX) - 10 - MOVC 32546,7 “MOVC A,@A+DPTR” ¨ C W79E8213 I+3<JKML M ô N_´{Ì ô N|_À¥Á 128ø ¾¿8 ÃÄ RAM OPQ ä Á _¦ W79E8213 »¼½9¡tÅÆ §½D&E R 8 v (D&E& MR v ) | SFR SMR Ñ ÒÍÎT 7 9¡_À¥Á RAM 9ÑÒÍÎ6 GU"N ÒÍxÎ7 . 7.4 $ Ãù Ä . RAM S½ 128 7-1: W79E8213 RAM and SFR memory map ¾¿MÞ"ßVW P{ÌXYá¡5Z[¨# ¡Ë]\M5^_`a³]bdc|1efg - 11 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 FFH Indirect RAM 80H 7FH Direct RAM 30H 2FH 7F 7E 7D 7C 7B 7A 79 78 2EH 77 76 75 74 73 72 71 70 2DH 6F 6E 6D 6C 6B 6A 69 68 2CH 67 66 65 64 63 62 61 60 2BH 5F 5E 5D 5C 5B 5A 59 58 2AH 57 56 55 54 53 52 51 50 29H 4F 4E 4D 4C 4B 4A 49 48 28H 47 46 45 44 43 42 41 40 27H 3F 3E 3D 3C 3B 3A 39 38 26H 37 36 35 34 33 32 31 30 25H 2F 2E 2D 2C 2B 2A 29 28 24H 27 26 25 24 23 22 21 20 23H 1F 1E 1D 1C 1B 1A 19 18 22H 17 16 15 14 13 12 11 10 21H 0F 0E 0D 0C 0B 0A 09 08 20H 1FH 07 06 05 04 03 02 01 00 Bank 3 18H 17H Bank 2 10H 0FH Bank 1 08H 07H Bank 0 00H $ 7-2: RAM hi}~ ½kjt8 ¯l ¯o½ p8q å8-r v¥|"¯&mn w 1 ¯ ª_w 2 ¯ª_w 3 ¯Mª_w 4 ¯t¯G o®Â"Ñv Ò&7 | R0 ª R1 ª R2 ª R3 ª R4 ª R5 ª R6 ´ R7 UstÂ"ÉÚ5uMvy ¯"½ PSW _ o ¡ RS0 ª RS1 ¡1wxæçM| R0´ R1 x oy d N"ÒÍΡzÎ . 7.4.1 - 12 - W79E8213 {M|}~ Ð 9#¾¿ÍÎ&69#ÍÎU6. Ï Ð 9ÍÎ_ Ã Ä RAM 2Fh ¡Ï o Ï, - å20h ¾¿G|CDE &R o 1zÎ 0 8 £UM¡]GÛÍÎ . 7.4.2 Ó Ô ÃÄ RAM9 ×Ø]@Ï Ð â ×ØÙ (SP)ç SP x×Ø¡#ÜÝzÎG|,]ª] MU&, Ë]3zÎ ØÜGt RAM "×ØG¡zν3xçM¡×ØÙ& 07h x 1Ì&&,×Ø¡5zÎ9| SPÂÚÛ×ØG¡ ¡t©¢ SP£ 1 ³tØ?G³"ØçM¡¡¤ SP¥ 1.. 7.4.3 - 13 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 ¦§¨ª©¬«*® " o÷ø |1DE »¼ MCU Á1¯ DE &R o (D E MR x o )ø °± ´8 ²³Q"È´Q W79E8213 o MR P 80H-FFH ô&NÁ o SMR ÑÒÍÎG¡T 7 |#y/DE MR Í r W P¡]Sz´Îµ ÎG ¡ . R D ¡ ¶ y · d ¸ t ¹ G ¡ Z G [ t | Í 9 Î 1 ¡ D & E o _zÎ&º&m9 0 8 £9| W79E8213 »¼_§½ñ 8052 ]½G¡DME& MR o M M2RË6 £»3t¼ y/ ½ ¡5DE MR o |#x yo /¾ Z [ 8052 ]¿ y ç À ¡# yÁ ¼ ½ ¡] M R | ùà ¼M³ ¼ W79E8213 »¼M¡5DE &R | . 8 F8 IP1 F0 B E8 EIE E0 ACC ADCCON ADCH ADCCON1 D8 WDCON PWMPL PWM0L PWM1L D0 PSW PWMPH PWM0H PWM1H BUZCON PWMCON1 PADIDS IP1H PWM2L PWM3L PWMCON2 PWM2H PWM3H PWMCON3 NVMCON NVMDAT C8 C0 B8 NVMADDRH NVMADDRL IP0 B0 P2M1E P0M1 A8 IE A0 P2 TA P0M2 P1M1 AUXR1 EDIC P1M2 P2M1 P2M2 TH0 TH1 CKCON IP0H 98 90 P1 88 TCON TMOD TL0 TL1 80 P0 SP DPL DPH à 8-1: DE R x o ¼ à Note: 1. ÄÆÅÈÇÉÈÊBËÍÌÈÎÈÏÑÐÓÒÓÔÑÕÖ×ËÙØÆÚÆÛÈÜÆÝßÞÈà Ë 2. áÈâÆãÈäÈåBæ 8 ÏBçÍèêéìëÓâÆíÈîÈïÈÖÑèÑðòñÈÄÓØÆÚÆÛÆÜÈÝßÞÈàÞÆóõôÍöÆ÷ÈøÑèùðËÙú5ûýüÈþÆÿ 1 - 14 - PCON . W79E8213 SYMBOL DEFINITION ADDR MSB ESS BIT_ADDRESS, SYMBOL LSB RESET BUZCON Square wave control register F9H - - BUZDIV.5 BUZDIV.4 BUZDIV.3 BUZDIV.2 BUZDIV.1 BUZDIV.0 xx00 0000B IP1 Interrupt priority 1 F8H (FF) PED (FE) PPWM (FD) PBK (FC) PWDI (FB) - (FA) - (F9) - (F8) - PEDH PPWMH PBKH PWDIH - - - - IP1H Interrupt high priority 1 F7H PADIDS Port ADC digital input disable F6H B B register F0H (F7) (F6) EIE Interrupt enable 1 E8H (EF) EED (EE) (ED) EPWMUF EPWM ADCCON1 ADC control register 1 E3H ADCH ADC converter result high register E2H ADCCON ADC control register E1H 0000xxxxB 0000xxxxB 00000000B (F5) (F4) (F3) (F2) (F1) (F0) 00000000B (EC) EWDI (EB) - (EA) - (E9) - (E8) - 0000xxxxB ADCLK.1 ADCLK.0 - - - AADR2 - - 10xxx0xxB ADC.9 ADC.8 ADC.7 ADC.6 ADC.5 ADC.4 ADC.3 ADC.2 00000000B ADC.1 ADC.0 ADCEX ADCI ADCS RCCLK AADR1 AADR0 00000000B ACC Accumulator E0H (E7) (E6) (E5) (E4) (E3) (E2) (E1) (E0) 00000000B PWMCON2 PWM control register 2 DFH BKCH BKPS BPEN BKEN PWM3B PWM2B PWM1B PWM0B 00000000B PWM3L PWM 3 low bits register DEH PWM3.7 PWM3.6 PWM3.5 PWM3.4 PWM3.3 PWM3.2 PWM3.1 PWM3.0 00000000B PWM2L PWM 2 low bits register DDH PWM2.7 PWM2.6 PWM2.5 PWM2.4 PWM2.3 PWM2.2 PWM2.1 PWM2.0 00000000B PWMCON1 PWM control register 1 DCH PWMRU N load PWMF CLRPWM PWM3I PWM2I PWM1I PWM0I 00000000B PWM1L PWM 1 low bits register DBH PWM1.7 PWM1.6 PWM1.5 PWM1.4 PWM1.3 PWM1.2 PWM1.1 PWM1.0 00000000B PWM0L PWM 0 low bits register DAH PWM0.7 PWM0.6 PWM0.5 PWM0.4 PWM0.3 PWM0.2 PWM0.1 PWM0.0 00000000B PWMPL PWM counter low register D9H PWMP0.7 PWMP0.6 PWMP0.5 PWMP0.4 PWMP0.3 PWMP0.2 PWMP0.1 PWMP0.0 00000000B WDCON Watch-Dog control D8H (DF) WDRUN (DE) - (DD) WD1 (DC) WD0 (DB) WDIF (DA) WTRF (D9) EWRST (D8) WDCLR External reset: 0x00 0000B Watchdog reset: 0x00 0100B Power on reset 0x000000B PWMCON3 PWM control register 3 D7H - - - - FP1 FP0 - BKF xxxx00x0B PWM3H PWM 3 high bits register D6H - - - - - - PWM3.9 PWM3.8 xxxxxx00B PWM2H PWM 2 high bits register D5H - - - - - - PWM2.9 PWM2.8 xxxxxx00B PWM1H PWM 1 high bits register D3H - - - - - - PWM1.9 PWM1.8 xxxxxx00B PWM0H PWM 0 high bits register D2H - - - - - - PWM0.9 PWM0.8 xxxxxx00B PWMPH PWM counter high register D1H - - - - - - PWMP0.9 PWMP0.8 00000000B PSW Program status word D0H (D7) CY (D6) AC (D5) F0 (D4) RS1 (D3) RS0 (D2) OV (D1) F1 (D0) P NVMDATA NVM Data CFH NVMCON NVM Control CEH EER EWR - - - - - - 00xxxxxxB TA Timed Access Protection C7H TA.7 TA.6 TA.5 TA.4 TA.3 TA.2 TA.1 TA.0 11111111B NVMADDRL NVM low byte address C6H NVMADD NVMADD NVMADD NVMADD NVMADD NVMADD NVMADD NVMADD 00000000B R.7 R.6 R.5 R.4 R.3 R.2 R.1 R.0 NVMADDRH NVM high byte address C5H - 00000000B 00000000B - - - - - - NVMADD xxxxxxxx0B R.8 P2M1E Port 2 output mode 1 extended BBH - - - - P2M1.3 P2M1.2 - - Xxxx00xxB IP0 Interrupt priority B8H (BF) - (BE) PADC (BD) PBO (BC) - (BB) PT1 (BA) PX1 (B9) PT0 (B8) PX0 x00x0000B IP0H Interrupt high priority B7H - PADCH PBOH - PT1H PX1H PT0H PX0H x00x0000B - 15 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 P2M2 Port 2 output mode 2 B6H - - - - - - P2M2.1 P2M2.0 P2M1 Port 2 output mode 1 B5H P2S P1S P0S ENCLK T1OE T0OE P2M2.1 P2M2.0 Xx000000B 00000000B P1M2 Port 1 output mode 2 B4H P1M2.7 P1M2.6 - P1M2.4 P1M2.3 P1M2.2 P1M2.1 P1M2.0 00x00000B P1M1 Port 1 output mode 1 B3H P1M1.7 P1M1.6 - P1M1.4 P1M1.3 P1M1.2 P1M1.1 P1M1.0 00x00000B P0M2 Port 0 output mode 2 B2H P0M2.7 P0M2.6 P0M2.5 P0M2.4 P0M2.3 P0M2.2 P0M2.1 P0M2.0 00000000B P0M1 Port 0 output mode 1 B1H P0M1.7 P0M1.6 P0M1.5 P0M1.4 P0M1.3 P0M1.2 P0M1.1 P0M1.0 00000000B IE Interrupt enable A8H (AF) EA (AE) EADC (AD) EBO (AC) - (AB) ET1 (AA) EX1 (A9) ET0 (A8) EX0 000x0000B EDIC Edge detect control register A3H EDFLT.1 EDFLT.0 ED2TRG ED2EN ED1TRG ED1EN ED0TRG ED0EN AUXR1 AUX function register A2H EDF BOD BOI LPBOV SRST ADCEN BUZE - P2 Port 2 A0H (A7) - (A6) - (A5) - (A4) - (A3) - (A2) - (A1) P2.1 XTAL1 (A0) xxxx11xxB P2.0 XTAL2 CLKOUT P1 Port 1 90H (97) P1.7 PWM2 (96) P1.6 PWM1 (95) P1.5 /RST (94) P1.4 /INT1 STADC (93) P1.3 /INT0 (92) P1.2 ED2 T0 (91) P1.1 ED1 (90) P1.0 ED0 BUZ CKCON Clock control 8EH - - - T1M T0M - - - TH1 Timer high 1 8DH 00000000B TH0 Timer high 0 8CH 00000000B TL1 Timer low 1 8BH 00000000B TL0 Timer low 0 8AH TMOD Timer mode 89H GATE C/T M1 M0 GATE C/T M1 M0 00000000B TCON Timer control 88H (8F) TF1 (8E) TR1 (8D) TF0 (8C) TR0 (8B) IE1 (8A) IT1 (89) IE0 (88) IT0 00000000B PCON Power control 87H - - BOF POR GF1 GF0 PD IDL DPH Data pointer high 83H 00000000B 000X000xB 11111111B xxx00xxxB 00000000B xxxx0000B 00000000B DPL Data pointer low 82H 00000000B SP Stack pointer 81H 00000111B P0 Port 0 80H (87) P0.7 AD7 T1 à (86) P0.6 AD3 8-2: (85) P0.5 AD2 (84) P0.4 AD1 DE &R x o - 16 - (83) P0.3 AD0 (82) P0.2 AD4 BRAKE (81) P0.1 AD5 PWM0 (80) P0.0 AD6 PWM3 11111111B W79E8213 PORT 0 Bit: ¬ 7 6 5 4 3 2 1 0 P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 ¡ : P0 P0.7-0: { ÿ &RUe,fg ù o 1. AD7 çË I/O . 7 P0.7 6 P0.6 AD3. 5 P0.5 AD2. 4 P0.4 AD1. 3 P0.3 AD0. 2 P0.2 AD4 1 P0.1 AD5 0 P0.0 AD6 : zÎ : 80h BRAKE. PWM0. PWM3. ÓÔÕÖ Bit: ¬ { 3 2 1 0 SP.7 SP.6 SP.5 SP.4 SP.3 SP.2 SP.1 SP.0 zÎ SP.[7:0] ×ØÙ RAM "×ØM¡1zÎM,s¥ÚÛØÜ : 81h . 7 6 5 4 3 2 1 0 DPL.7 DPL.6 DPL.5 DPL.4 DPL.3 DPL.2 DPL.1 DPL.0 : DPL 7-0 ¬ 4 ÕÖ ¬ { Bit: 5 Bit: 6 : SP 7-0 7 DPL.[7:0] 16 ÕÖ {ÌÙ¡5¾¿ zÎ : 82h . 7 6 5 4 3 2 1 0 DPH.7 DPH.6 DPH.5 DPH.4 DPH.3 DPH.2 DPH.1 DPH.0 : DPH - 17 - zÎ : 83h Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 { 7-0 DPH.[7:0] 16 {ÌÙG¡¾¿ . POWER CONTROL Bit: ¬ { 7 6 5 4 3 2 1 0 - - BOF POR GF1 GF0 PD IDL : PCON 7 - 6 - 5 BOF 4 POR 3 GF1 2 GF0 1 PD 0 IDL 34 Bit: 56 zÎ : 87h . . !" ì x ª (*)&ª(*)G]Ë+ , 1: $#&%$' " |ì 0: ! x Ë+ ,| . 1: $#&%$' 0: . ¡# . ¡# . ìC÷ø ¨@ ÷øù ]½Ëtúûü®M"ÅÆ6.ÇÈ 1 »-©»ö » -©»ôõ ÷ø ¨]@ ÷øù CPU ¡Ë"úûü®MtÅÆûüÈG¨#ý¥þÿtª 1 çË o ª]¡Ë"ú½ûüM5./ &R ÷ / 0 1 2 È 7 6 5 4 3 2 1 0 TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 ¬ : TCON zÎ : 88h { çË o 1²G³" M¨#çË o 1²G³Ë@&, 1 |,_Åƹ¾çË o 1 UxÇÈò¾M¡ 7 TF1 87&o9ÅÆMË°± @ Æ ! 0 |:6;@ ,&x 6 TR1 çË o 1 <, @Ââ=>o ,! " <, ?@#çË o o çË 0²G³" M¨#çË 1²G³Ë@&, 1 |,_Åƹ¾çË 0 UxÇÈò¾M¡ 5 TF0 87&o9ÅÆMË°± @ Æ ! 0 |:6;@ ,&x 4 TR0 çË 0 <, @Â=â > , ! " <, ?@#çË o 3 IE1 Q ä U 1 ¨, int 1 '³*A Cì B ËâC+ &, 1 ¨*D y ", ùEF #"© »F 87&ø 9°Å± Æ IE1 È=ì B!G E F 0 | . Hì BF 2 IT1 ¨ 1 #M¨ 0 # 1 #T ì = B ù E F # ä 1 IE0 Q 0 ¨, INT 0 'G*³ A Ë=â + &, 1 *¨ D y " , ©»87&9ÅÆ IE0 Æ ! 0 - 18 - W79E8213 0 IT0 34 IJ5 6 Bit: ø ì=BG EF #M¨ 0 ì=BF # Q ä 0F # T °± ¨ 1 . 7 6 5 4 3 2 1 0 GATE C/T M1 M0 GATE C/T M1 M0 TIMER1 TIMER0 ¬ : TMOD zÎ : 89h { K ° 1 Ë , çË o / ¢{ o ¡#È$L TRx°± Q&L int n °± TRx´ int n M GATE 7 o /¢{ o&N ÈG|5@ 0 ËxçË o ¡#ÈSL TRx ¡ °± 1 Ë_çË o /¢{ o ®T ø °± 0 Ë#çË o ¡1T ø ÈM¨_ 1 Ë*; TXO'G¡, ç Ë B 6 C/ T P©È¢{ ÷ ø °± M1 5 ÷ø °± M0 4 K ° 1 Ë , çË o / ¢{ o ¡#È$ L TRx°± o Q&L int n °± ° ± TRx´ int n M GATE 3 o o & N ÈG|5@ 0 ËxçË ¡#ÈSL TRx ¡ 1 Ë_çË / ¢{ ø °± 0 Ë#çË o ¡1T ø ÈM¨_ 1 *Ë ; TXO'G¡, o o ç Ë ® T / ¢{ B 2 C/ T P©È¢{ ÷ ø °± M1 1 ÷ø °± M0 0 M1, M0: I&JQR{ : M1 M0 I J ÷ ø å T o 0 0 t½ 5G¡:S å | T 0: 8- çË ÷ ø o 0 1 ]½ 5:¡ S | 1: 16- çË ÷ ø o 1 0 UVçË 2: 8 - THx È& ÷ ø o °± o o 1 1 oË 3:1°± W V¡ W 8PçT0 oË X /¢TL0{ o L|"ççË Ë o 01ßT ¡ ø8ù çË ®/¢| { | TH0 >Lç 34 0 LSB Bit: ¬ { 7 6 5 4 3 2 1 0 TL0.7 TL0.6 TL0.5 TL0.4 TL0.3 TL0.2 TL0.1 TL0.0 : TL0 - 19 - zÎ ì ì : 8Ah Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 7-0 34 Bit: ¬ { ¬ { 6 5 4 3 2 1 0 TL1.7 TL1.6 TL1.5 TL1.4 TL1.3 TL1.2 TL1.1 TL1.0 TL1.[7:0] çË o ¬ { : 8Bh 1 LSB. 7 6 5 4 3 2 1 0 TH0.7 TH0.6 TH0.5 TH0.4 TH0.3 TH0.2 TH0.1 TH0.0 TH0.[7:0] çË o zÎ : 8Ch 0 MSB. 1 MSB 7 6 5 4 3 2 1 0 TH1.7 TH1.6 TH1.5 TH1.4 TH1.3 TH1.2 TH1.1 TH1.0 : TH1 7-0 zÎ 0 MSB Bit: Bit: 7 : TH0 7-0 4$Y 0 LSB. 1 LSB Bit: 34 çË o : TL1 7-0 34 TL0.[7:0] TH1.[7:0] 5 6 5 6 çË o zÎ : 8Dh 1 MSB. 7 6 5 4 3 2 1 0 - - - T1M T0M - - - ¬ : CKCON { 7-5 - 4 T1M 3 T0M 2-0 - Z çË o 1o #Ë ú°± 0: çË 1 ¡Ë"ú°± o 1: çË 1 ¡Ë"ú°± o çË o 0 Ë"ú°± : 0: çË 0 ¡Ë"ú°± o 1: çË 0 ¡Ë"ú°± Z »-Ëtú| 1/4 »-Ë"úG| 1/12 »-Ë"ú| 1/4 »-Ë"ú| 1/12 - 20 - zÎ : 8Eh W79E8213 PORT 1 Bit: 7 6 5 4 3 2 1 0 P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 ¬ : P1 z Î : 90h {¾[» /[³"ÝÉÿ_|à\x{GH;. ÝÉÿã©È?]#? -& µ - F#¡ "9B? P1.7-0: ³#ÝÉÿ_^` î O& &R,g ù : { 7 P1.7 PWM2. 6 P1.6 PWM1. 5 P1.5 /RST 4 P1.4 3 P1.3 /INT0. 2 P1.2 Timer 0 1 P1.1 ED1. 0 P1.0 BUZ ED0. ´[»baO . STADC ´ /INT1. ´ ED2. ´ PORT 2 Bit: 7 6 5 4 3 2 1 0 - - - - - - P2.1 P2.0 Mnemonic: P2 { 7-2 - 1 P2.1 0 P2.0 cd }~ Bit: ¬ { 7 zÎ : A0h Ë#ú[»ZaO ³ a$O& XTAL2 ´ CLK [8 XTAL1 1 7 6 5 4 3 2 1 0 EDF BOD BOI LPBOV SRST ADCEN BUZE - : AUXR1 EDF F #M] : G E>F 1: &R P1.0-1.2 t # &R - 21 - ( zÎ : A2h G=e ,>' f E / ù ( EF # ). g h¥âC!" .. Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 6 BOD 5 BOI 4 LPBOV i )j³ i : 0: R i )j³ . k ü )j³ . 1: i ) j ³G i : k ü i )j³ &R 0: ) j ³ &R . 1: l8m ìCí i ) j ³ °± : y m G&n 1 2÷ø öo ÷ø i ) j³ &R>pÑqP r N 0: BOD lM wxG| ¡ i ì) v j³,`G¡ ì )ìt ÷64/f 960/f , , Þ#ß 1: BOD=0 stM øù , ìtí ?i 1@ V i - Mö t¿Zu 15/16 ) ) < Á ä RC OSC . » BRC BRC (500KHz) 3 SRST ADCEN 2 1 BUZE 0 - |&}~& Bit: ¬ { &_ : 1: +&x wÀ . ìHx k ü ADC ìHx . 0: 1: l8m ADC . T y Rx : [ ³Hz { BUZ (P1.0). 1: Ty . 5 6}x~ 7 6 5 4 3 2 1 0 EDFILT.1 EDFILT.0 ED2TRG ED2EN ED1TRG ED1EN ED0TRG ED0EN : EDIC 7-6 EDFILT.10 5 ED2TRG 4 ED2EN 3 ED1TRG Ë"ú = Fosc. 01 – Filte r Ë"ú = Fosc/2. 10 – Filter Ë"ú = Fosc/4. 11 – Filter Ë"ú = Fosc/8. ù ( E a] EDF, (ED2EN&R ). 0 –ED2 a$O¡ ¡ '&f /ù ( E a5 EDF, (ED2ENMR 1 –ED2 a$OH 0 – kü . GEF #MU . 1 – &R ED2 (P1.2) a ù E ( a] EDF, (ED1EN&R ). 0 –ED1 a$O¡ ¡ '&f /ù ( E a5 EDF, (ED1ENMR 1 –ED1 a$OH 00 – Filter - 22 - ) ) zÎ : A3h W79E8213 2 ED1EN 0– ED0TRG 0 ED0EN 8 Bit: ¬ { 4 3 2 1 0 EA EADC EBO - ET1 EX1 ET0 EX0 : IE EADC 5 EBO 4 - 3 ET1 2 EX1 1 ET0 0 EX0 7-0 0 Bit: ¬ { ) 5 6 ¬ { ED1 (P1.1) 6 EA Bit: &R 7 7 0 . GEF a #MU . ù E ( ù a] E EDF, (ED0EN&R ). 0 –ED0 a$O¡ 5a EDF, (ED0ENMR 1 –ED0 a$O¡H'&f / ( k ü . 0– GEF a # U . M 1 – &R ED0 (P1.0) 1– 1 kü I J ] l>m . >l m / k ü½¡ &R ] . l>m )G . . l>mçË o 1 ä l>mQ 1. l>mçË o 0 ä l>mQ 0. i zÎ : A8h . ADC . . 1 7 6 5 4 3 2 1 0 P0M1.7 P0M1.6 P0M1.5 P0M1.4 P0M1.3 P0M1.2 P0M1.1 P0M1.0 : P0M1 °± P0M1.[7:0] I J P0 [³:e, zÎ : B1h [7:0] 2 7 6 5 4 3 2 1 0 P0M2.7 P0M2.6 P0M2.5 P0M2.4 P0M2.3 P0M2.2 P0M2.1 P0M2.0 : P0M2 - 23 - zÎ : B2h Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 7-0 1 I J Bit: ¬ { ¬ { 6 5 4 3 2 1 0 P1M1.7 P1M1.6 - P1M1.4 P1M1.3 P1M1.2 P1M1.1 P1M1.0 IJ P1 [³:e , ¬ { [7:0] 6 5 4 3 2 1 0 P1M2.7 P1M2.6 - P1M2.4 P1M2.3 P1M2.2 P1M2.1 P1M2.0 I&J P1 [³:e , zÎ : B4h [7:0] 1 7 6 5 4 3 2 1 0 P2S P1S P0S ENCLK T1OE T0OE P2M1.1 P2M1.0 : P2M1 7 P2S 6 P1S 5 P0S 4 ENCLK 3 T1OE 2 T0OE 1 P2M1.1 0 P2M1.0 2 : B3h 7 P1M2.[7:0] 2 zÎ 2 Bit: ¬ { : P1M2 7-0 Bit: [7:0] 7 P1M1.[7:0] Bit: [³:e, 1 1 P0 : P1M1 7-0 °± P0M2.[7:0] I&J zÎ : B5h > ,D F # o ¡H[»G| > ,D FF # o ¡*[»| P1 ÿã > ,D # o ¡*[»| P0 ÿã XTAL2 O (P2.0) [³Ë"ú . T T : o 1²³Ë P0.7O G| P0.7O¡:[³ çË o 1 ² ³ & ¡ p | =1: xçË T T & o o çË 0 ² ³ ¡ p | : =1: xçË 0 ²³Ë P1.2O G| P1.2 O¡:[³ ° ± ¡ [*³ e, | P2.1 : ° ± | P2.0 ¡:[³*e, l>m =1: l>m =1: l>m 1: l>m =1: P2 2 7 6 5 4 3 2 1 0 - - - - - - P2M2.1 P2M2.0 : P2M2 - 24 - zÎ : B6h W79E8213 7-2 - 1-0 P2M2.[1:0] °± . P2 [³:e, PxM1.y (see note) PxM2.y 0 0 0 1 1 0 [1:0] ÝÉÿ ÷ø e , : I&J [» ( ) ÷ ø ñ9Ú ÷ø ÷ø P2M1.PxS=0, TTL [» P2M1.PxS=1, Schmitt 1 8 1 ÷ø [» 8 Bit: ¬ { 8 N> 7 6 5 4 3 2 1 0 - PADCH PBOH - PT1H PX1H PT0H PX0H : IP0H 7 - 6 PADCH 5 PBOH 4 - 3 PT1H 2 PX1H 1 PT0H 0 PX0H Bit: > ¬ g¤,?£¤M| 1: ", ADC U&| i ) ²³ o M| 1: ", . , çË o 1 M | 1: " ä , Q U 1 1: " , çË o 0 1: " , Q ä U 0 1: " zÎ : B7h 0 7 6 5 4 3 2 1 0 - PADC PBO - PT1 PX1 PT0 PX0 : IP - 25 - zÎ : B8h Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 { 7 - 6 PADC 5 PBO 4 - 3 PT1 2 PX1 1 PT0 0 PX0 2 Bit: ¬ { 7-0 *I&J @,½ 5?¡x£¤ ‘1’. " ,M ADC ¡: Y > . 1: " ,M i )²³ o U& Y 1: . 1: ",MçË , UQ ä 1: "M , çË 1: "M , UQ ä 1: "M o 1 :¡ UY& . 1 ¡:&,Y> o 0 ¡: U& Y . 0 ¡:&, Y > . . . 1 7 6 5 4 3 2 1 0 - - - - - - - - : P2M1E - zÎ : BBh . NVM ,{ } Bit: 7 6 5 4 3 2 1 0 - - - - - - - NVMADD R.8 ¬ { zÎ : NVMADDRH ,@ 7-1 - 0 NVMADDR.[8] : C5h 0. Î : x o z nÀ9Á× Á ô&NzÎ NVM NVM {Ì o NVM { } Bit: 7 6 5 4 3 2 1 0 NVMADD R.7 NVMADD R.6 NVMADD R.5 NVMADD R.4 NVMADD R.3 NVMADD R.2 NVMADD R.1 NVMADD R.0 ¬ { 7~0 zÎ : NVMADDRL NVMADDR.[7:0] zÎ : x o nÀ9Á× Á ô&NzÎ NVM - 26 - NVM {Ì o . : C6h W79E8213 ¡£¢ 4 5 }~ Bit: ¬ { 7-0 7 6 5 4 3 2 1 0 TA.7 TA.6 TA.5 TA.4 TA.3 TA.2 TA.1 TA.0 : TA TA.[7:0] zÎ : C7h x o : 7 88 Ë ° ° o P °± ; &¤ G¡]7 8 |5`7 8 y &¤ #¡ G ¥ `ÉÚ TA 7 o Ë ]¤&¦8.F» 55H §&»- z&{ 3& ¨ o&© ª ¡ËNH{ 7 F,8 y» AAH ¤ ¡#M| NVM CONTROL Bit: ¬ { 7 6 5 4 3 2 1 0 EER EWR - - - - - - : NVMCON 6 EWR Bit: ¬ { 7~0 %>« _ NVM% ¬ NVMC {Ì % ¡Á1A x«& o ’FFH’% | NVM{Ì o ½ 8 %% ]l 1: @ % à" á ’1’ ¾¿G| NVMADDR °± t"ç@@ y !Mt16 ÅÆÙ% &®¯@ù G% ¡_£>°|#±£>°§ÅÆÙÇÈ ù p²G| NVM z ÎçÀg NVM {Ì F 0: F NVM {Ì . " , ’1’ Ú NVM F p ¾ù¿¡"{Ì|ÅÆÙ ® ¯ @ ¡t£>°G|# 1: ¬&_ ±£>°§ ÅÆÙ ÇÈ p ²G| « EER NVM : CEh NVM 0: 7 5-0 zÎ - 7 6 5 4 3 2 1 0 NVMDAT. 7 NVMDAT. 6 NVMDAT. 5 NVMDAT. 4 NVMDAT 3 NVMDAT. 2 NVMDAT. 1 NVMDAT. 0 : NVMDATA NVMDAT.[7:0] F NVM {Ì x o 5? - 27 - NVM {Ì MOVC zÎ : CFh . Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 Bit: ¬ { 6 5 4 3 2 1 0 CY AC F0 RS1 RS0 OV F1 P : PSW 5 4~3 2 1 0 PWMP ¼ Bit: 0 0 0 00-07h 0 1 1 08-0Fh 1 0 2 10-17h 1 1 3 18-1Fh ,{}~ 7 6 5 4 3 2 1 0 - - - - - - PWMP.9 PWMP.8 : PWMPH 7-2 - 1-0 PWMP.[9:8] PWM PWM 0 ¬ { : D0h CY 6 Bit: zÎ © ALU©È&³´%©µMË, AC «¬© >¾¿´%x©µMË*, 0 G ¡ F0 x o Ï_°± RS1~RS0 x o Ï_°± OV F1 ²³# : 8 p S&] ¶ ··8 ¶&¸ ´%_©Ë]@ y " , 1: G ¡ P x o å ¯°± : RS.1-0: RS1 RS0 }x~& ¹º&» } 7 ¬ { 7 ,{}x~ ¢{ o x o ¡ 9~8 zÎ : D1h . 7 6 5 4 3 2 1 0 - - - - - - PWM0.9 PWM0.8 : PWM0H 7~2 - 1~0 PWM0.[9:8] PWM 0 _ o 9~8 . - 28 - zÎ : D2h W79E8213 PWM 1 Bit: ¬ { ,{}~ 7 6 5 4 3 2 1 0 - - - - - - PWM1.9 PWM1.8 : PWM1H Z 7~2 - 1~0 PWM1.[9:8] PWM1 PWM 2 Bit: ¬ { ,{}~ 4 3 2 1 0 - - - - - - PWM2.9 PWM2.8 : PWM2H Z PWM2.[9:8] PWM2 PWM 3 9~8 zÎ : D5h . 7 6 5 4 3 2 1 0 - - - - - - PWM3.9 PWM3.8 : PWM3H Z - 1~0 PWM3.[9:8] PWM3 ¬ { x o ,{}~ 7~2 Bit: . 5 1~0 PWM 6 - ¬ { 9~8 : D3h 7 7~2 Bit: x o zÎ 5 6}x~ x o 9~8 6 - - . 5 4 - - 3 2 1 0 FP1 FP0 - BKF : PWMCON3 7-4 - 3-2 FP[1:0] : D6h 3 7 zÎ . PWM T °± . PWMRUN=1, FP[1:0] Fpwm 00 FOSC - 29 - &R¾½=¿À zÎ : D7h . Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 1 - 0 BKF ¾Ã:Ä Bit: ¬ { 7 01 FOSC/2 10 FOSC/4 11 FOSC/16 . küÁ ±± . @ ÂâC>!" 1: &R PWM Á . 0: PWM 56 . 7 6 5 4 3 2 1 0 WDRUN -POR WD1 WD0 WDIF WTRF EWRST WDCLR zÎ : WDCON WDRUN 0: 1: 6 - 5 WD1 4 WD0 S K Æ Å H K Æ Å H Å K=Æ ûü È . çË o °± WD1 0 0 1 WDIF 2 WTRF 1 EWRST 0 WDCLR . WD0 Interrupt time-out 17 0 2 20 1 2 23 0 2 26 Reset time-out 17 + 512 20 + 512 23 + 512 26 + 512 2 2 2 K Æ çË o x Å = g¤>Æ Å :K Æ o MR+@&, 1 ÃÃ Ç Ç Å K*K:Æ Æ çË oo É*Ê >´%M|5g¤Å K çMË U ?¾@] bÈ@¥¡8, Å çË aGË|@gh âK=CÆ > o !" Å K:¢ Ë Uo ç Æ $Å çË , ì G|@ Ë r G¡HÌÍM|*91?0@K:Æ ý goh Î M ! |#ö xß ! |5g¤ EWT Ï 0 ]@ LÅ çË KH¡]Æ ¸M¹ o Ë o _ . 0: küÅ KHÆ ç ç Ë _ . 1: l>mÅ Æ çË o ! ’0’ KHÆ çË o xG|@ PM ! Å K:Æ çË oÐ & x9|5@o WDCON.0 – Å H K Æ Æ ! "M"&¥Úê@FK:» Æ 1Mxo »-È , 0©&|1ª g¤Å K:Æ¢MË U çR È g h &Å çMË ²G³ 512 Ë_ú Á1&Å çË o !M " $Ñ , Ò ´% p Å KHÆ çË o 1 3 : D8h 1 2 - 30 - 2 W79E8213 o WDCON&xM¡*Ó¡ 0x0000x0B | WTRF (WDCON.2) y ", ’1’ >Å K:Æ çË o DE &y R x xM ", ’0’ >' ì xy G| WDIF (WDCON.3)Q ä x,|:' ì xo MË PORy ", ’1’ |H' ì _ Ë EWRST (WDCON.1) " , o ’0’°± bL&°¸± ¹M|]DEd dR WDCON ¡ EWRST, WDIF ´ ¨#L uv?] L °± |*ÔÕ>Ö ×bØ TA x o ¡ WDCLR ¡]F>] L TA ef . PWMP Bit: ¬ { 7~0 PWM0 Bit: ¬ { 7~0 PWM1 Bit: ¬ { 7~0 ¼ TA WDCON MOV MOV SETB ORL MOV MOV ORL REG C7H REG D8H TA, #AAH TA, #55H WDCON.0 WDCON, #00110000B TA, #AAH TA, #55H WDCON, #00000010B {}x~ ; To access protected bits ; Reset watchdog timer ; Select 26 bits watchdog timer ; Enable watchdog reset 7 6 5 4 3 2 1 0 PWMP.7 PWMP.6 PWMP.5 PWP.4 PWMP.3 PWMP.2 PWMP.1 PWMP.1 : PWMPL ¢{ o ¡ x o PWMP.[7:0] {}x~ zÎ : D9h . 7 6 5 4 3 2 1 0 PWM0.7 PWM0.6 PWM0.5 PWM0.4 PWM0.3 PWM0.2 PWM0.1 PWM0.1 : PWM0L PWM0.[7:0] PWM 0 {}~ x o zÎ : DAh . 7 6 5 4 3 2 1 0 PWM1.7 PWM1.6 PWM1.5 PWM1.4 PWM1.3 PWM1.2 PWM1.1 PWM1.0 : PWM1L PWM1.[7:0] PWM 1 _ o zÎ : DBh . - 31 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 PWM 5 6}~ Bit: ¬ { 7 1 7 6 5 4 3 2 1 0 PWMRUN Load PWMF CLRPWM PWM3I PWM2I PWM1I PWM0I : PWMCON1 PWMRUN 0: PWM ½o È zÎ : DCh . ¢{ È x o ¡5¡ÚÙêY o , y V Ûx¢{ o ´ÜÙêY o x o ¨ 0: PWMP o Ú ù ²G³] PWMP o ¡5¡ V»¢{ o o ù p © 1: ¢{ ª +! ’0’ | ù ²³#ñ . PWM Ú 0: ½²³ . o Ú ù ²G³ (´&% PWM 8Ö PWM &R ). 1: PWM 10 ¢{ ! PWM ¢{ o o 000H. 1: ! PWM 10 ¢{ ,¥C â +1 ¬Æ ! . ò [³ . 0: PWM3 ò [³ . 1: PWM3 Ýx 1 ò [³ . 0: PWM2 ò [³ . 1: PWM2 Ýx 1 ò [³ . 0: PWM1 ò [³ . 1: PWM1 Ýx 1 ò [³ . 0: PWM0 ò [³ . 1: PWM0 Ýx 1: PWM 6 Load 5 PWMF 4 CLRPWM 3 PWM3I 2 PWM2I 1 PWM1I 0 PWM0I PWM2 {}x~ Bit: ¬ { 7~0 PWM3 Bit: ¬ 7 6 5 4 3 2 1 0 PWM2.7 PWM2.6 PWM2.5 PWM2.4 PWM2.3 PWM2.2 PWM2.1 PWM2.0 : PWM2L PWM2.[7:0] PWM 2 {}x~ x o zÎ : DDh . 7 6 5 4 3 2 1 0 PWM3.7 PWM3.6 PWM3.5 PWM3.4 PWM3.3 PWM3.2 PWM3.1 PWM3.0 : PWM3L - 32 - zÎ : DEh W79E8213 { 7~0 PWM PWM3.[7:0] 5 6}~ Bit: ¬ { PWM 3 _ o . 2 7 6 5 4 3 2 1 0 BKCH BKPS BPEN BKEN PWM3B PWM2B PWM1B PWM0B : PWMCON2 7 BKCH 6 BKPS 5 BPEN 4 BKEN 3 PWM3B 2 PWM2B 1 PWM1B 0 PWM0B Þ ùà *Á ±± PWM 1: P0.2=1 *Á PWM ùÞ Ã ± kü . 0: Á ± l>mM: ß Þ ùà . 1: Á ± ½ à PWM3[³_U 0: *Á Á ± ½ à PWM3[³_ 1: * ± Á ± ½ à PWM2[³_U 0: * ½ à PWM2[³_ 1: *Á ± Á ± ½ à PWM1[³_U 0: * Á ½ à PWM1[³_ 1: * ± ½ à PWM0[³_U 0: *Á Á ± ½ à PWM0[³_ 1: * 0: P0.2=0 ç>è Bit: 0 0 0 1 1 0 1 Á ± r r N ?Z@ Á ± r N > Á ± 6 ½ 6&âãä BKEN : °± È (PWMRUN=0) Ëâ PWMnB"ç PWM ¡H[³*² PWM xÈ (PWMRUN=1) Ë N *Á ± Oç]½ PWM[³ PWMRUN y !M Ð ¬ BKF PWM S, ’0’ | PWM ©ÈÈ 1 7 v: DFh . á { zÎ 5 . . PWM [³½å 4 - 33 - 3 PWMnB, 2 ©È 12æ å T [ ³ 1 . 0 Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 ¬ { 7-0 ADC Bit: ¬ { ACC.7 ACC.6 ACC.5 ACC.4 ACC.3 ACC.2 ACC.1 : ACC ACC.[7:0] ACC 5 6}~ x o ñ zÎ ACC.0 : E0h ¡8éU£ o 8052 7 6 5 4 3 2 1 0 ADC.1 ADC.0 ADCEX ADCI ADCS RCCLK AADR1 AADR0 : ADCCON 7-6 ADC.1-0 10 5 ADCEX =‘0’ ADC £¤¡ 2 . zÎ : E1h , ‘1’êä N ADC ëG| ù E N ( ADC ëG| =‘1’ ¬ ADCS , ‘1’ Q STADC W 1.4 XC'G¡ 4 ADCI ë8 £ °M 룤9ê?Ë ADCI , ‘1’ | D ADC ]x |, ADC &! ‘0’ U6¥:&! ADC ,RU9©» ADC ,t©»9 G U N @½¡ ADC ë . ‘0’ ýR> , ‘1’ |HD@ ‘1’ Ë] N N 3 ADCS ´wx *| ¬ ADCS , ‘1’ & p ì ADC & ëM_9=â Q ä ¡ ADC m , ‘1’ ADC íË ADCS=‘1’ |5& ë> £ ° ADCI , ADCS=‘0’ |5g STADC ^ ¤ ADCS=‘1’ ADCI =‘1’ Ë G N ½M¡ ADC ë . &î g ¤ &" ADCI=0 ¡ËU\ ADCS=1 È *2 p '9¡U½G¡ A/D & ëbï' N G |Cý ð ADCI=0 . ADCS=1 2 RCCLK 0: CPU Ë"ú ADC Ëtú . ä RC Ë"ú ADC Ëtú . 1: Á Þ ùà . 1 AADR1 Þ ùà . 0 AADR0 ADC : ADCI ADCS ADC N 0 0 p ½M¡1 ë ADC ôõ"9 0 1 ë ADC íM 1 0 ë8 £ °M N ½¡5& ëË5` ADCI=0 N 1 1 ë8 £ °M ½¡5& ëË5` ADCI=0 AADR1, AADR0: ñ òóQ R{ : ü . ADC ôHõZö*÷ø ùúûübýHþÜÿ ADCI=0 ADCS=0 ò ó AADR2 AADR1 AADR0 0 0 ]S½ ¬ ADCS AD0 (P0.3) 0 - 34 - W79E8213 ADC Bit: !"# 7-0 ADC Bit: !"# 7-6 0 0 1 AD1 (P0.4) 0 1 0 AD2 (P0.5) 0 1 1 AD3 (P0.6) 1 0 0 AD4 (P0.2) 1 0 1 AD5 (P0.1) 1 1 0 AD6 (P0.0) 1 1 1 AD7 (P0.7) 7 6 5 4 3 2 1 0 ADC.9 ADC.8 ADC.7 ADC.6 ADC.5 ADC.4 ADC.3 ADC.2 : ADCH &' (*) ADC.[9:2] 01* ADC +-,-./ $% : E2h . 1 7 6 5 4 3 2 1 0 ADCLK.1 ADCLK.0 - - - AADR2 - - : ADCCON1 &' ADCLK.1~0 (*) 24356 : 10 7 ADC 24389: : E3h ADC 200KHz ~ 5MHz. . 243;< ADCLK.1 ADCLK.0 ADC 0 0 ADCCLK/1 0 1 ADCCLK/2 1 0 ADCCLK/4 ( 1 1 ADCCLK/8 Note: 5-3 - HJI 2 AADR2 ADC 1-0 - MNOP $% HJI . ?-@*A KL56 ADCEN (ADCEN = 0) B*CDE ADC => ) GF . . . 1 - 35 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 Bit: !"# 6 5 4 3 2 1 0 EED EPWMUF EPWM EWDI - - - - : EIE &' 7 6 5 4 3 2 1 0 B.7 B.6 B.5 B.4 B.3 B.2 B.1 B.0 6 EPWMUF 5 EPWM EWDI Bit: !"# :B 0: () klm-nop 7-0 B.[7:0] uwv ADC xy z{ Bit: !"# 7 : E8h - EED 3-0 (*) $% QRSTUVGWX 1: Y-ZSTUVGWX . 0: QR PWM [\JWX . 1: Y-Z PWM [\JWX . 0: QR PWM [\JWX^]`_abced 1: Y-Z PWM [\JWX^]`_abced 0: QRfhgjiWX . 1: Y-ZfhgjiWX . HJI . 7 4 B 7 &' 8052 Wq4r !*st m . . $% : F0h . 7 6 5 4 3 2 1 0 PADIDS.7 PADIDS.6 PADIDS.5 PADIDS.4 PADIDS.3 PADIDS.2 PADIDS.1 PADIDS.0 : PADIDS &' PADIDS.7 (*) P0.7 => QR 0: PADIDS.6 5 PADIDS.5 . . ~ 7 |}KL . P0.6 |}KLQR7 . 0: => . 1: QR ADC ~ 3 |}KL . P0.5 |}KLQR7 . 0: => . 1: QR ADC ~ 2 |}KL . 1: 6 |}KLQR7 ADC - 36 - $% : F6h W79E8213 4 PADIDS.4 P0.4 = > 1: QR 0: 3 PADIDS.3 2 PADIDS.2 1 PADIDS.1 0 PADIDS.0 MN Bit: !"# |}KLQR7 . . ~ 1 |}KL . P0.3 |}KLQR7 . 0: => . 1: QR ADC ~ 0 |}KL . P0.2 |}KLQR7 . 0: => . 1: QR ADC ~ 4 |}KL . P0.1 |}KLQR7 . 0: => . 1: QR ADC ~ 5 |}KL . P0.0 |}KLQR7 . 0: => . 1: QR ADC ~ 6 |}KL . ADC 1 7 6 5 4 3 2 1 0 PEDH PPWMH PBKH PWDIH - - - - : IP1H &' (*) $% : F7h 3-0 - STUVGWX - . 1: PWM WX - . 1: PWM bcJWX - 1: fhgjiWX . HJI . Bit: 7 6 5 4 3 2 1 0 PED PPWM PBK PWDI - - - - 7 PEDH 6 PPWMH 5 PBKH 4 PWDIH MN !"# 7 : IP1 &-' PED 1: (*) 1: STUVGWX- . $% : F8h . - 37 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 3-0 - PWM WX- . 1: PWM bcJWX- 1: fhgjiWX . HJI . Bit: 7 6 5 4 3 2 1 0 !"# - - BUZDIV.5 BUZDIV.4 BUZDIV.3 BUZDIV.2 BUZDIV.1 BUZDIV.0 6 PPWM 5 PBK 4 PWDI * 01* : BUZCON &' 7-6 - 5-0 BUZDIV 1: * ( ) HJI . m 567 . : Fbuz = Fcpu x 1/[(256)x(BUZDIV + 1)] - 38 - $% : F9h W79E8213 9 8032 - m Wqeq J¡j eq4¢-Z-£4¤ o¥ 7¦§¨7eq4©*ª«¬ o p m q ®e¯¡j° n eq24± l²-³´Gµ¶·-n 2¸-¹Gº£4»¼ W79E8213 ½ ¸G243¾¿-À¼¸Á m ¾¿*£4 op 8032½ 12¸J243¾¿-À¼¸Ãľ¿G¡Å_ W79E8213 ½¸ Á m ¾¿Æ¼¸ÇÈ-É*£Â op 8032 ½¸Á m ¾¿ 2¸ÇÈÉG¡ qjÊ ²-ËhÌÍË ½¸Á m ¾¿Æ¼t ¸ÇÈÉG£ºÎ¤ÏÐ| ÑÒÄÁ m ¾¿|Ó W79E8213 Ô q4ÕÉ|| Ö×®h¯¡Â-¤ ËØ +-ÓÙÚ- J£ÛÜ ¼¸- ¾¿ÚÞÝjßà-áeq4â±$-%J¡4ãä-å ÑÒ£ W79E8213 æçJèéÇÓêëGq¾¿£-ºÂìèíq4î< . W79E8213 8032 4 Op-code HEX Code Bytes W79E8213 Machine Cycle W79E8213 Clock cycles 8032 Clock cycles W79E8213 vs. 8032 Speed Ratio NOP 00 1 1 4 12 3 ADD A, R0 28 1 1 4 12 3 ADD A, R1 29 1 1 4 12 3 ADD A, R2 2A 1 1 4 12 3 ADD A, R3 2B 1 1 4 12 3 ADD A, R4 2C 1 1 4 12 3 ADD A, R5 2D 1 1 4 12 3 ADD A, R6 2E 1 1 4 12 3 ADD A, R7 2F 1 1 4 12 3 ADD A, @R0 26 1 1 4 12 3 ADD A, @R1 27 1 1 4 12 3 ADD A, direct 25 2 2 8 12 1.5 ADD A, #data 24 2 2 8 12 1.5 ADDC A, R0 38 1 1 4 12 3 ADDC A, R1 39 1 1 4 12 3 ADDC A, R2 3A 1 1 4 12 3 ADDC A, R3 3B 1 1 4 12 3 ADDC A, R4 3C 1 1 4 12 3 ADDC A, R5 3D 1 1 4 12 3 ADDC A, R6 3E 1 1 4 12 3 ADDC A, R7 3F 1 1 4 12 3 ADDC A, @R0 36 1 1 4 12 3 ADDC A, @R1 37 1 1 4 12 3 ADDC A, direct 35 2 2 8 12 1.5 - 39 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 ADDC A, #data 34 2 2 8 12 1.5 SUBB A, R0 98 1 1 4 12 3 SUBB A, R1 99 1 1 4 12 3 SUBB A, R2 9A 1 1 4 12 3 SUBB A, R3 9B 1 1 4 12 3 SUBB A, R4 9C 1 1 4 12 3 SUBB A, R5 9D 1 1 4 12 3 SUBB A, R6 9E 1 1 4 12 3 SUBB A, R7 9F 1 1 4 12 3 SUBB A, @R0 96 1 1 4 12 3 SUBB A, @R1 97 1 1 4 12 3 SUBB A, direct 95 2 2 8 12 1.5 SUBB A, #data 94 2 2 8 12 1.5 INC A 04 1 1 4 12 3 INC R0 08 1 1 4 12 3 INC R1 09 1 1 4 12 3 INC R2 0A 1 1 4 12 3 INC R3 0B 1 1 4 12 3 INC R4 0C 1 1 4 12 3 INC R5 0D 1 1 4 12 3 INC R6 0E 1 1 4 12 3 INC R7 0F 1 1 4 12 3 INC @R0 06 1 1 4 12 3 INC @R1 07 1 1 4 12 3 INC direct 05 2 2 8 12 1.5 INC DPTR A3 1 2 8 24 3 DEC A 14 1 1 4 12 3 DEC R0 18 1 1 4 12 3 DEC R1 19 1 1 4 12 3 DEC R2 1A 1 1 4 12 3 DEC R3 1B 1 1 4 12 3 DEC R4 1C 1 1 4 12 3 DEC R5 1D 1 1 4 12 3 DEC R6 1E 1 1 4 12 3 DEC R7 1F 1 1 4 12 3 DEC @R0 16 1 1 4 12 3 DEC @R1 17 1 1 4 12 3 - 40 - W79E8213 DEC direct 15 2 2 8 12 1.5 DEC DPTR A5 1 2 8 24 3 MUL AB A4 1 5 20 48 2.4 DIV AB 84 1 5 20 48 2.4 DA A D4 1 1 4 12 3 ANL A, R0 58 1 1 4 12 3 ANL A, R1 59 1 1 4 12 3 ANL A, R2 5A 1 1 4 12 3 ANL A, R3 5B 1 1 4 12 3 ANL A, R4 5C 1 1 4 12 3 ANL A, R5 5D 1 1 4 12 3 ANL A, R6 5E 1 1 4 12 3 ANL A, R7 5F 1 1 4 12 3 ANL A, @R0 56 1 1 4 12 3 ANL A, @R1 57 1 1 4 12 3 ANL A, direct 55 2 2 8 12 1.5 ANL A, #data 54 2 2 8 12 1.5 ANL direct, A 52 2 2 8 12 1.5 ANL direct, #data 53 3 3 12 24 2 ORL A, R0 48 1 1 4 12 3 ORL A, R1 49 1 1 4 12 3 ORL A, R2 4A 1 1 4 12 3 ORL A, R3 4B 1 1 4 12 3 ORL A, R4 4C 1 1 4 12 3 ORL A, R5 4D 1 1 4 12 3 ORL A, R6 4E 1 1 4 12 3 ORL A, R7 4F 1 1 4 12 3 ORL A, @R0 46 1 1 4 12 3 ORL A, @R1 47 1 1 4 12 3 ORL A, direct 45 2 2 8 12 1.5 ORL A, #data 44 2 2 8 12 1.5 ORL direct, A 42 2 2 8 12 1.5 ORL direct, #data 43 3 3 12 24 2 XRL A, R0 68 1 1 4 12 3 XRL A, R1 69 1 1 4 12 3 - 41 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 XRL A, R2 6A 1 1 4 12 3 XRL A, R3 6B 1 1 4 12 3 XRL A, R4 6C 1 1 4 12 3 XRL A, R5 6D 1 1 4 12 3 XRL A, R6 6E 1 1 4 12 3 XRL A, R7 6F 1 1 4 12 3 XRL A, @R0 66 1 1 4 12 3 XRL A, @R1 67 1 1 4 12 3 XRL A, direct 65 2 2 8 12 1.5 XRL A, #data 64 2 2 8 12 1.5 XRL direct, A 62 2 2 8 12 1.5 XRL direct, #data 63 3 3 12 24 2 CLR A E4 1 1 4 12 3 CPL A F4 1 1 4 12 3 RL A 23 1 1 4 12 3 RLC A 33 1 1 4 12 3 RR A 03 1 1 4 12 3 RRC A 13 1 1 4 12 3 SWAP A C4 1 1 4 12 3 MOV A, R0 E8 1 1 4 12 3 MOV A, R1 E9 1 1 4 12 3 MOV A, R2 EA 1 1 4 12 3 MOV A, R3 EB 1 1 4 12 3 MOV A, R4 EC 1 1 4 12 3 MOV A, R5 ED 1 1 4 12 3 MOV A, R6 EE 1 1 4 12 3 MOV A, R7 EF 1 1 4 12 3 MOV A, @R0 E6 1 1 4 12 3 MOV A, @R1 E7 1 1 4 12 3 MOV A, direct E5 2 2 8 12 1.5 MOV A, #data 74 2 2 8 12 1.5 MOV R0, A F8 1 1 4 12 3 MOV R1, A F9 1 1 4 12 3 MOV R2, A FA 1 1 4 12 3 MOV R3, A FB 1 1 4 12 3 MOV R4, A FC 1 1 4 12 3 MOV R5, A FD 1 1 4 12 3 - 42 - W79E8213 MOV R6, A FE 1 1 4 12 3 MOV R7, A FF 1 1 4 12 3 MOV R0, direct A8 2 2 8 12 1.5 MOV R1, direct A9 2 2 8 12 1.5 MOV R2, direct AA 2 2 8 12 1.5 MOV R3, direct AB 2 2 8 12 1.5 MOV R4, direct AC 2 2 8 12 1.5 MOV R5, direct AD 2 2 8 12 1.5 MOV R6, direct AE 2 2 8 12 1.5 MOV R7, direct AF 2 2 8 12 1.5 MOV R0, #data 78 2 2 8 12 1.5 MOV R1, #data 79 2 2 8 12 1.5 MOV R2, #data 7A 2 2 8 12 1.5 MOV R3, #data 7B 2 2 8 12 1.5 MOV R4, #data 7C 2 2 8 12 1.5 MOV R5, #data 7D 2 2 8 12 1.5 MOV R6, #data 7E 2 2 8 12 1.5 MOV R7, #data 7F 2 2 8 12 1.5 MOV @R0, A F6 1 1 4 12 3 MOV @R1, A F7 1 1 4 12 3 MOV @R0, direct A6 2 2 8 12 1.5 MOV @R1, direct A7 2 2 8 12 1.5 MOV @R0, #data 76 2 2 8 12 1.5 MOV @R1, #data 77 2 2 8 12 1.5 MOV direct, A F5 2 2 8 12 1.5 MOV direct, R0 88 2 2 8 12 1.5 MOV direct, R1 89 2 2 8 12 1.5 MOV direct, R2 8A 2 2 8 12 1.5 MOV direct, R3 8B 2 2 8 12 1.5 MOV direct, R4 8C 2 2 8 12 1.5 MOV direct, R5 8D 2 2 8 12 1.5 MOV direct, R6 8E 2 2 8 12 1.5 MOV direct, R7 8F 2 2 8 12 1.5 MOV direct, @R0 86 2 2 8 12 1.5 MOV direct, @R1 87 2 2 8 12 1.5 - 43 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 MOV direct, direct 85 3 3 12 24 2 MOV direct, #data 75 3 3 12 24 2 MOV DPTR, #data 16 90 3 3 12 24 2 MOVC A, @A+DPTR 93 1 2 8 24 3 MOVC A, @A+PC 83 1 2 8 24 3 MOVX A, @R0 E2 1 2-9 8 - 36 24 3 - 0.66 MOVX A, @R1 E3 1 2-9 8 - 36 24 3 - 0.66 MOVX A, @DPTR E0 1 2-9 8 - 36 24 3 - 0.66 MOVX @R0, A F2 1 2-9 8 - 36 24 3 - 0.66 MOVX @R1, A F3 1 2-9 8 - 36 24 3 - 0.66 MOVX @DPTR, A F0 1 2-9 8 - 36 24 3 - 0.66 PUSH direct C0 2 2 8 24 3 POP direct D0 2 2 8 24 3 XCH A, R0 C8 1 1 4 12 3 XCH A, R1 C9 1 1 4 12 3 XCH A, R2 CA 1 1 4 12 3 XCH A, R3 CB 1 1 4 12 3 XCH A, R4 CC 1 1 4 12 3 XCH A, R5 CD 1 1 4 12 3 XCH A, R6 CE 1 1 4 12 3 XCH A, R7 CF 1 1 4 12 3 XCH A, @R0 C6 1 1 4 12 3 XCH A, @R1 C7 1 1 4 12 3 XCHD A, @R0 D6 1 1 4 12 3 XCHD A, @R1 D7 1 1 4 12 3 XCH A, direct C5 2 2 8 12 1.5 CLR C C3 1 1 4 12 3 CLR bit C2 2 2 8 12 1.5 SETB C D3 1 1 4 12 3 SETB bit D2 2 2 8 12 1.5 CPL C B3 1 1 4 12 3 CPL bit B2 2 2 8 12 1.5 ANL C, bit 82 2 2 8 24 3 ANL C, /bit B0 2 2 6 24 3 ORL C, bit 72 2 2 8 24 3 ORL C, /bit A0 2 2 6 24 3 MOV C, bit A2 2 2 8 12 1.5 - 44 - W79E8213 MOV bit, C 92 2 2 8 24 3 ACALL addr11 71, 91, B1, 11, 31, 51, D1, F1 2 3 12 24 2 LCALL addr16 12 3 4 16 24 1.5 RET 22 1 2 8 24 3 RETI 32 1 2 8 24 3 AJMP ADDR11 01, 21, 41, 61, 81, A1, C1, E1 2 3 12 24 2 LJMP addr16 02 3 4 16 24 1.5 JMP @A+DPTR 73 1 2 6 24 3 SJMP rel 80 2 3 12 24 2 JZ rel 60 2 3 12 24 2 JNZ rel 70 2 3 12 24 2 JC rel 40 2 3 12 24 2 JNC rel 50 2 3 12 24 2 JB bit, rel 20 3 4 16 24 1.5 JNB bit, rel 30 3 4 16 24 1.5 JBC bit, rel 10 3 4 16 24 1.5 CJNE A, direct, rel B5 3 4 16 24 1.5 CJNE A, #data, rel B4 3 4 16 24 1.5 CJNE @R0, #data, rel B6 3 4 16 24 1.5 CJNE @R1, #data, rel B7 3 4 16 24 1.5 CJNE R0, #data, rel B8 3 4 16 24 1.5 CJNE R1, #data, rel B9 3 4 16 24 1.5 CJNE R2, #data, rel BA 3 4 16 24 1.5 CJNE R3, #data, rel BB 3 4 16 24 1.5 CJNE R4, #data, rel BC 3 4 16 24 1.5 CJNE R5, #data, rel BD 3 4 16 24 1.5 CJNE R6, #data, rel BE 3 4 16 24 1.5 CJNE R7, #data, rel BF 3 4 16 24 1.5 DJNZ R0, rel D8 2 3 12 24 2 DJNZ R1, rel D9 2 3 12 24 2 DJNZ R5, rel DD 2 3 12 24 2 DJNZ R2, rel DA 2 3 12 24 2 - 45 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 DJNZ R3, rel DB 2 3 12 24 2 DJNZ R4, rel DC 2 3 12 24 2 DJNZ R6, rel DE 2 3 12 24 2 DJNZ R7, rel DF 2 3 12 24 2 DJNZ direct, rel D5 3 4 16 24 1.5 TABLE 9-1: INSTRUCTION SET FOR W79E8213 - 46 - W79E8213 h ï ðwñò ¤ W79A8213 ÑÒ n ¼¸ôõ · qö÷J£4¤ Ë Ú-øùJq4úûÑüý*2qÚþÿ-Àõ · ¡ Ô G 24ó ÚþÒ W79A8213 op 8032² 24±åeq ³´ ¡ ² W79A8213 GW4½¸Á m ¾¿ n 4¸ 243¾¿ n ¼¸t qj§¨e¡ºÎ¼¸Á m ¾¿ Ì 4¸-Gq§¨ C1 C2 C3 C4 243 ¾¡ ¿ÌÍË £4½½¸J Ë 50% £Ý e*q2åVý J¡ è£eÝ23Jq 2¸ Ø STÚ Ë a2±J¡ºÎJ243Gqjé !#"%$ Ò& W79A8213 ½¼¸Á m ¾¿'¼(*)+,ÇÕ-ÉG£º4ΤÏÐ| ÑÒG£ hqÁ m ¾-¿ Õ-É+hWq4}-|®Þ¯¡í/.10- 256 ¸ÕÉ+e£4ÄhW 128 ¸ n2 ¾-¿- Þ¡º4Î ² W79A8213 eW4-¼3Jq4 -Û ² 4 ¸e23-¾¿ -«54J¡¤GÐ|16-}-- -Ñ-ÒJ£ hq ¾¿ n 2¸Á m ¾¿e¡° *À¼¸}--°¾¿ n 2¸J23¾¿Jq8759 µ ¼¸/: · ö ´;< q4- n MOVX £ ²op 8032 W>=Jq ¾¿@?À 2 ¸Á m ¾¿ . ° ² W79A8213 GW>=Jq4 ¾¿A À 2-9 ¸Á m ¾¿J¡ RD Ó WR BC ®Deq E ¡>F*ÀÚþGIH 5J1KLMNÑJè4úOG£8P :YÚQ-_eq_R5S8TJ£ æçeèøùU1Ve¡8W[eq4- hq4Á m ¾-¿|ÖXAÞÝ n 3 ¸J£ 4 ¸e£ 5 ¸Þ¡ ;< ² W79A8213 hWY Ë * *}5-G| Öq*P ¯-£*0 5 Z5[\hq h£Â o*p 8032 WÆ* 3 Z* [ \J¡° n W79E8213 JW4½ 4¸J23¾¿À¼¸Á m ¾¿*£ÂP nop 8032 W4½ 12¸J23¾¿À¼¸ Á m ¾-¿e¡ºÎ]/^- Z[ÜGÐ-£ W79A8213 eWq- -5 · o-p 8032 1.5-3 _Þ¡ ] Ý 243¾¿ßàhd . 9.1 Single Cycle C1 C2 C3 C4 CPU CLK ALE PSEN A7-0 AD<7:0> Data_ in D7-0 Address A15-8 Address <15:0> ` 9-1: - 47 - 2 ¾¿ Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 Operand Fetch Instruction Fetch C1 C2 C3 C4 C1 C2 C3 C4 CPU CLK ALE PSEN PC AD<7:0> Address<15:0> OP-CODE Address A15-8 ` 9-2: Instruction Fetch C1 PC+1 C2 Address A15-8 6¾¿ G24± Operand Fetch C3 C4 C1 OPERAND C2 C3 Operand Fetch C4 C1 C2 C3 C4 CPU CLK ALE PSEN AD<7:0> Address<15:0> A7-0 OP-CODE A7-0 Address A15-8 ` OPERAND Address A15-8 9-3: 3 ¾¿ G24± - 48 - A7-0 OPERAND Address A15-8 W79E8213 Instruction Fetch C1 C2 C3 Operand Fetch C4 C1 C2 C3 Operand Fetch C4 C1 C2 C3 Operand Fetch C4 C1 C2 C3 C4 CPU CLK ALE PSEN AD<7:0> A7-0 Address<15:0> A7-0 OP-CODE Address A15-8 Address A15-8 ` Instruction Fetch C1 C2 C3 C4 9-4: 4 C2 C3 A7-0 OPERAND Address A15-8 OPERAND Address A15-8 ¾¿ G24± Operand Fetch C1 A7-0 OPERAND Operand Fetch C4 C1 C2 C3 C4 Operand Fetch C1 C2 C3 C4 Operand Fetch C1 C2 C3 C4 CPU CLK ALE PSEN AD<7:0> A7-0 OP-CODE A7-0 OPERAND A7-0 OPERAND A7-0 OPERAND A7-0 OPERAND Address<15:0> Address A15-8 Address A15-8 Address A15-8 Address A15-8 Address A15-8 ` 9-5: 5 ¾¿ G24± - 49 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 abdcfe ! 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Mr y j «¬ 1 1 2 26 2 26 + 512 43 A ! ! e ¶ 3 My /y0G1~ 4p+ ’1’ M/ WDIF WDCON.3 – Mr /y ¤¥A (IE1.4)=’1’ ~ <= ( ýѤ¥+ ’1’ªÒ¥Z[B} ) £8>é ,Z[4é Ë - ’0’ ! ! ª A K Ò®4é ¶ r¦ WDRF A r ` Ô £8 WDCON.2 KL A Ó M~jr\ dy Õ)-/.1 ± ²éM ¶ :/¿y -é . 4+ 3 ’1’EWDRST = 0~ r /y ! jÖ/ /y ! é Ë> p 1 yË>Mr#y ! éÔp 0 øq A Ô4~¿ EWRST: WDCON.1 ÓrM ! yMr y > ¶ A A ! ! ¶ 4 3 WDCON.0 #y é Ò4-/.Mr #y ©:[> é )WDCLR – :M¹ × ~ ! £ú 8 ª A 4^z 1ª "~# ]i *):[+ ! 0 × M¹¶ y ! Ë ~1®4º ! £8 M¹ /y 0G1 512{ yl ²:S¹ #y - ~ ¯Ø: <>= {M #y é . 15.1 ÊÌËÍÏÎÏÐ ÊÌËÍÏÎÏÐ üÙ r" #/ª y ! ³´ÐÑrD 2ÒÐÑMr#y ! 0 ! 1¼ yé /y 01©dà { yl \>=# â S¹0G1y W 217 {#yl~W>pKGVL 01y WDRUN, WD0, WD1, EWRST, WDIF yjbSdc a c rDÌ! ¼XT£8ù ^D> ! jÚ4pdCÏ>/~[: WDCLR `# ¼ TÅø Ï ø q~ ¨)S¹/y 15.2 WD1, WD0: WDCON.5, WDCON.4 – 512 - 63 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 ÆÛyÜÞÝbßyà ] ¨z¡ ¥ád§Ô4~ G/y ! ~h¯ 3 ROM· LY4ohâ¹~ U©K ¸ ¶W ä À4Á/~¯² / ± W79E8213 ²é /~D4 ]iQûfú4ûbjC r Üã~Åø ÙÚ ^MW y ! W (¡ ~üË]iÍÎ rQû, nåX/ p Ü ãD#~ W7E8213 ]¨ 1ÌÜã ~ D Ï¡ h^ 4Î DÌÜ ã yjbWSc·²d¡´¨ DÌ ´ ~ sÜ ã1rbM1c `/y a !4"C # & 4^d!Î#"~1# ®>º/ª yjærtçvñ#~ ¯ ¹ 3{ ~yjær t*)4øq Ød ^ ÎÅõ 7856 y~yjæ! rt ñ o 3{ C v!/ ñ ¨ y ært>~ TA ^z AAH ~ 4^z 55H TA ! 1¢£ C7H ~ ¨/1 ¡ yj bMc èé ï j§> ! TA TA REG 0C7h ; ê C7H b 16 MOV MOV TA, #0Aah TA, #055h £8ú TA^z Aahª ~4 ! ñò/~ ! ¶ U 3{ !"# ë` 55h ; 3 3{ 4! "# ëì# F 55h,®4º#yæÆtÂsvñ#yjært²ñdo 3{ !"# ~ # Òã KML ¡ sÜã1 ¨ #^ í/yjæÏt øÏq~c®>ºC鯬mbMcsÜãÏc yjbMc «îï î 1 czõbMc m : M/C = !"# MOV TA, #0Aah 3 M/C MOV TA, #055h MOV WDCON, #00h î 2c zõbMc MOV TA, #0Aah MOV TA, #055h NOP SETB EWT 3 M/C 3 M/C 3 M/C 3 M/C 1M/C 2 M/C î czõbMc 3 MOV TA, #0Aah 3 M/C MOV TA, #055h 3 M/C ORL WDCON, #00000010B 3M/C - 64 - W79E8213 î 4c zõbMc MOV TA, #0Aah MOV TA, #055h NOP 1 M/C NOP 1 M/C CLR POR î 5 ÅõbMc MOV TA, #0Aah NOP MOV TA, #055h SETB EWT 3 M/C 3 M/C 2 M/C 3 M/C 1 M/C 3 M/C 2 M/C ª2{¨ îïG~ ¡ s4ܶ ã¡ r^ 3{ !>3 "# L WaÏjî 3 !¡ "Ü# ã¡ r^>Ψ yXbæÆt øq ~¿y>r sÜã1<4=õ î 4 >Ó 4{ sÜã ^d4Î#~¾ ¿4^dÎðfÅ4õ . - 65 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 ñ{òyóÌôöõl÷ 2 ]/L ¨#zÒ øbùb©/¸údù û A ÔG ~ { tubøùø ,bùbûüëF The W79E8213 ]#¨ zGKG ] ¨ r ® hw<={ ~ ûÒ CPUE±²%³´,4}~1³´ W79E8213 ¯ ° ½ KGL n ED0EN !M£ Ë . ~ ® > < = / ~ ED2EN ¢ EDIC P1.0-1.2. ýdùûÔ> þÿ \ n EDxTRG (EDIC) | .ý¯ ÿ ÿ \ . 4 |uÔ> . 17 (for Clk = Fosc filter type), 2 (for Clk = Fosc/2 filter type), 4 8 (for Fosc/8 filter type). !+*,-. ( ! #/0)1 +2,-345 5 .EDF 798:; 15 "!#<&!7> =) #:?@ .$&A% B'!C(*DF) EHGI P1.0-1.2. % J . 1 filter type) K 17-1: L M +!,<- - 66 - (for Fosc/4 (EDF) /!6 K W79E8213 17-2: L M + N - 67 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 Q O PRTS W n FX I/OYZJ9[ 6 \ D&E>] ^=:[6 _ 4`abdce@ P1.5&f # P1.5!g [6_ W79E8213 hi 5 ) FUj V #lMCU m k #lo6p q h<[m 6 n 1 r s RPD=0 t<$ uvwxzy W79E8213 UV MCU{| " } t $ u & ~ y P1.5[6 # W79E8213 UV MCUDFE>{| 18" I/O I/OY2J9o6 15 I/O RC . 18 I/O PxM1.y PxM2.y 0 0 0 1 1 0 Z9 & mn ( ) mn P2M1.PxS=0, TTL P2M1.PxS=1, Schmitt 1 l 1 mn Y0J [ 6 5 [6 _ i 5 m& # i 5 ) W Jz) D&E}]^ CONFIG1 r s+& X PRHI m n &*XzYZ > mF#z Y2mF k % j b j P2M1 rlls ¨ !X ENT0 ENT15 DE¢¡£¤ j J P1.5 j j } ¥ ¦ 1 # 7>¤ 0 ¤ 1 Xz¤ § 5 ¤!« ¬ 0 ¤ m n m n # n ¯ EH] ¬ ^ hlP2M1 rl+ s FX m P(n)S W79E8213g UVX¢© ª " I/O YZJ9D&« TTL }® n ' ± °FmX}YZJ j¢± mFH¥ ¦ j¢¢± $u~F RC vwy h jz± ²j # 0# 1# 2 P(n)S 6 1 #zjz # ~& RC vwyX 1/4 P2.0(XTAL2) DEH[ 6_ 18-1: I/O Note: During power-on-reset, all port pins will be tri-stated. However, PWM pins will be tr-stated longer until cpu clock is stable. ³&´¶µ·¹ ¸z º&»F¼&½ 5 i ` # mzÀ 3 X 8051ªÁ# ` DFE>ÂÃu Ä mn * ¾ H ¢ # W F } X 2 Y ¿ J \ MCU l g l mF<h Ê Ë!X}ÌÍ%lÎD&E>ÏÐÊËXzÑFHÒ# " . %<ªÓ Ô m mF #zÅ ÆÇÈlÉ[ 6 }ÅFÕX × Ø * J¿ 3"¾ l# EHÖ° Å!ÕX}° uF " 3" ¾ g ¾ }”á # â“Ùã ¾ ” “ Ù¾ ” “Ë¾ä ”$Ú “0”ÛÜj¢Ý ± “1” ÛÜ ÊÞ!#z Ö° “ Ë Þg mß à °h u& YZmJ}) ¾ ßå 2mF " CPU ¾ “0” Ý “1” X¢ÛÜ!#<˾ n YZ “1” ê |(Y0æ¢J Ë“0”’. J F > ® ç ® “ Ù¾ ” å #¢è * J¿ÏÐ&HÒ é| mn Y2J9ê| “1” j # “ Ù¾ ” å t mn Y2J¿ê| “0” j # “ Ù¾ ” (æ Ù¾ ÏÐë ì íX HÒê |) Åîïðñ& * Y2J¢X¢[ 6 18.1 g - 68 - W79E8213 K 18-1: * [ 6 ·ô¸¢º*» ¼*½ ö hlâ ãm! õ [ 6ò!(Fó& æ>WFX}¾ Ä v÷¾ l# l Y2J¿[ 6 18.2 K 18-2: . m ø* ùF·ô¸¢º*»¼* ½ m m ö 0 m þ 7 2" ˾ , ª" ú ! _ #zg DFEHÏÐû h j ü X} Ò ý 2 ê ÿ “ Ë ¾ # 2 Y J9ê | # “ Ë ¾ ” ª  å ÏÐ&HÒ Y J [ “ Ù¾ ” “ Ù¾ ” 6 K 18.3 - 69 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 K 18-3: m ¼*½ h m n mF YZJç[« 6 ¬ _ mn` #l k+% Ä rls TTL >® mn . 18.4 - 70 - W79E8213 UV D*E}] ^ PxM1.y PxM2.y W79E8213 , o6# ~& RCy UjzV± Ï m Ð n 3" «y m n « m } n CONFIG rs (CONFIG0) « « m n ¥ ¦ DFEH{| Ú 4MHz Ý 20MHz # #zv w Fx¢y y x¢yy Å ÆÇ&¢F . 19 W79E8213 19-1: yl $ "¥!¦ # 5 [ 6 ) # g FOSC1 # FOSC0 = ~F j RCyl ¤ 10MHz/20MHz +/- 2% ( ]^ mCONFIG1.FS1 ¢ j ± DE}Ú P2.0 (XTAL2) . 01H ~F RC y¡£# !# j j¢±² 19.2 %'&)(+* g FOSC1, FOSC0 = 11b mn j}± # ¥ ¦,.-z 4Hz Ý 20MHz jz± # (XTAL1) D&EHÚ vw F m DFEHÚ P2.0 (XTAL2) j± m . %*# g«F¬ ~ RC y*F&vw j± mn «" j # h0/ $ W79E8213 UV MCU {*| 5 mF ¾ m& jz± # W79E8213 ENCLK j<$ ± XTAL2/CLK 34 kÇ yU V y v w o 1X.Õ 526 #<] ^ j<P2M1 ± m&¢r¥s¦h X 1/4 ö h 8 / 7+9 }Ò5.6 = CPU z j ± ¢ j ± z j ± 8 j j¢± m n m m n m Å ÆÇ #zDEH : 5+6 ; ( < }vw D&E 19.1 K RC - 71 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 >@?ACB m! m pN . u D { E |. p N . p N m ]^ P1.0 (BUZ) J . ]^ $m% }BUZE W79E8213 (SFR AUXR1.1) 5 ¥ ¦ DFE>]^ %r<s BUZCON # BUZDIV X¢o ¤GFH; . 20 K 20-1: pN m I+J mFH¥ ¦+K : Fbuz = Fcpu x 1/[256x(BUZDIV+1)] ] ^o ¤ BUZDIVLM c NPO>X CPU ¥ ¦ f 1953Hz 3906Hz X IJ m¢¥ ¦ - 72 - W79E8213 Frequency, Fcpu (Hz) Division /256 4000000 6000000 8000000 10000000 11000000 12000000 15625 23437.5 31250 39062.5 42968.75 46875 20000000 78125 1 . 4 3906.25 5 6 3906.25 7 8 1953.125 3906.25 9 10 3906.25 11 12 3906.25 1953.125 3906.25 BUZDIV + 1 13 14 15 16 1953.125 17 18 19 20 1953.125 3906.25 21 22 1953.125 23 24 1953.125 25 . 40 1953.125 . 64 - 73 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 h { | IJ # " I+J mQá ( ñ Xz! E RS TUV / ABW Ä I+J À I+Jj ( X ¤ PRHI=1): j , P1.0/BUZ h ; 1) power on + I J <u E . %r<>s P1.0 ? u DYZ [ m!lh ; ;. I+J > <u 2) \ ]^ . I+J ; + I J > <u 5 6 BUZE 6 E . %rs 5 ; to push out the buzout. 5 ; P1.0 <For active low buzzer> BUZE 6 3) 5 ( I+J ; I+J > <u ? E . 5 %rs ? BUZE I+J > <u 6 BUZE 5 P1.0 uDYZ [ m!lh - 74 - . ; W79E8213 _.`Pabcd 21.1 egfGhi ¾²&>GI . %Ä3u4 GI& ² kj¾l ÝGmjG I DEWÄ!Xon pF POF (PCON.4)o6 “1”V pq ¾ l POF 7ç=: ?@ . 21.2 r'sthi mj G I . % G I* ² oj tu «Ý ¬ mj*ö jv#w xyhz Ä Ï Ð*ö ²{| W79E8213 U Vg } 2 "mu j G « I ¬ v #7 BOV ([ 6 1.4) BOV =0m jv 3.8V # BOV = 1mjv K h 2.5V j Ý Xv #8m j~ I /GI ê|ÂÝ VDD lÝGm jG I&kj*E>¾8m j GI . 21 K m3j4 GI 5 K .+ i 5 , m+j Gö I Í BOD (AUXR.6) # BOF (PCON.5) D2 E +m j 5 h# / BOF +!,z- EA6 (IE.7) ê / û ¢7 =¢X :G?I @ # 6 8 # m j G I 6 BOI (AUXR1.5) “1” EBO (IE.5) ’1’. mj!# VDD u j 50mV/us #¢¾l j 2mV/us. 21-1: - 75 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 )g (PWM) , } 4" PWMm ]# , PWM×Ø 7 PWM0(P0.1) PWM1(P1.6) ,m PWM2 (P1.7) W79E8213 UV g PRHI 6 “1” # i 5 PWM" m ] h ’1’ t g PRHI 6 “0” # i 5 PWM©" and PWM3 (P0.0). F m h ö ] 2Hw # K Xz ð ñ/Å% áF }w mF [ ö Ç PWM ) m ’1’ 8YZ PRHI=0 ú “1” # N PWM ) “1” # 5 PWM !#X jz±² h H ; jz± . PWM jz± = F × ¥ . W79E8213 UV{| 10- g § *X8/O ÍÚ !rs& ]^o¤ ¥ FP[1:0] PWMCON3[3:2]. 5 T ¦ T h PWM X f = F / (PWMP+1), PWMP X 10- rZs 7 PWMPH.1 PWMPH.0 _F PWMPL.7~PWMPL.0 rs n X gO ÍFX Ý PWMRUN # CF34 h 10-5 5 § # CF 3 4 PWMP ö ª" m&O Í ?!@# PWMP rs Ý rs !# / " O Í ? @ ª PWM 5 Z7 PWMP o¤!# CLRPWM 10- 5 o h 000H # CF = ?@t o 6 F Í PWM PWMRUN ¨ ¤X# g PWM ¤§¦ © ª" PWMm8 5¡ X¢G0 ¨ PWM3L m!PWM0H ¨ PWM3H £ 7¥¤§¦ rlj s PWM0L m ö X8 v 10 rl s j8# PWM Ç DÜX PWM ¢ #H m PWMn rls# 5 ¡ rl¢¥s£ 6 # § l r s o X v Ý § ¤ ¦ l r s “1” PWMn PWM © 22 OSC PWM CPU tHI = (PWMP – PWMn+1) Period Duty = (pwmp +1) * ioclock period * 1/prescaler = duty * ioclock period ö ¤o¦r<s o6 _ 000H # PWMnm t ö ¤o¦rls6_ 3FFH # ICP , PWM / ª . ICP « , PWM ) / ¬ SFR Xv m . Note: 1. 2. - 76 - PWMn m W79E8213 K K (P0.2) ®; . %#®; U V {| = : v ! w ) H ;]^ PWMCON2 rs,lo- ¤z= :® ,<;W79E8213 + ] ¯ ° ;±: ¢v w®; ) (P0.2) ® ; PWMD&EoLMG®; #zD&EH ²´v ³ wAZ) B )® µ0;¶0o ¤®Z; 3 4 ® (BKF) ¤2v2wT) ©0· Z ® ; PWM ¸ Zö P0.2 0¹ º# BKPS = m0 # ÉFt¢®; # PWM BKF(PWMCON3.0) /6 “1” PWNRUN /?!@ # PWM ª 22-1: PWM - 77 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 m 7 o ¤5 ®; ¤ j # o¤ #<=:®;!# BKEN 6 “1” /¡£® ;m!. #8®; ¤t (BPEN, BKCH) = (0,1) g # PWM 5 ªÁt g o¤# Å ¸ É j=» ©¼ À%#7 mF 7 PWMnB # o¤t PWM û PWM ¸ É j # ê | m 34 /O Í6 ’1’ ¢ u+DABCF#D&E ®;) ¤ # ¸ É 5 / gO Í ?@# BKF(PWMCON3.0) l , © © ]^© G I PWMCON1.7 ¡£ PWM X®; ,l- F½ Å 7¾® ;© ) )zö 1FX8®; M!á ¢Èv!X¢GjI p qÀÁ ]^® ;Zk7 ® ;!) ® ;!) j Xzv\w Ä ) ¿ Xzpq # m G IA B ®;FX Å #z z ) 1 ® ; X 8 ® ; ± : +  à # Å Æ + Ç ð ñ # È & H Å ÉtÊ8ËÂ¥¸® PWM PWM Ì n + + Î Ï h / ;Ft ¯ w Ô ®K ; Í@ # PWM: ð ñ* ®+ÐFX8Í!@vw ®;) X8®;F# PWM ÑÒ ÉF2 Ó ±:27 PWMnB PWM PWMnB BPEN BKCH (BPEN, BKCH) = (0,0) PWMRUN PWM PWMRUN=0 PWMRUN = 1 PWM Start 1. Clear 10-bit PWM counter CLRPWM=1 2. Reload PWMP & PWM registers 3. Enable brake function (BKEN,BPEN,BKCH)=(1,1,0) Initialize PWM function 1. Set PWM Control Regs 2. Set PWM brake output pattern(PWMnB) 3. Enable brake function (BKEN,BPEN,BKCH)=(1,1,0) PWM starts running Brake occurs? Brake pin is asserted? Yes No No 1. Clear BKF PWM output=PWM comparator output 2. Re-start PWM Running by setting PWMRUN=1; load bit=1 Yes 1. PWMn output=PWMnB 2. H/W set BKF=1 & PWMRUN=0 3. S/W switch to S/W Brake (BKEN,BPEN,BKCH)=(1,0,0) 4. Set PWMn comparator output = PWMnB or a given pattern K End 22-2: PWM - 78 - ®; . % W79E8213 ÕÖ×gØPÙPÚg Ýt ¤o¦rmsn Ü+Ý ¤§¦H;X ADC DAC© ÜÝt¤§¦ W79E8213 UV }Û} DAC +¤§¦ Ü © rs &XÞ+ ß _*oj (V, ) t+¤§5 ¦ h » à q'/ oj (Vin) (V )'¤¦ ü áÝ 5+Ü+=Ý'¤o¦H ;* ADCCON ªÝÞ+ß& ADCS D*E¢k}= :6 D*E7 5 rs X ADCS o ‘1’ # 23 DAC DAC 8: =:6 . j # © =: q $u ADC5 â ; # ADCCEX6 ’1’å ADC §âF g ADCCON.5 (ADCEX) =0 g j q © # H ; ADCCON.3 (ADCS)6 ‘1’ Ê<DE ADCÞß ADCCON.5 =: 8: q =1 g # q # ADCCON.3q (ADCS) 6 ‘1’j¢ STADC (P2.0)¾X}ã¾l M ADCÞß $u STADC (P2.0) ¾X }ã ¾ lM ADCÞß H ® äåê | 2 "! H®ÝFç ® Þß © 3 4 5 G æç Ì X8# Þß ö q© 5 ª"º p E . q X STADC 7 5 H, ; ADCCON.4 X ¥«&o Þß X¢, 8 s %rls , ADCH (ADCI) 6 ‘1’ 10- Þߥ 5 º 8# è oX é s ADCCON.7 (ADC.1) ADCCON.6 8X ¿ , ) } 34 (ADC.0) ìí ¥# Hîu X D ÞD&ß §E jêë ï ADCCON é 5 #¢8j Ä h 8-5 X ADC3$4 u ( 85 s º jzADCH } " ! 50 6 ‘1’ # 50 ± ? ‘0’ ADC ADCS ðñ H; 5 ADCCON.0 ADCCON.1 u Ä 4« 1 ð¥ââ ã à ( H;F ADCÞ, ß2 Ó Å ñvwn =: q Þß = ö X ò ó! Þß «&GX Å +ò ó ADCI = 1 t ADC Þß ^A U ô/ÅG% : 5.6l <* o Þß+«+ ö (ADCI = âã 1) õ Å òóG56 . K 23.1 ADC øù'ú"û"ü&º"ýfGþ 23-1: ÜÝGö÷ ADC : - 79 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 ² m n ¯° §j m n (Vref+) ÃÝ DAC XNPO}l and AVSS ) ª" }Põ Ooÿ X 7l × (AVDD _ 1023"'!Xõ t ú ª" © AVss¾X 0.5XR # ¿ ª" © ï y } 1024XR & 5 ¤ ö DAC© X Ü mn Vref+ X 0.5XR î mn §j AVss [(Vref+) # 10- ADC 00 0000 0000 b = 000H t §j + ½ LSB] 5 # 10- ADC õ ö © © 11 1111 51111B = 3FFH DFEH [(Vref+) – 3/2 LSB] Vref+ AVref+ AVSS AVSS – 0.2 V Avref+° ¤ AVSS X # mn §j (Vin)° õ AVref+ AVDD + 0.2V AVSS ADC © ö pA Result = 1024 × Vin Vref + :: Vin or Result = 1024 × K VDD 23-2: ADC - 80 - K W79E8213 _! , ) FLASH © #" j W79E8213 5X#z $u ; ]^%]& ' ) AB n s$ ' U..V X¢ABs$+5 24 ICP ( Note: 1. 2. 3. 4. ICP( &oâ(A )W *,+,-,.0/21 P1.5, P0.43 P0.54652798932:9;2<>=@?BA9C . D ICPE,F2G9H,IJ19K9L6MJNO:9;JPRQ6S6T ICPU6V019W,I9D,C6XPYQ K9L2Z,[9\6]9^6_,`baO32E9c,d6egf2h9i6j9k@19l,mbng7 ICP o2p,q , PWM rJsBt,u . - 81 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 25 RTSwv The W79E8213 has two CONFIG bits (CONFIG0 located at FB00h, CONFIG1 located at FB01h) that must be defined at power up and can not be set the program after start of execution. Those features are configured through the use of two flash EPROM bytes, and the flash EPROM can be programmed and verified repeatedly. Until the code inside the Flash EPROM is confirmed OK, the code can be protected. The protection of flash EPROM (CONFIG1) and those operations on it are described below. The data of these bytes may be read by the MOVX instruction at the addresses. 25.1 CONFIG0 K x yz 7 WDTCK 6 RPD 5 PRHI 4 BOV 3 - 25-1: Config0 register bits ~ ¤ j#'!j¢±«¬ 5 ': u ~ j¢± 0: çw 500KHz RC y ¢ j ± } j ± 1: UGô i 5 5 u: ~ . i 5 . % . 0: ¡l£ P1.5 X P1.5 X i 5 . %#<Ä hlmn ) 1: Y2J i 5i j5! j 5 >® : ð ñ . 0: Y0J ! 5 j i ð ñ . 1: Y0J « ¬ 5 mj&k j : j hh 3.8V. 0: m jGI&k j 2.5V. 1: m jGI&k êÿ . - 82 - {}| . W79E8213 2 BPFR 1 Fosc1 0 Fosc0 y ' [6 5 j¢± N . ¢j ± N . 0: j¢± N . 1: $% ' ab « ¬ 5 CPU y ' ab « ¬ 5 CPU y 1. 0. : Fosc1 Fosc0 0 0 0 1 1 0 1 1 y ' >w RCy ' 4MHz ~ 20MHz 5 (FS1 xHy CONFIG1.5 20MHZ) «¬ 10MHz ê!ÿ vwy '!j¢± mn - 83 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 25.2 ¼*½ 1 Figure 25-2: Config1 register bits @ 5 © [ uFê uD uDF XHAB E ST >' _(A z Ä #zo 6G[ 5 } ª õ5 o 6 h 0 # » \ o6rs : É . q Flash EPROM X C6: @ Flash EPROM @ [ 5 © u F ) »ê\ u D 1287 X ST } _E (A ' z Ä #<o6[ 5 ¢ ª õ5 o6 h 0 ¢# $ u& W q Flash EPROM X o6rls :É . C7: 4K Flash EPROM Bit 7 Bit 6 1 1 0 1 1 0 0 0 {| 7 AB ST 1287G Å÷ }¡b& ' ICP¢ £ . 7¥}¦ST}§ ¨ ¡J& ' ICP = © 128 ¤ 7ª+¨©§ }« ¢ 4KB £ .¤ ¬ 4KB ©® . ¥¦°±² 4KB ¤¯ ¹»ºJ¼ 10MHz/20MHz ½¾@¿ ÀÁ·,à ¸@10MHz Ä 20MHz Å@ÆÇÈÉ 128 ¤¯ ª³§ &´ ' µ FS1: . FS1 Å@ÆÇÈÉÊ Ë 0 10MHz 1 20MHz ( Ì Í ) ÅJÆÇÈÉ ÂÃÎ - 84 - ICP © ¶´ £ . W79E8213 ¿ ÀÁÑÏ0ÒÐ ÂFlash ÃÓ½ Ô ¾@Flash . HS1: HS1 ÓÔ 0 Flash macro running with power saving 160ns window 1 Flash macro running with power saving 80ns window ( Flash Âà ÓÔ - 85 - ÂÃÎ Flash ÌÍ ) Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 ÕÖ×ÙØ 26.1 ÚÛÜÝ Þß àá âãä -0.3 VDD−VSS DC è@é VIN VSS-0.3 Êêè@ë ìíîï TA -40 ðñ îï Tst -55 ò èó ISK ?? ôJõBö6÷,ø9ù9ú2û9ü9ý6þ,ÿ 9ù 26 Note: - 86 - âåä . æç +7.0 V VDD+0.3 V +85 °C +150 °C 90 mA W79E8213 26.2 DC "! #%$ (TA = -40~85°C, unless otherwise specified.) Þß àá ìí è@ë . VDD1 VDD2 ìí èó âãä 2.4 &%'ä 6 IDD2 5 IIDLE2 Êêèó Êêèó [1] P1.5(RST pin) 2 3 ) Êê3èó 4 Logic 1 ~0 5*6 1 7 0 809¨èó P0, P1, P2 ( Êê*:èë input) Êê Ó èë input) P0, P1, P2 (TTL P0, P1, P2 (TTL Êê*:èë XTAL1 Êê Ó èë XTAL1 ;4< % = (>@?Êê A <CB = (>0D@?Êê E*F è@ë [*2] 8 mA 6.5 VDD=4.5V ~ 5.5V @ 20MHz VDD=2.4V ~ 5.5V @ 4MHz NVM program and erase operation. No load, /RST = VSS, VDD= 5.0V @ 20MHz No load, /RST = VSS, VDD= 3.0V @ 12MHz mA No load, VDD = 5.0V @ 20MHz No load, VDD = 3.0V @ 20MHz 1 10 µA No load, VDD = 5.5V @ Disable BOV function 1 10 uA No load, VDD = 3.0V @ Disable BOV function IIN1 -50 - +10 µA VDD = 5.5V, VIN = 0V or VIN=VDD IIN2 -55 -45 -30 µA VDD = 5.5V, VIN = 0.45V ILK -10 - +10 µA VDD = 5.5V, 0<VIN<VDD -500 - -200 µA VDD = 5.5V, VIN<2.0V -93 - -56 0 - 1.0 0 - 0.6 1.0 2.0 - VDD +0.2 1.5 - VDD +0.2 0 - 0.8 ITL [*3] VIL1 VIH1 VIL3 [*2] V TBD IPWDN P0, P1, P2 æç TBD IIDLE1 1 èèó 5.5 3.0 IDD1 .0/ èó âåä (*),+*- VIH3 0 - 0.4 3.5 - VDD +0.2 2.4 - VDD +0.2 Vdd=2.4 Vin = 1.3v VDD = 4.5V V V V V ) VILS -0.5 - 0.3VDD V ) VIHS 0.7VDD - VDD+0.5 V VHY 0.2VDD - 87 - VDD = 2.4V VDD = 5.5V VDD = 2.4V VDD = 4.5V VDD = 3.0V VDD = 5.5V VDD = 3.0V V Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 é¨èó P0, P1, P2 é¨èó P0, P1, P2 ISR1 (PUSH-PULL Mode) (Quasi-bidirectional Mode) ISR2 GHI P0, P2 (Quasi-bidirectional, Open drain [*4] and PUSH-PULL Mode) ISK1 P1 (Quasi-bidirectional, Open drain [*4] and PUSH-PULL Mode) ISK2 GHI J@KL*MN P0, P2 (Quasibidirectional, Open drain and PUSH-PULL Mode) VOL1 P1 (Quasibidirectional, Open drain and PUSH-PULL Mode) VOL2 J@KL*MN J@KPO@MN P0, P1, P2 (Quasibidirectional Mode) VOH1 P0, P1, P2 (PUSHPULL Mode) VOH2 J@KPO@MN QR T S R Q R T S R -16 -26 -36 mA VDD = 4.5V, VS = 2.4V -5 -7.9 -11 mA VDD = 2.4V, VS = 2.0V -150 -210 -360 µA VDD = 4.5V, VS = 2.4V -39 -53 -69 µA VDD = 2.4V, VS = 2.0V 13 18.5 24 9 15 21 VDD = 4.5V, VS = 0.45V mA TBD VDD = 2.4V, VS = 0.45V mA VDD = 4.5V, VS = 0.45V TBD VDD = 2.4V, VS = 0.45V - 0.5 0.9 V VDD = 4.5V, IOL = 20 mA - 0.1 0.4 V VDD = 2.4V, IOL = 3.2 mA TBD - 0.9 - 0.4 VDD = 4.5V, IOL = 50 mA V VDD = 4.5V, IOL = 20 mA VDD = 2.4V, IOL = 3.2 mA 2.4 3.7 - 1.9 2.4 - V 2.4 3.4 - V VDD = 4.5V, IOH = -16mA 1.9 2.4 - V VDD = 2.4V, IOH = -3.2mA VDD = 2.4V, IOH = -30µA BOV=1 VBO2.5 2.4 - 2.7 V BOV=0 VBO3.8 3.5 - 4 V UVWXYZ\[]^_`U VWX CMOS_`U . *3. P0, P1 and P2 abdcUefghijh\kmlnopqrsutvxwzy{\| *4. z d 8d\u . VDD = 4.5V, IOH = -100µA Notes: *1. /RST RST *2. XTAL1 } VIN 2V lndtv~wzy 26.3 ADC DC (VDD−VSS = 3.0~5V, TA = -40~85°C, Fosc = 4MHz, unless otherwise specified.) * ¯°*±*² ADC ³µ´ ¶*· ³*¸ ¹ º*»*¼*½¾%¿ * À º*»*¼*½¾%¿ ¡%¢ £C¤@¥ . AVin VSS-0.2 ADCCLK 200KHz ¥ % ¦%§ £0¨*¥ . ©ª VDD+0.2 V 5MHz Hz . - 52tADC1 tC «¬,*® us DNL -1 - +1 LSB INL -2 - +2 LSB - 88 - ADC block circuit input clock W79E8213 Á ¾%¿ à Ä*¾%¿ Å@Æ STR%¾*¿ Ofe -1 - +1 LSB Ge -1 - +1 % Ae -3 - +3 LSB Notes: 1. tADC: The period time of ADC input clock. - 89 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 26.4 AC @" tCLCL tCLCH tCLCX tCHCL tCHCX Note: Duty cycle is 50%. 26.5 Ç ÈÊÉ,Ë Ì*Í ³µ´0ÙC³*¸ ³µ´*ÚÛ³*¸ ³µ´ Rise ³¸ ³µ´ Fall ³¸ Î%Ï Ð,Ñ4Ò Ó*Ô4Ò . Ð%Õ@Ò Ö× tCHCX 12.5 - - nS tCLCX 12.5 - - nS tCLCH - - 10 nS tCHCL - - 10 nS - 90 - Ø W79E8213 26.6 AC Þ0ß@à*á%â 26.7 ÜÝ Ì*Í Î%Ï ³µ´Ð,Ñ@Ò 1/ tCLCL ã äÛå æç*è 0 é Þ Ö× 20 C1 ê 4MHz ~ 20 MHz ë*ì*í%î0ï é Þ%ð*ñ*Ì*ò Ò ³µ´Ð%Õ*Ò C2 ê ê MHz R .. - 91 - Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 27 óçôöõø÷ 27.1 20-pin SOP-300mil ûýü þýþ c E H ù L þü ú D 0.25 O A Y SEATING PLANE e GAUGE PLANE A1 b ÿ SYMBOL A A1 b c E D e H Y L θ ù DIMENSION IN MM MIN. MAX. 2.35 2.65 0.10 0.30 0.33 0.51 0.23 0.32 7.40 7.60 13.00 12.60 1.27 BSC 10.65 10.00 0.10 0.40 1.27 0 8 DIMENSION IN INCH MIN. MAX. 0.093 0.104 0.012 0.004 0.013 0.020 0.009 0.013 0.291 0.299 0.512 0.496 0.050 BSC 0.394 0.016 0 - 92 - 0.419 0.004 0.050 8 W79E8213 27.2 20-pin PDIP D 20 11 1 10 1 E E S 1 2 AA A L c Base Plane Seating Plane B e1 B1 Symbol A A1 A2 B B1 c D E E1 e1 L eA Dimension in inch Min Nom Max Dimension in mm Min Nom Max 4.45 0.175 0.010 0.25 0.125 0.130 0.135 3.18 3.30 3.43 0.016 0.018 0.022 0.41 0.46 0.56 0.058 0.060 0.064 1.47 1.52 1.63 0.008 0.010 0.014 0.20 0.25 0.36 1.026 1.040 20.06 26.42 7.87 0.290 0.300 0.310 7.37 7.62 0.245 0.250 0.255 6.22 6.35 6.48 0.090 0.100 0.110 2.29 2.54 2.79 0.120 0.130 0.140 3.05 3.30 3.56 15 0 0.375 8.51 9.02 9.53 0 0.335 eA 0.355 S 0.075 - 93 - 15 1.91 Publication Release Date: 3. 31. 2008 Revision .SC1 W79E8213 !" #%$ SC1 &(' March .31.2008 )+* - ,+.0/2123 Important Notice Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Further more, Winbond products are not intended for applications wherein failure of Winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales. 46587:9<;>=@?BADCFE6GIH+JBK 7 = M Z\ O0P [%]BuC QBE RBSBTBUIV2W 8LN 9<;N XBYN ^6_6 CcbDd e6f - 94 - d 2299 ` 27a 021-62365999 021-62365998