ZL40810 10-GHz Fixed Modulus ÷ 8 Data Sheet July 2003 Features • • • • • • Ordering Information Very High Operating Speed Operation down to DC with Square Wave Input Low Phase Noise (Typically better than -147dBc/Hz at 10kHz) 5V Single Supply Operation Low Power Dissipation: 480mW (Typ) Surface Mount Plastic Package With Exposed Pad (See Application Notes) ZL40810/DCE (tubes) 8 lead e-pad SOIC ZL40810/DCF (tape and reel) 8 lead e-pad SOIC -40° to +85°C Description The ZL40810 is one of a range of 5V supply, very high speed low power prescalers for professional applications with a fixed modulus of divide by 8. The dividing elements are static D type flip flops and therefore allow operation down to DC if the drive signal is a pulse waveform with fast rise times. The output stage has internal 50 ohm pull up giving a 1V p-p output. See application notes for more details. Applications • • • • • • • DC to 10 GHz PLL applications HyperLan LMDS Instrumentation Satellite Communications Fibre Optic Communications; OC48, OC192 Ultra Low Jitter Clock Systems VCC IN VCC OUT 1 8 50 Ohm OUTPUT 7 6 OUTPUT B Vref Div 8 400 Ohm INPUT 2 INPUT B 3 20mA GND GND 4 5 Figure 1 - Block Diagram 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved. ZL40810 Data Sheet Pin Connections - Top View Vcc INPUT 1 8 Vcc OUTPUT INPUT 2 7 OUTPUT INPUT B 3 6 OUTPUT B 4 5 GND GND SOIC (N) E-Pad Application Configuration Figure 2 shows a recommended application configuration. This example shows the devices set up for single ended operation. Vcc 5V R3:100ohm C8:10nF C3:100pF 1 8 2 7 C1:10uF C6:10nF C4:100pf R1:50ohm C2:10nF 3 6 4 5 C7:10nF C5:100pf R2:50ohm Example Configuration for Single ended operation Figure 2 - Recommended circuit configuration The above circuit diagram shows some components in dotted lines. These are optional in many applications. 1. C1 (10 µF) and C2 (10 nF) power supply decoupling capacitors may be available on the board already. 2. R3 (100 Ohm) and C8 (10 nF) can be included if further power supply decoupling is required for the first stage biasing circuit. This may optimise the noise and jitter performance. The values are suggestions and may have to be modified if the existing supplies are particularly noisy. 3. R1 (50 Ohm), in series with C5 (100 pF), may reduce feedthrough of the input signal to the output. 4. R2 (50 Ohm) and C7 (10 nF) will help to balance the current drawn from the power supply and may reduce voltage transients on the power supply line. 2 Zarlink Semiconductor Inc. ZL40810 Data Sheet Evaluation Boards From Zarlink Semiconductor Zarlink Semiconductor provides prescaler evaluation boards. These are primarily for those interested in performing their own assessment of the operation of the prescalers. The boards are supplied unpopulated and may be assembled for single ended or differential input and output operation, type No. ZLE40008. Fully populated evaluation boards are also available, type No. ZLE40810. Once assembled, all that is required is an RF source and a DC supply for operation. The inputs and outputs are connected via side launch SMA connectors. Absolute Maximum Ratings Electrical Characteristics (Tamb = 25C, Vcc = 5V) Parameter Symbol Min Vcc Max Units 6.5 V 1 Supply voltage 2 Prescaler Input Voltage 2.5 Vp-p 3 ESD protection (Static Discharge) 2k V 4 Storage temperature 5 Maximum Junction Temp 6 Thermal characteristics -65 TST TJmax +150 °C +125 °C 58.6 THja °C/W multi-layer PCB AC/DC Electrical Characteristics Electrical Characteristics (Tamb = 25C, Vcc = 5V) † Characteristic Pin Min. Typ. Supply current 1 0.35 Supply current 8 96 Input frequency 2,3 Input sensitivity 2,3 -8 Input sensitivity 2,3 -15 Input sensitivity 2,3 -10 Input overload 2,3 Input overload 2,3 Input Edge Speed 2,3 Output voltage 6,7 Output power 6,7 Phase Noise (10kHz offset) 6,7 O/P Duty Cycle 6,7 Max. Input stage bias current 136 mA Divider and output stages 11 GHz RMS sinewave1 dBm fin = 1GHz to 2GHz -10 dBm fin = 2GHz to 9.5GHz 0 dBm fin = 11GHz 8 dBm fin = 1GHz to 4GHz 11 dBm fin = 5GHz to 11GHz V/µs For <2GHz operation. Vp-p Differential Into 50ohm pullup resistors dBm Single-ended output, fin = 2GHz to 10GHz, pwr ip= -10dBm 900 1 -1 1.2 -147 45 Conditions mA 2 -3 Units dBc/Hz 50 55 3 Zarlink Semiconductor Inc. % Fin = 5GHz, pwr ip = 0dBm See Figure 5 to Figure 8. ZL40810 Data Sheet 1. The device characterisation test method incremented the amplitude over the entire range of frequency and ensures that there are no "holes" in the characteristic. † The characteristics are guaranteed by either production test or design. † Input sensitivity and output power values assume 50 Ohm source and load impedances Typical input sensitivity (sinewave drive) @ +25 Deg C 20.00 Vin into 50 Ohm (dBm) 10.00 0.00 GUARANTEED OPERATING WINDOW 25C MAX (Typ) -10.00 -20.00 Input frequency extends to DC if the source has an edge speed of 900 V/us or less -30.00 or more -40.00 0 1 2 3 4 5 6 7 8 9 10 11 12 13 Input Frequency (GHz) Figure 3 - Input Sensitivity @ +25 Deg C Electrical Characteristics (Vcc = 5V ±5%, Tamb = -40 to +85C)† Characteristic Pin Min. Typ. Max. Units Conditions mA Input stage bias current 1 125 mA -40 deg C 5.25V 78 101 mA -40 deg C 4.75V 74 105 136 mA +25 deg C 5.25V 8 60 86 111 mA +25 deg C 4.75V Supply current 8 80 115 149 mA +85 deg C 5.25V Supply current 8 62 91 119 mA +85 deg C 4.75V Supply current 1 0.35 Supply current 8 67 96 Supply current 8 54 Supply current 8 Supply current 1. Pin 1 is the Vcc pin for the 1st stage bias current. In some applications e.g. if the power supply is noisy, it may be advantageous to add further supply decoupling to this pin (i.e. an additional R, C filter, see diagram of the recommended circuit configuration, Figure 2). The characteristics are guaranteed by design and characterisation over the range of operating conditions unless otherwise stated: (Input Frequency range 1 to 10GHz rms Sinewave) 4 Zarlink Semiconductor Inc. ZL40810 Data Sheet Input and Output Characteristics† Characteristic Pin Min. Typ. Max. Units Conditions -15 -10 dBm Tamb = 85C, Fin = 2 to 8 GHz Input sensitivity 2,3 Input overload 2,3 2 5 dBm fin = 2 GHz Input overload 2,3 2 8 dBm fin = 4 GHz Input overload 2,3 5 13 dBm fin = 9 GHz Input overload 2,3 5 11 dBm fin = 10 GHz Input Edge Speed 2,3 900 V/µs For <2GHz operation1. Output voltage 6,7 Vp-p Differential Into 50ohm pullup resistors Output power 6,7 -4 -1 2 dBm Single-ended output, fin = 2GHz to 10GHz, pwr ip= -10dBm O/P Duty Cycle 6,7 45 50 55 % Trise and Tfall 6,7 1 110 ps 1. For an input signal frequency of less than 2GHz, the slew rate of the sinewave signal becomes progressively too slow for the divider. Input sensitivity and output power values assume 50 Ohm source and load impedances For details of the test set-up, refer to the Application Note for RF Prescalers. 5 Zarlink Semiconductor Inc. ZL40810 Data Sheet The following graph summarises the Input and Output Characteristics table Typical input sensitivity (sinewave drive) @ -40 to +85 Deg C 20.00 85 Deg C 70 Deg C 25 Deg C Vin into 50 Ohm (dBm) 10.00 0.00 GUARANTEED OPERATING WINDOW 85C 70 25C -40C MAX (Typ) -10.00 -20.00 Input frequency extends to DC if the source has an edgespeed of 900 V/us or or more less -30.00 -40.00 0 1 2 3 4 5 6 7 8 9 10 11 12 13 Input Frequency (GHz) Figure 4 - Input Sensitivity @ -40, +25, +70 and +85 Deg C Phase Noise Measurement Graphs The following graph show how the phase noise of the divider output varies with frequency offset from the output (carrier) frequency. Phase Noise (dBc/Hz) ZL40810 Phase Noise vs Offset Pin = 0dBm, Vcc = 5.25V, Temp = 25DegC -130 -135 10GHz -140 5GHz 2GHz -145 -150 1 10 100 Offset Frequency (kHz) Figure 5 - Figure 8 ZL40810 Phase Noise vs Offset Frequency 6 Zarlink Semiconductor Inc. ZL40810 Data Sheet The following graph show how the phase noise of the divider output varies with input frequency. The output frequency is the input divided by 8. Phase Noise (dBc/Hz) ZL40810 Phase Noise vs Input Frequency Pin = 0dBm, Vcc = 5.25V, Temp = 25 Deg C -120 -125 -130 -135 -140 -145 -150 -155 -160 100Hz 1kHz 10kHz 100kHz 2 4 6 8 10 Input Frequency (GHz) Figure 6 - ZL40810 Phase Noise vs Input Frequency The following graph show how the phase noise of the divider output varies with input power. Phase Noise (dBc/Hz) ZL40810 Phase Noise vs Input Power Vcc = 5.25V, Input Frequency = 5GHz, T = 25 DegC -130 -135 100Hz -140 1kHz -145 10kHz -150 100kHz -155 -4 -3 -2 -1 0 1 2 3 Input Power (dBm) Figure 7 - ZL40810 Phase Noise vs Input Power 7 Zarlink Semiconductor Inc. ZL40810 Data Sheet The following graph show how the phase noise of the divider output varies with power supply voltage Vcc. Phase Noise (dBc/Hz) ZL40810 Phase Noise vs Vcc Fin = 5GHz, Pin = 0dBm, T = 25DegC -130 -135 100Hz -140 1kHz -145 10kHz -150 100kHz -155 4.5 4.75 5 5.25 5.5 Supply Voltage (V) Figure 8 - ZL40810 Phase Noise vs Vcc Single Ended Output Power The following graphs show how the output power varies with supply. Differential output power will be 3dB. Frequency_sweep, Vcc = 4.75v Device 1,Temperature = -40°C Device 1,Temperature = 25°C Device 1,Temperature = 85°C 5 4 3 2 1 0 -1 o/p level (dBm) -2 -3 -4 -5 ZL40810 Devcie1 Minimum inband power output. -2.9dBm -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 0 2000000000 4000000000 6000000000 8000000000 10000000000 12000000000 i/p frequency (MHz) Figure 9 - Pout, Freq, Temp @ Vcc = 4.75 8 Zarlink Semiconductor Inc. 14000000000 ZL40810 Data Sheet Frequency_sweep, Vcc = 5v Device 1,Temperature = -40°C Device 1,Temperature = 25°C Device 1,Temperature = 85°C 5 4 3 2 1 0 -1 o/p level (dBm) -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 0 2000000000 4000000000 6000000000 8000000000 10000000000 12000000000 14000000000 i/p frequency (MHz) Figure 10 - Pout, Freq, Temp @ Vcc = 5V Frequency_sweep, Vcc = 5.25v Device 1,Temperature = -40°C Device 1,Temperature = 25°C Device 1,Temperature = 85°C 5.00E+00 4.00E+00 3.00E+00 2.00E+00 1.00E+00 0.00E+00 -1.00E+00 o/p level (dBm) -2.00E+00 -3.00E+00 -4.00E+00 -5.00E+00 -6.00E+00 -7.00E+00 -8.00E+00 -9.00E+00 -1.00E+01 -1.10E+01 -1.20E+01 -1.30E+01 -1.40E+01 -1.50E+01 0 2000000000 4000000000 6000000000 8000000000 10000000000 12000000000 i/p frequency (MHz) Figure 11 - Pout, Freq, Temp @ Vcc = 5.25V 9 Zarlink Semiconductor Inc. 14000000000 ZL40810 Data Sheet Oscillographs of the divider output waveforms The following oscillographs show that the low-level feedthrough of the input waveform can be further reduced by summing the two output pins of the device differentially, refer to Figures 6 and 7. Figure 12 - Feedthough of the input single-ended output configuration (VCC=5, Vin = 2dBm, Fin = 10GHz) Figure 13 - Feedthrough of the input using differential output configuration (VCC = 5V, Vin = 2dBm, Fin = 10GHz) 10 Zarlink Semiconductor Inc. ZL40810 Figures 8 and 9 show the output waveforms with a lower input frequency. Figure 14 - Differential output with small input amplitude (VCC = 4.75V, Vin = -10dBm, Fin = 5GHz) Figure 15 - Differential output with lower input frequency (VCC = 4.75V, Vin = -10dBm, Fin = 2GHz) 11 Zarlink Semiconductor Inc. Data Sheet Package Code c Zarlink Semiconductor 2003 All rights reserved. ISSUE ACN DATE APPRD. Previous package codes For more information about all Zarlink products visit our Web Site at www.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. 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