A Product Line of
Diodes Incorporated
ZXLD1350
30V 350mA LED DRIVER with AEC-Q100
Description
Pin Assignments
The ZXLD1350 is a continous mode inductive step-down
converter with integrated switch and high side current sense.
VIN
LX
It operates from an input supply from 7V to 30V driving single
or multiple series connected LEDs effeciently external
adjustable output current up to 350mA.
GND
The ZXLD1350 has been qualified to AECQ100.2 allowing it
to operate at ambient temperatures from -40 to 105°C.
ADJ
ISENSE
The output current can be adjusted by applying a DC voltage
or a PWM waveform. 100:1 adjustment of output current is
possible using PWM control. Applying a voltage of 0.2V or
lower to the ADJ pin turns the output off and switches the
device into a low current standby state.
Features
TSOT23-5
Top View
Typical Application Circuit
RS
VIN
•
•
•
•
•
•
•
•
•
Simple low parts count
Internal 30V NDMOS switch
Internal PWM filter
(*)
High efficiency (up to 95% )
Wide input voltage range: 7V to 30V
40V transient capability
Up to 1MHz switching frequency
Typical 4% output current accuracy
Qualified to AEC-Q100.2
LED
Cled
L1
D1
VIN
ISENSE
LX
ZXLD1350
*Using standard external components as specified under electrical characteristics. Efficiency is dependent upon the number of
LEDs driven and on external component types and values.
ZXLD1350
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ZXLD1350
Block Diagram
RS
VIN
L1
D1
ISENSE
VIN
VIN
LX
R1
Current sense circuit
Voltage
regulator
5V
+
Shutdown
circuit
C1
Comparator
+
ADJ
200k
Vref
1.25V
4KHz
MN
R2
R3
GND
Figure 1. Block diagram – Pin Connection for TSOT Package
Pin Description
Name
Pin
No.
LX
GND
1
2
ADJ
3
ISENSE
4
VIN
5
Description
Drain of NDMOS switch
Ground (0V)
Multi-function On/Off and brightness control pin:
• Leave floating for normal operation.(VADJ= VREF =1.25V giving nominal average output current
IOUTnom=0.1/RS)
• Drive to voltage below 0.2V to turn off output current
(†)
• Drive with DC voltage (0.3V<VADJ<2.5V) to adjust output current from 25% to 200% of IOUTnom
• Drive with PWM signal from open-collector or open-drain transistor, to adjust output current.
Adjustment range 25% to 100% of IOUTnom for f>10kHz and 1% to 100% of IOUTnom for f<500Hz
• Connect a capacitor from this pin to ground to increase soft-start time. (Default soft-start time=0.5ms.
Additional soft-start time is approx.0.5ms/nF)
Connect resistor RS from this to VIN to define nominal average output current IOUTnom=0.1/RS
(Note: RSMIN=0.27V with ADJ pin open circuit)
Input voltage (7V to 30V). Decouple to ground with 1µF of higher X7R ceramic capacitor close to
device
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ZXLD1350
Absolute Maximum Ratings (Voltages to GND Unless Otherwise Stated)
Symbol
Parameter
VIN
Input Voltage
VSENSE
ISENSE Voltage
V
+0.3 to -5
V
(measured with respect to VIN)
-0.3 to +30
LX Output Voltage
VADJ
ILX
Adjust Pin Input Voltage
Switch Output Current
Power Dissipation
V
(40V for 0.5 sec)
(Refer to Package thermal de-rating curve on page 17)
TST
TJ MAX
Unit
(40V for 0.5 sec)
VLX
PTOT
Rating
-0.3 to +30
Storage Temperature
Junction Temperature
-0.3 to +6
500
V
mA
450
mW
-55 to 150
150
°C
°C
These are stress ratings only. Operation above the absolute maximum rating may cause device failure. Operation at the absolute maximum ratings, for extended
periods, may reduce device reliability.
Thermal Resistance
Symbol
Parameter
Rating
Unit
θJA
Junction to Ambient
200
°C/W
Recommended Operating Conditions
Symbol
VIN
tOFFMIN
tONMIN
DLX
TOP
fLXmax
Parameter
Input voltage
Minimum switch off-time
Minimum switch on-time
Duty cycle range
Operating Temperature range
Recommended maximum operating frequency
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Min
7
0.01
-40
Typ.
Max
30
200
200
0.99
+105
1
Units
V
ns
ns
°C
MHz
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ZXLD1350
Electrical Characteristics
(Test conditions: VIN = 12V, Tamb = 25°C, unless otherwise specified.)
Symbol
VSU
IINQoff
Parameter
Internal regulator start-up threshold
Quiescent supply current with output off
IINQon
Quiescent supply current with output switching
VSENSE
Mean current sense threshold voltage
(Defines LED current setting accuracy)
VSENSEHYS
ISENSE
Sense threshold hysteresis
ISENSE pin input current
VREF
Internal reference voltage
ΔVREF/ΔT
Temperature coefficient of VREF
External control voltage range on ADJ pin for
(†)
DC brightness control
DC voltage on ADJ pin to switch device from
active (on) state to quiescent (off) state
DC voltage on ADJ pin to switch device from
quiescent (off) state to active (on) state
Resistance between ADJ pin and VREF
Continuous LX switch current
LX switch ‘On’ resistance
LX switch leakage current
Duty cycle range of PWM signal applied to ADJ
pin during low frequency PWM dimming mode
Brightness control range
Duty cycle range of PWM signal applied to ADJ
pin during high frequency PWM dimming mode
Brightness control range
VADJ
VADJoff
VADJon
RADJ
ILXmean
RLX
ILX(leak)
DPWM(LF)
DPWM(HF)
Operating frequency
fLX
(See graphs for more details)
Start up time
(See graphs for more details)
tSS
TPD
Notes:
Condition
VIN rising
ADJ pin grounded
ADJ pin floating
f = 250kHz
Measured on ISENSE pin with
respect to VIN
VADJ = 1.25V
VSENSE = VIN -0.1
Measured on ADJ pin with
pin floating
Min.
95
1.21
(*)
Typ.
4.8
15
Max.
20
Unit
V
µA
250
500
µA
100
105
mV
±15
1.25
10
%
µA
1.25
1.29
V
50
0.3
ppm/°C
2.5
V
VADJ falling
0.15
0.2
0.25
V
VADJ rising
0.2
0.25
0.3
V
250
0.37
2
1
kΩ
A
Ω
µA
135
1.5
PWM frequency <500Hz
PWM amplitude = VREF
Measured on ADJ pin
PWM frequency <10kHz
PWM amplitude = VREF
Measured on ADJ pin
0.01
1
100:1
0.16
1
5:1
ADJ pin floating
L = 100H (0.82V)
IOUT = 350ma @ VLED = 3.4V
Driving 1 LED
250
kHz
Time taken for output
current to reach 90% of final
value after voltage on ADJ
pin has risen above 0.3V.
500
µs
50
ns
Internal comparator propagation delay
(*). Production testing of the device is performed at 25°C. Functional operation of the device and parameters specified over a -40°C
to +105°C Temperature range, are guaranteed by design, characterization and process control.
(†). 100% brightness corresponds to VADJ = VADJ(nom) = VREF. Driving the ADJ pin above VREF will increase the VSENSE threshold and
output current proportionally.
ZXLD1350
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Device Description
The device, in conjunction with the coil (L1) and current sense resistor (RS), forms a self-oscillating continuous-mode buck
converter.
Device operation (Refer to block diagram and Figure 1 - Operating waveforms)
Operation can be best understood by assuming that the ADJ pin of the device is unconnected and the voltage on this pin
(VADJ) appears directly at the (+) input of the comparator.
When input voltage VIN is first applied, the initial current in L1 and RS is zero and there is no output from the current sense
circuit. Under this condition, the (-) input to the comparator is at ground and its output is high. This turns MN on and switches
the LX pin low, causing current to flow from VIN to ground, via RS, L1 and the LED(s). The current rises at a rate determined by
VIN and L1 to produce a voltage ramp (VSENSE) across RS. The supply referred voltage VSENSE is forced across internal resistor
R1 by the current sense circuit and produces a proportional current in internal resistors R2 and R3. This produces a ground
referred rising voltage at the (-) input of the comparator. When this reaches the threshold voltage (VADJ), the comparator output
switches low and MN turns off. The comparator output also drives another NMOS switch, which bypasses internal resistor
R3 to provide a controlled amount of hysteresis. The hysteresis is set by R3 to be nominally 15% of VADJ.
When MN is off, the current in L1 continues to flow via D1 and the LED(s) back to VIN. The current decays at a rate determined
by the LED and diode forward voltages to produce a falling voltage at the input of the comparator. When this voltage returns to
VADJ, the comparator output switches high again. This cycle of events repeats, with the comparator input ramping between
limits of VADJ ± 15%.
Switching thresholds
With VADJ =VREF, the ratios of R1, R2 and R3, define an average VSENSE switching threshold of 100mV (measured on the ISENSE
pin with respect to VIN). The average output current IOUTnom is then defined by this voltage and Rs according to:
IOUTnom=100mV/RS
Nominal ripple current is ±15mV/RS
Adjusting output current
The device contains a low pass filter between the ADJ pin and the threshold comparator and an internal current limiting
resistor (200k nom) between ADJ and the internal reference voltage. This allows the ADJ pin to be overdriven with either
DC or pulse signals to change the VSENSE switching threshold and adjust the output current. The filter is third order, comprising
three sections, each with a cut-off frequency of nominally 4kHz.
Details of the different modes of adjusting output current are given in the applications section.
Output shutdown
The output of the low pass filter drives the shutdown circuit. When the input voltage to this circuit falls below the threshold
(0.2V nom), the internal regulator and the output switch are turned off. The voltage reference remains powered during
shutdown to provide the bias current for the shutdown circuit. Quiescent supply current during shutdown is nominally
15mA and switch leakage is below 1mA.
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Device Description (Continued)
Figure 1. Theoretical Operating Waveforms
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Device Description (Continued)
Typical Operating Waveforms [VIN = 12V, RS = 0.3V, L = 100 μH]
Normal operation. Output current (Ch3) and LX voltage (Ch1)
Start-up waveforms. Output current (Ch3), LX voltage (Ch1) and VADJ (Ch2)
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ZXLD1350
Typical Operating Conditions
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ZXLD1350
Typical Characteristics (Continued)
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ZXLD1350
Typical Characteristics (Continued)
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ZXLD1350
Typical Characteristics (Continued)
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Application Information
Setting nominal average output current with external resistor RS
The nominal average output current in the LED(s) is determined by the value of the external current sense resistor (RS)
connected between VIN and ISENSE and is given by:
IOUTnom = 0.1/RS [for RS > 0.27Ω]
The table below gives values of nominal average output current for several preferred values of current setting resistor (RS) in
the typical application circuit shown on page 1:
RS(Ω)
0.27
0.30
0.33
0.39
Nominal average output
current (mA)
370
333
300
256
The above values assume that the ADJ pin is floating and at a nominal voltage of VREF (=1.25V). Note that RS = 0.27V is the
minimum allowed value of sense resistor under these conditions to maintain switch current below the specified maximum
value.
It is possible to use different values of RS if the ADJ pin is driven from an external voltage. (See next section).
Output current adjustment by external DC control voltage
The ADJ pin can be driven by an external dc voltage (VADJ), as shown, to adjust the output current to a value above or below
the nominal average value defined by RS.
+
ZXLD1350
ADJ
GND
DC
GND
The nominal average output current in this case is given by:
IOUTdc = 0.08*VADJ /RS
for 0.3 < VADJ < 2.5V
Note that 100% brightness setting corresponds to VADJ = VREF. When driving the ADJ pin above 1.25V, RS must be increased
in proportion to prevent IOUTdc exceeding 370mA maximum.
The input impedance of the ADJ pin is 200kΩ ±25%.
ZXLD1350
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ZXLD1350
Application Information (Continued)
Output Current Adjustment by PWM Control
Directly driving ADJ input
A Pulse Width Modulated (PWM) signal with duty cycle DPWM can be applied to the ADJ pin, as shown below, to adjust the
output current to a value above or below the nominal average value set by resistor RS:
PWM
VADJ
ADJ
ZXLD1350
GND
0V
GND
Driving the ADJ input via open collector transistor
The recommended method of driving the ADJ pin and controlling the amplitude of the PWM waveform is to use a small NPN
switching transistor as shown below:
ADJ
PWM
ZXLD1350
GND
GND
This scheme uses the 200k resistor between the ADJ pin and the internal voltage reference as a pull-up resistor for the
external transistor.
Driving the ADJ input from a microcontroller
Another possibility is to drive the device from the open drain output of a microcontroller. The diagram below shows one
method of doing this:
MCU
10k
ADJ
ZXLD1350
GND
The diode and resistor suppress possible high amplitude negative spikes on the ADJ input resulting from the drain-source
capacitance of the FET. Negative spikes at the input to the device should be avoided as they may cause errors in output
current, or erratic device operation.
PWM dimming can be further split into high frequency and low frequency PWM dimming and how the device responds to
these.
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Application Information (Continued)
Low frequency PWM mode
When the ADJ pin is driven with a low frequency PWM signal (eg 100Hz), with a high level voltage VADJ and a low level of
zero, the output of the internal low pass filter will swing between 0V and VADJ, causing the input to the shutdown circuit to fall
below its turn-off threshold (200mV nom) when the ADJ pin is low. This will cause the output current to be switched on and off
at the PWM frequency, resulting in an average output current IOUTavg proportional to the PWM duty cycle. (See Figure 2 - Low
frequency PWM operating waveforms).
Figure 2. Low frequency PWM operating waveforms
The average value of output current in this mode is given by:
IOUTavg 0.1DPWM/RS for DPWM >0 01
This mode is preferable if optimum LED 'whiteness' is required. It will also provide the widest possible dimming range (approx.
100:1) and higher efficiency at the expense of greater output ripple.
Note that the low pass filter introduces a small error in the output duty cycle due to the difference between the start-up and
shut-down times. This time difference is a result of the 200mV shutdown threshold and the rise and fall times at the output of
the filter. To minimize this error, the PWM duty cycle should be as low as possible consistent with avoiding flicker in the LED.
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Application Information (Continued)
High frequency PWM mode
At PWM frequencies above 10kHz and for duty cycles above 0.16, the output of the internal low pass filter will contain a
DC component that is always above the shutdown threshold. This will maintain continuous device operation and the nominal
average output current will be proportional to the average voltage at the output of the filter, which is directly proportional to the
duty cycle. (See Figure 3 – High frequency PWM operating waveforms). For best results, the PWM frequency should be
maintained above the minimum specified value of 10kHz, in order to minimize ripple at the output of the filter. The shutdown
comparator has approximately 50mV of hysteresis, to minimize erratic switching due to this ripple. An upper PWM frequency
limit of approximately one tenth of the operating frequency is recommended, to avoid excessive output modulation and to avoid
injecting excessive noise into the internal reference.
Figure 3. High Frequency PWM operating waveforms
The nominal average value of output current in this mode is given by:
IOUTnom »0.1DPWM/RS for DPWM >0.16
This mode will give minimum output ripple and reduced radiated emission, but with a reduced dimming range (approx.5:1). The
restricted dimming range is a result of the device being turned off when the DC component on the filter output falls below
200mV.
Shutdown mode
Taking the ADJ pin to a voltage below 0.2V for more than approximately 100μs, will turn off the output and supply current will
fall to a low standby level of 15μA nominal.
Note that the ADJ pin is not a logic input. Taking the ADJ pin to a voltage above VREF will increase output current above the
100% nominal average value. (See graphs for details).
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Application Information (Continued)
Soft-start
The device has inbuilt soft-start action due to the delay through the PWM filter. An external capacitor from the ADJ pin to
ground will provide additional soft-start delay, by increasing the time taken for the voltage on this pin to rise to the turn-on
threshold and by slowing down the rate of rise of the control voltage at the input of the comparator. With no external capacitor,
the time taken for the output to reach 90% of its final value is approximately 500μs. Adding capacitance increases this delay by
approximately 0.5ms/nF.
The graph below shows the variation of soft-start time for different values of capacitor.
Inherent open-circuit LED protection
If the connection to the LED(s) is open-circuited, the coil is isolated from the LX pin of the chip, so the device will not be
damaged, unlike in many boost converters, where the back EMF may damage the internal switch by forcing the drain above its
breakdown voltage.
Capacitor selection
A low ESR capacitor should be used for input decoupling, as the ESR of this capacitor appears in series with the supply
source impedance and lowers overall efficiency. This capacitor has to supply the relatively high peak current to the coil and
smooth the current ripple on the input supply. A minimum value of 1μF is acceptable if the input source is close to the device,
but higher values will improve performance at lower input voltages, especially when the source impedance is high. The input
capacitor should be placed as close as possible to the IC.
For maximum stability over temperature and voltage, capacitors with X7R, X5R, or better dielectric are recommended.
Capacitors with Y5V dielectric are not suitable for decoupling in this application and should NOT be used.
A table of recommended manufacturers is provided below:
Manufacturer
Website
Murata
www.murata.com
Taiyo Yuden
www.t-yuden.com
Kemet
www.kemet.com
AVX
www.avxcorp.com
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ZXLD1350
Application Information (Continued)
Inductor Selection
Recommended inductor values for the ZXLD1350 are in the range 47mH to 220mH.
Higher values of inductance are recommended at higher supply voltages in order to minimize errors due to switching delays,
which result in increased ripple and lower efficiency. Higher values of inductance also result in a smaller change in output
current over the supply voltage range. (See graphs). The inductor should be mounted as close to the device as possible with
low resistance connections to the LX and VIN pins.
The chosen coil should have a saturation current higher than the peak output current and a continuous
current rating above the required mean output current.
Suitable coils for use with the ZXLD1350 are listed in the table below:
Part No.
DO1608C
MSS6132ML
CD104-MC
NP04SB470M
L
(mH)
47
47
68
100
220
47
DCR
(V)
0.64
0.38
0.58
0.82
0.55
0.27
ISAT
(A)
0.5
0.56
0.47
0.39
0.53
0.38
Manufacturer
CoilCraft
Sumida
Taiyo Yuden
The inductor value should be chosen to maintain operating duty cycle and switch 'on'/'off' times within the specified limits over
the supply voltage and load current range.
The following equations can be used as a guide, with reference to Figure 1 - Operating waveforms.
LX Switch 'On' time
LΔI
T O N = --------------------------------------------------------------------------------------V IN – V LED – I a v g ( RS + r L + RLX )
Note: TONnmin > 200ns
LX Switch 'Off' time
LΔI
T O FF = ----------------------------------------------------------------------V L ED + VD + I av g ( RS + r L )
Note: TOFFmin > 200ns
Where:
L is the coil inductance (H)
rL is the coil resistance (V)
Iavg is the required LED current (A)
DI is the coil peak-peak ripple current (A) {Internally set to 0.3 x Iavg}
VIN is the supply voltage (V)
VLED is the total LED forward voltage (V)
RLX is the switch resistance (V)
VD is the diode forward voltage at the required load current (V)
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Application Information (Continued)
Example:
For VIN =12V, L=47mH, rL=0.64V, VLED=3.4V, Iavg =350mA and VD =0.36V
TON = (47e-6 x 0.105)/(12 - 3.4 - 0.672) = 0.622ms
TOFF = (47e-6 x 0.105)/(3.4 + 0.36 + 0.322)= 1.21ms
This gives an operating frequency of 546kHz and a duty cycle of 0.34.
These and other equations are available as a spreadsheet calculator from the Diodes website.
Note that in practice, the duty cycle and operating frequency will deviate from the calculated values due to dynamic switching
delays, switch rise/fall times and losses in the external components.
Optimum performance will be achieved by setting the duty cycle close to 0.5 at the nominal supply voltage. This helps to
equalize the undershoot and overshoot and improves temperature stability of the output current.
Diode Selection
For maximum efficiency and performance, the rectifier (D1) should be a fast low capacitance Schottky diode with low reverse
leakage at the maximum operating voltage and temperature. The recommended diode for use with this part is the ZLLS1000.
This has approximately ten times lower leakage than standard Schottky diodes, which are unsuitable for use above 85°C. It
also provides better efficiency than silicon diodes, due to a combination of lower forward voltage and reduced recovery time.
The table below gives the typical characteristics for the ZLLS1000:
Diode
Forward Voltage
@ 100mA (mV)
ZLLS1000
310
Continuous
Current
(mA)
1000
Reverse Leakage
@ 30V 85°C
(mA)
300
Package
TSOT23
If alternative diodes are used, it is important to select parts with a peak current rating above the peak coil current and a
continuous current rating higher than the maximum output load current. It is very important to consider the reverse leakage of
the diode when operating above 85°C. Excess leakage will increase the power dissipation in the device.
The higher forward voltage and overshoot due to reverse recovery time in silicon diodes will increase the peak voltage on the
LX output. If a silicon diode is used, care should be taken to ensure that the total voltage appearing on the LX pin including
supply ripple, does not exceed the specified maximum value.
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ZXLD1350
Application Information (Continued)
Reducing Output Ripple
Peak to peak ripple current in the LED(s) can be reduced, if required, by shunting a capacitor Cled across the LED(s) as
shown below:
RS
VIN
LED
Cled
L1
D1
VIN
ISENSE
LX
ZXLD1350
A value of 1μF will reduce nominal ripple current by a factor three (approx.). Proportionally lower ripple can be achieved with
higher capacitor values. Note that the capacitor will not affect operating frequency or efficiency, but it will increase start-up
delay, by reducing the rate of rise of LED voltage.
Operation at low supply voltage
The internal regulator disables the drive to the switch until the supply has risen above the start-up threshold (VSU). Above this
threshold, the device will start to operate. However, with the supply voltage below the specified minimum value, the switch duty
cycle will be high and the device power dissipation will be at a maximum. Care should be taken to avoid operating the device
under such conditions in the application, in order to minimize the risk of exceeding the maximum allowed die temperature.
(See next section on thermal considerations).
Note that when driving loads of two or more LEDs, the forward drop will normally be sufficient to prevent the device from
switching below approximately 6V. This will minimize the risk of damage to the device.
Thermal considerations
When operating the device at high ambient temperatures, or when driving maximum load current, care must be taken to avoid
exceeding the package power dissipation limits. The graph below gives details for power derating. This assumes the device to
be mounted on a (25mm)2 PCB with 1oz copper standing in still air.
Note that the device power dissipation will most often be a maximum at minimum supply voltage. It will also increase if the
efficiency of the circuit is low. This may result from the use of unsuitable coils, or excessive parasitic output capacitance on the
switch output.
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ZXLD1350
Application Information (Continued)
Thermal compensation of output current
High luminance LEDs often need to be supplied with a temperature compensated current in order to maintain stable and
reliable operation at all drive levels. The LEDs are usually mounted remotely from the device, so for this reason, the
temperature coefficients of the internal circuits for the ZXLD1350 have been optimized to minimize the change in output
current when no compensation is employed. If output current compensation is required, it is possible to use an external
temperature sensing network - normally using Negative Temperature Coefficient (NTC) thermistors and/or diodes, mounted
very close to the LED(s). The output of the sensing network can be used to drive the ADJ pin in order to reduce output current
with increasing temperature.
Layout considerations
LX pin
The LX pin of the device is a fast switching node, so PCB tracks should be kept as short as possible. To minimize ground
'bounce', the ground pin of the device should be soldered directly to the ground plane.
Coil and decoupling capacitors
It is particularly important to mount the coil and the input decoupling capacitor close to the device to minimize parasitic
resistance and inductance, which will degrade efficiency. It is also important to take account of any track resistance in series
with current sense resistor RS.
ADJ pin
The ADJ pin is a high impedance input, so when left floating, PCB tracks to this pin should be as short as possible to reduce
noise pickup. A 100nF capacitor from the ADJ pin to ground will reduce frequency modulation of the output under these
conditions. An additional series 10kΩ resistor can also be used when driving the ADJ pin from an external circuit (see below).
This resistor will provide filtering for low frequency noise and provide protection against high voltage transients.
10k
ADJ
ZXLD1350
GND
100nF
GND
High voltage tracks
Avoid running any high voltage tracks close to the ADJ pin, to reduce the risk of leakage due to board contamination. Any such
leakage may raise the ADJ pin voltage and cause excessive output current. A ground ring placed around the ADJ pin will
minimize changes in output current under these conditions.
ZXLD1350
Document number: DS33468 Rev. 7 - 2
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ZXLD1350
Ordering Information
Device
Part
Mark
Package
Code
Packaging
(Note 4)
Reel size
(mm)
ZXLD1350ET5TA
1350
ET5
TSOT23-5
180
Reel
width
(mm)
8
Quantity
per reel
Part Number
Suffix
3000
TA
AEC-Q100
Level
Grade2
Package Outline Dimensions
TSOT23-5
ZXLD1350
Document number: DS33468 Rev. 7 - 2
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ZXLD1350
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Copyright © 2010, Diodes Incorporated
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ZXLD1350
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