ZETEX ZXSC410E6TA

ZXSC410
ZXSC420
VOLTAGE MODE BOOST CONVERTER
DESCRIPTION
The ZXSC410 is voltage mode boost converter in SOT23-6 package. Its excellent
load and line regulation means that for the full supply range from lithium Ion cells,
the output voltage will typically change by less than 1%. Using high efficiency
Zetex switching transistors allow output voltages of tens of volts depending on the
selected transistor. The ZXSC420 includes a battery low indicator. This operates
by indicating when the converter is no longer able to maintain the regulated
output voltage rather than setting a preset threshold, thereby making it suitable for
various battery options and load currents.
FEATURES
• 1.65V to 8V supply range
SOT23-6
• Typical output regulation of ±1%
• Over 85% typical efficiency
• Output currents up to 300mA
ORDERING INFORMATION
• 4.5␮A typical shutdown current ZXSC410
DEVICE
• End of regulation output ZXSC420
APPLICATIONS
• System power for battery portable products
REEL
SIZE
TAPE
WIDTH
QUANTITY
PER REEL
ZXSC410E6TA
7”
8mm
3000 units
ZXSC420E6TA
7”
8mm
3000 units
• LCD bias
• Local voltage conversion
TYPICAL APPLICATIONS DIAGRAM
L1
D1
VOUT
VIN
ZHCS1000
C1
Q1
FMMT617
U1
VCC
R2
C2
DRIVE
STDN SENSE
GND
VFB
ZXSC410
R1
R3
DEVICE MARKING
• C410 ZXSC410
• C420 ZXSC420
ISSUE 2 - May 2003
1
SEMICONDUCTORS
ZXSC410
ZXSC420
ABSOLUTE MAXIMUM RATINGS
VCC
DRIVE
EOR
STDN
VFB, SENSE
Operating Temp.
Storage Temp.
Power Dissipation
-0.3V to
-0.3V to
-0.3V to
-0.3V to
-0.3V to
-40°C to
-55°C to
450mW
+10V
VCC + 0.3V
VCC + 0.3V
The lower of (+5.0V) or (VCC + 0.3V)
The lower of (+5.0V) or (VCC + 0.3V)
+85°C
+125°C
* (ZXSC420 only)
* (ZXSC410 only)
ELECTRICAL CHARACTERISTICS
Test Conditions VCC= 3V, T= -40°C to 85°C unless otherwise stated.
Symbol
Parameter
Conditions
Limits
Min
Typ
Units
Max
Supply parameters
V CC
V CC Range
Iq 1
Quiescent Current
1.8
I STDN
Shutdown Current
Eff 2
Efficiency
50mA > I OUT > 300mA
Acc REF
Reference tolerance
1.8V < V CC < 8V
TCO REF
Reference Temp Co
T DRV
Discharge pulse width
F OSC
Operating Frequency
8
V CC = 8V
220
␮A
4.5
85
-3.0
%
3.0
0.005
1.8V < V CC < 8V
V
␮A
%
%/⬚C
␮s
1.7
200
kHz
Input parameters
V SENSE
sense voltage
I SENSE
sense input current
V FB =0V;V SENSE =0V
22
28
34
mV
-1
-7
-15
␮A
V FB
Feedback voltage
I FB 2
Feedback input current
T A = 25°C
291
300
V FB =0V;V SENSE =0V
-1.2
V IH
Shutdown high voltage
1.5
V IL
Shutdown low voltage
0
dV LN
Line voltage regulation
1
309
mV
-4.5
␮A
V CC
V
0.55
V
0.5
%/V
Output parameters
I OUT 3
Output current
V IN > 2V, V OUT = V IN
I DRIVE
Transistor drive current
V DRIVE = 0.7V
2
V DRIVE
Transistor voltage drive
1.8V < V CC < 8V
0
C DRIVE
Mosfet gate drive cpbty
VOH EOR
EOR Flag output high
VOL EOR
EOR Flag output low
I EOR = 1mA
T EOR
EOR delay time
T A = 25°C
dI LD
Load current regulation
300
mA
3.4
5
V
V CC
V
300
I EOR = -300nA
2.5
0
70
195
mA
V CC -0.4
pF
1.15
V
250
␮s
0.01
%mA
Note
1
2 Excluding gate/base drive current.
3 IFB is typically half of these values at
3V
System not device spec, including recommended transistors.
ISSUE 2 - May 2003
SEMICONDUCTORS
2
ZXSC410
ZXSC420
TYPICAL CHARACTERISTICS
ISSUE 2 - May 2003
3
SEMICONDUCTORS
ZXSC410
ZXSC420
DEVICE DESCRIPTION
Block Diagrams
Bandgap Reference
All threshold voltages and internal currents are derived
from a temperature compensated bandgap reference
circuit with a reference voltage of 1.22V nominal.
VCC
STDN
Bandgap
Reference
Shutdown
Dynamic Drive Output
Depending on the input signal, the output is either
“LOW” or “HIGH”. In the high state a 2.5mA current
source (max drive voltage = VCC-0.4V) drives the base
or gate of the external transistor. In order to operate the
external switching transistor at optimum efficiency,
both output states are initiated with a short transient
current in order to quickly discharge the base or the
gate of the switching transistor.
Bias Generator
R1
+
Comp 1
_
R2
+
Comp 2
_
Switching Circuit
The switching circuit consists of two comparators,
Comp1 and Comp2, a gate U1, a monostable and the
drive output. Normally the DRIVE output is “HIGH”; the
external switching transistor is turned on. Current
ramps up in the inductor, the switching transistor and
external current sensing resistor. This voltage is
sensed by comparator, Comp2, at input ISENSE. Once
the current sense voltage across the sensing resistor
exceeds 20mV, comparator Comp2 through gate U1
triggers a re-triggerable monostable and turns off the
output drive stage for 2µs. The inductor discharges to
the load of the application. After 2µs a new charge cycle
begins, thus ramping the output voltage. When the
output voltage reaches the nominal value and VFB gets
an input voltage of more than 300mV, the monostable
is forced “on” from Comp1 through gate U1, until the
feedback voltage falls below 300mV. The above action
continues to maintain regulation.
U1
Monostable
2µs
Dynamic
Drive
DRIVE
R3
GND VFB
SENSE
Fig. 1 ZXSC410
EOR, End of Regulation Detector
The EOR circuit is a retriggerable 120µs monostable,
which is re-triggered by every down regulating action
of comparator Comp1. As long as regulation takes
place, output EOR is “HIGH“ (high impedance, 100K to
VCC). Short dips of the output voltage of less than
120µs are ignored. If the output voltage falls below the
nominal value for more than 120µs, output EOR goes
”LOW“. The reason for this to happen is usually a
slowly progressing drop of input voltage from the
discharging battery. Therefore the output voltage will
also start to drop slowly. With the EOR detector,
batteries can be used to the ultimate end of discharge,
with enough time left for a safe shutdown.
Fig. 1 ZXSC420
ISSUE 2 - May 2003
SEMICONDUCTORS
4
ZXSC410
ZXSC420
PIN DESCRIPTIONS
Pin No.
Name
Description
1
V CC
Supply voltage, 1.8V to 8V.
2
GND
Ground
3
STDN/EOR
Shutdown ZXSC410 / End of regulation ZXSC420
4
SENSE
Inductor current sense input. Internal threshold voltage set to
28mV. Connect external sense resistor.
5
V FB
Reference voltage. Internal threshold set to 300mV. Connect
external resistor network to set output voltage.
6
DRIVE
Drive output for external switching transistor. Connect to base or
gate of external switching transistor.
APPLICATIONS INFORMATION
Switching transistor selection
Inductor Selection
The choice of switching transistor has a major impact
on the converter efficiency. For optimum performance,
a bipolar transistor with low VCE(SAT) and high gain is
required. The VCEO of the switching transistor is also an
important parameter as this sees the full output
voltage when the transistor is switched off. Zetex
SuperSOT™ transistors are an ideal choice for this
application.
The inductor value must be chosen to satisfy
performance, cost and size requirements of the overall
solution.
Schottky diode selection
A list of recommended inductors is listed in the table
below:
Inductor selection has a significant impact on the
converter performance. For applications where
efficiency is critical, an inductor with a series resistance
of 500m⍀ or less should be used.
As with the switching transistor, the Schottky rectifier
diode has a major impact on the converter efficiency. A
Schottky diode with a low forward voltage and fast
recovery time should be used for this application.
Part No.
The diode should be selected so that the maximum
forward current rating is greater or equal to the
maximum peak current in the inductor, and the
maximum reverse voltage is greater or equal to the
output voltage. The Zetex ZHCS Series meet these
needs.
Combination devices
Manufacture
L
I PK R DC
(A) ( )
CMD4D11-100MC Sumida
10µH 0.5 0.457
CMD4D11-220MC Sumida
22µH 0.4 0.676
LPO2506OB-103
Coilcraft
10µH 1.0 0.24
ST2006103
Standex
Electronics Inc
10µH 0.6
0.1
Peak current definition
To minimise the external component count Zetex
recommends the ZX3CDBS1M832 combination of
NPN transistor and Schottky diode in a 3mm x 2mm
MLP package. This device is recommended for use in
space critical applications.
In general, the IPK value must be chosen to ensure that
the switching transistor, Q1, is in full saturation with
maximum output power conditions, assuming
worse-case input voltage and transistor gain under all
operating temperature extremes.
The IC is also capable of driving MOSFETs. Zetex
recommends the ZXMNS3BM832 combination of low
threshold voltage N-Channel MOSFET and Schottky
diode in a 3mm x 2mm MLP package. This device is
recommended for use in space critical applications.
Once IPK is decided the value of RSENSE can be
determined by:
RSENSE =
VSENSE
IPK
ISSUE 2 - May 2003
5
SEMICONDUCTORS
ZXSC410
ZXSC420
Sense Resistor
A low value sense resistor is required to set the peak
current. Power in this resistor is negligible due to the
low sense voltage threshold, VSENSE. Below is a table
of recommended sense resistors:
Manufacture
Series
R DC (⍀)
Range
Size
Tolerance
URL
Cyntec
RL1220
0.022 - 10
0805
±5%
http://www.cyntec.com
IRC
LR1206
0.010 - 1.0
1206
±5%
http://www.ictt.com
Output power calculation
Output capacitors
By making the above assumptions for inductance and
peak current the output power can be determined by:
Output capacitors are a critical choice in the overall
performance of the solution. They are required to filter
the output and supply load transient currents. There
are three parameters which are paramount in the
selection of the output capacitors, capacitance, IRIPPLE
and ESR. The capacitance value is selected to meet the
load transient requirements. The capacitors IRIPPLE
rating must meet or exceed the current ripple of the
solution.
POUT = IAV x VIN x ␩ = (Watts)
where
IAV =
IPK (TON + T DIS)
X
2 (TON + T OFF )
The ESR of the output capacitor can also affect loop
stability and transient performance. The capacitors
selected for the solutions, and indicated in the
reference designs, are optimised to provide the best
overall performance.
and
TON =
IPK x L
VIN
Input capacitors
and
The input capacitor is chosen for its voltage and RMS
current rating. The use of low ESR electrolitic or
tantalum capacitors is recommended. Capacitor
values for optimum performance are suggested in the
reference design section
IPK x L
TDIS =
VOUT - VIN
and
Also note that the ESR of the input capcitor is
effectively in series with the input and hence
contributes to efficiency losses in the order of IRMS2 .
ESR.
TOFF ≅ 1.7µs (internally set by ZXSC410)
and
␩ = efficiency i.e. 100% = 1
Operating frequency can be derived by:
F=
1
TON + TOFF
ISSUE 2 - May 2003
SEMICONDUCTORS
6
ZXSC410
ZXSC420
Output voltage adjustment
Layout issues
The ZXSC410/420 are adjustable output converters
allowing the end user the maximum flexibilty. For
adjustable operation a potential divider network is
connected as follows:
Layout is critical for the circuit to function in the most
efficient manner in terms of electrical efficiency,
thermal considerations and noise.
For ‘step-up converters’ there are four main current
loops, the input loop, power-switch loop, rectifier loop
and output loop. The supply charging the input
capacitor forms the input loop. The power-switch loop
is defined when Q1 is ‘on’, current flows from the input
through the inductor, Q1, RSENSE and to ground. When
Q1 is ‘off’, the energy stored in the inductor is
transferred to the output capacitor and load via D1,
forming the rectifier loop. The output loop is formed by
the output capacitor supplying the load when Q1 is
switched back off.
VOUT
RA
VFB
RB
To optimise for best performance each of these loops
kept separate from each other and interconnected with
short, thick traces thus minimising parasitic
inductance, capacitance and resistance. Also the
RSENSE resistor should be connected, with minimum
trace length, between emitter lead of Q1 and ground,
again minimising stray parasitics.
GND
The output voltage is determined by the equation:
 RA 
VOUT = VFB 1+
 RB 
where VFB=300mV
The resistor values, RA and RB, should be maximised
to improve efficiency and decrease battery drain.
Optimisation can be achieved by providing a minimum
current of IFB(MAX)=200nA to the VFB pin. Output is
adjustable from VFB to the (BR)VCEO of the switching
transistor, Q1.
Note: For the reference designs, RA is assigned the
label R2 and RB the label R3.
CONNECTION DIAGRAMS
ZXSC410
ZXSC420
SOT23-6
SOT23-6
VCC
GND
DRIVE
VFB
VCC
GND
DRIVE
VFB
STDN
SENSE
EOR
SENSE
ISSUE 2 - May 2003
7
SEMICONDUCTORS
ZXSC410
ZXSC420
REFERENCE DESIGNS
ZXSC410 DC-DC Controller
VIN=2.5V to 4.2V
VOUT=5V; ILOAD=100mA
Bill of Materials
Ref
Part Number
Manufacture
Comments
U1
Value
ZXSC410E6
Zetex
DC-DC converter IC
U2
ZX3CDBS1M832
Zetex
Low sat NPN + 1A Schottky
L1
22µH
CMD4D11-220
Sumida
1mm height profile
R1
100mΩ
LR1206 / RL1220
IRC / Cyntec
1206 / 0805 size
R2
16kΩ
Generic
Generic
0603 size
R3
1kΩ
Generic
Generic
0603 size
C1
22µF/6V3
GRM Series
Murata
1206 size
C2
22µF/6V3
GRM Series
Murata
1206 size
C3
1nF
Generic
Generic
0603 size
ISSUE 2 - May 2003
SEMICONDUCTORS
8
ZXSC410
ZXSC420
Performance Graphs
V=1V/DIV; T=10µS/DIV
V=50mV/DIV; T=10µS/DIV
Switching Waveform
Output Ripple
ISSUE 2 - May 2003
9
SEMICONDUCTORS
ZXSC410
ZXSC420
ZXSC410 as Triple Output TFT Bias
AVDD=9V/180mA
VON=18V/10mA
VOFF=9V/10mA
ZXSC410 as Triple Output TFT Bias
AVDD=9V/180mA
VON=27V/10mA
VOFF=9V/10mA
ISSUE 2 - May 2003
SEMICONDUCTORS
10
ZXSC410
ZXSC420
Sequencing AVDD and VON
By adding the circuit below to the LCD bias output (VON) of
the converter a 10ms delay can be achieved between
AVDD power up and VON power up. The circuit operates by
a delay in turning the PMOS transistor on, which transfers
to a 10ms delay between input and output of the circuit.
The delay is set by the RC time constant of R1 and C1.
The diode, D1, discharges the gate of the PMOS when
the main system supply is turned off, guaranteeing a
delay every turn on cycle.
ISSUE 2 - May 2003
11
SEMICONDUCTORS
ZXSC410
ZXSC420
PACKAGE OUTLINE
PAD LAYOUT DETAILS
e
b
L 2
E1
E
DATUM A
a
e1
D
C
A
A2
A1
CONTROLLING DIMENSIONS IN MILLIMETRES APPROX CONVERSIONS INCHES.
PACKAGE DIMENSIONS
Millimetres
Inches
DIM
Millimetres
Inches
DIM
Min
Max
Min
Max
Min
Max
Min
Max
A
0.90
1.45
0.35
0.057
E
2.60
3.00
0.102
0.118
A1
0.00
0.15
0
0.006
E1
1.50
1.75
0.059
0.069
A2
0.90
1.30
0.035
0.051
L
0.10
0.60
0.004
0.002
b
0.35
0.50
0.014
0.019
e
0.95 REF
0.037 REF
C
0.09
0.20
0.0035
0.008
e1
1.90 REF
0.074 REF
D
2.80
3.00
0.110
0.118
L
0°
10°
0°
10°
© Zetex plc 2003
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For the latest product information, log on to
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ISSUE 2 - May 2003
SEMICONDUCTORS
12
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