DIODES ZXT12P40DXTC

ZXT12P40DX
SuperSOT4™
DUAL 40V PNP SILICON LOW SATURATION SWITCHING TRANSISTOR
SUMMARY
VCEO=-40V; RSAT = 75m ; IC= -2A
DESCRIPTION
This new 4th generation ultra low saturation transistor utilises the Zetex
matrix structure combined with advanced assembly techniques to give
extremely low on state losses. This makes it ideal for high efficiency, low
voltage switching applications.
MSOP8
FEATURES
•
Extremely Low Equivalent On Resistance
•
Extremely Low Saturation Voltage
•
hFE characterised up to 5A
•
IC=2A Continuous Collector Current
•
MSOP8 package
C2
C1
B1
B2
APPLICATIONS
•
DC - DC Converters
•
Power Management Functions
•
Power switches
•
Motor control
E1
ZXT12P40DXTA
7
12mm embossed
1000 units
ZXT12P40DXTC
13
12mm embossed
4000 units
2
Top View
DEVICE MARKING
T12P40DX
ISSUE 2 - DECEMBER 2006
1
8
B2
7
QUANTITY
PER REEL
C1
6
TAPE WIDTH
(mm)
C1
C2
5
REEL SIZE
(inches)
E2
3
DEVICE
B1
4
E1
ORDERING INFORMATION
1
E2
C2
ZXT12P40DX
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
SYMBOL
LIMIT
UNIT
Collector-Base Voltage
V CBO
-50
V
Collector-Emitter Voltage
V CEO
-40
V
Emitter-Base Voltage
V EBO
-7.5
V
Peak Pulse Current
I CM
-5
A
Continuous Collector Current
IC
-2
A
Base Current
IB
-500
mA
Power Dissipation at TA=25°C (a)(d)
Linear Derating Factor
PD
0.87
6.9
W
mW/°C
Power Dissipation at TA=25°C (a)(e)
Linear Derating Factor
PD
1.04
8.3
W
mW/°C
Power Dissipation at TA=25°C (b)(d)
Linear Derating Factor
PD
1.25
10
W
mW/°C
Operating and Storage Temperature Range
T j :T stg
-55 to +150
°C
THERMAL RESISTANCE
PARAMETER
SYMBOL
VALUE
UNIT
Junction to Ambient (a)(d)
R θJA
143
°C/W
Junction to Ambient (b)(d)
R θJA
100
°C/W
Junction to Ambient (a)(e)
R θJA
120
°C/W
NOTES
(a) For a device surface mounted on 25mm x 25mm FR4 PCB with high coverage of single sided 1oz copper,
in still air conditions
(b) For a device surface mounted on FR4 PCB measured at t⭐5 secs.
(c) Repetitive rating - pulse width limited by maximum junction temperature. Refer to Transient Thermal
Impedance graph.
(d) For device with one active die.
(e) For device with two active die running at equal power.
ISSUE 2 - DECEMBER 2006
2
ZXT12P40DX
CHARACTERISTICS
ISSUE 2 - DECEMBER 2006
3
ZXT12P40DX
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL
MIN.
TYP.
Collector-Base Breakdown
Voltage
V (BR)CBO
-50
Collector-Emitter Breakdown
Voltage
V (BR)CEO
Emitter-Base Breakdown Voltage
V (BR)EBO
Collector Cut-Off Current
I CBO
Emitter Cut-Off Current
UNIT
CONDITIONS.
-95
V
I C =-100␮A
-40
-80
V
I C =-10mA*
-7.5
-8.5
V
I E =-100␮A
-100
nA
V CB =-40V
I EBO
-100
nA
V EB =-6V
Collector Emitter Cut-Off Current
I CES
-100
nA
V CES =-40V
Collector-Emitter Saturation
Voltage
V CE(sat)
-22
-215
-260
-190
mV
mV
mV
mV
I C =-0.1A, I B =-10mA*
I C =-1A, I B =-20mA*
I C =-2A, I B =-100mA*
I C =-2A, I B =-200mA*
Base-Emitter Saturation Voltage
V BE(sat)
-0.92
-1.0
V
I C =-2A, I B =-100mA*
Base-Emitter Turn-On Voltage
V BE(on)
-0.80
-0.85
V
I C =-2A, V CE =-2V*
Static Forward Current Transfer
Ratio
h FE
Transition Frequency
fT
130
MHz
I C =-30mA, V CE =-10V
f=-50MHz
Output Capacitance
C obo
35
pF
V CB =-10V, f=1MHz
Turn-On Time
t (on)
97
ns
Turn-Off Time
t (off)
640
ns
V CC =-10V, I C =-1A
I B1 =I B2 =-20mA
-18
-155
-190
-150
300
300
150
10
450
450
300
25
MAX.
*Measured under pulsed conditions. Pulse width=300µs. Duty cycle ≤ 2%
ISSUE 2 - DECEMBER 2006
4
I C =-10mA, V CE =-2V*
I C =-1A, V CE =-2V*
I C =-2A, V CE =-2V*
I C =-5A, V CE =-2V*
900
ZXT12P40DX
TYPICAL CHARACTERISTICS
ISSUE 2 - DECEMBER 2006
5
ZXT12P40DX
PAD LAYOUT DETAILS
PACKAGE DIMENSIONS
D
6 5
2
3 4
E
H
8 7
1
eX6
θ°
A1
B
L
C
Conforms to JEDEC MO-187 Iss A
DIM
Millimetres
Inches
MIN
MIN
A
MAX
1.10
MAX
0.043
A1
0.05
0.15
0.002
0.006
B
0.25
0.40
0.010
0.016
C
0.13
0.23
0.005
0.009
D
2.90
3.10
0.114
0.122
e
0.65
BSC
0.0256
BSC
E
2.90
3.10
0.114
0.122
H
4.90
BSC
0.193
BSC
L
0.40
0.70
0.016
0.028
q°
0°
6°
0°
6°
Europe
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This publication is issued to provide outline information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for
any purpose or form part of any order or contract or be regarded as a representation relating to the products or services concerned. The Company reserves
© 2006
Published
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Semiconductors
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design, price or conditions of supply of any product or service.
ISSUE 2 - DECEMBER 2006
6
Part no.
Definitions
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The circuits in this design/application note are offered as design ideas. It is the responsibility of the user to ensure that the circuit is fit for
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or
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