REVISIONS LTR DESCRIPTION A DATE (YR-MO-DA) APPROVED 02-04-18 Raymond Monnin Drawing updated to reflect current requirements. - lgt REV SHEET REV SHEET REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Dan Wonnell STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 http://www.dscc.dla.mil CHECKED BY Sandra Rooney APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, CMOS, 16-BIT, 20 KHz, A/D CONVERTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 92-12-16 REVISION LEVEL A SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. 1 OF 5962-91692 14 5962-E355-02 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 91692 Federal stock class designator \ RHA designator (see 1.2.1) 01 M X X Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type 01 02 Generic number Circuit function SEI5102A-S SEI5102A-T Linearity error ±3.0 LSB ±2.0 LSB 16-bit, 20 kHz analog to digital converter 16-bit, 20 kHz analog to digital converter 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X 3 GDIP1-T28 or CDIP2-T28 CQCC1-N28 28 28 Dual-in-line Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 2 1.3 Absolute maximum ratings. 1/ 2/ Positive digital supply (+VD) voltage range ........................................... -0.3 V dc to +6.0 V dc 3/ Negative digital supply (-VD) voltage range .......................................... +0.3 V dc to -6.0 V dc Positive analog supply (+VA) voltage range.......................................... -0.3 V dc to +6.0 V dc Negative analog supply (-VA) voltage range ......................................... +0.3 V dc to -6.0 V dc Input current, any pin except supplies .................................................. ±10 mA 4/ Analog input voltage (AIN and VREF pins)........................................... (-VA) – 0.3 V dc to (+VA) + 0.3 V dc Digital input voltage .............................................................................. -0.3 V dc to (+VA) + 0.3 V dc Storage temperature range................................................................... -65°C to +150°C Lead temperature (soldering, 10 seconds) ........................................... +260°C Junction temperature (TJ) ..................................................................... +160°C Power dissipation (PD) .......................................................................... 72 mW Thermal resistance, junction-to-case (θJC) ........................................... See MIL-STD-1835 Thermal resistance, junction-to-ambient (θJA) Case J ............................................................................................... 40°C/W Case 3............................................................................................... 60°C/W 1.4 Recommended operating conditions. 1/ Ambient operating temperature range (TA)........................................... -55°C to +125°C Positive digital supply voltage (+VD) ..................................................... +4.50 V dc to +VA Negative digital supply voltage (-VD)..................................................... -4.50 V dc to -5.50 V dc Positive analog supply voltage (+VA).................................................... +4.50 V dc to +5.50 V dc Negative analog supply voltage (-VA) ................................................... -4.50 V dc to -5.50 V dc Analog reference voltage (VREF)......................................................... +2.50 V dc to (+VA) -0.5 V dc Analog input voltage range: Unipolar............................................................................................. AGND V dc to VREF Bipolar ............................................................................................... -VREF to VREF 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 MIL-STD-1835 - 1/ 2/ 3/ 4/ Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. All voltages referenced to AGND and DGND tied together. Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. In addition, +VD must not be greater than (+VA) + 0.3 V dc. Transient currents of up to 100 mA will not cause latch-up. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 3 HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 4 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 81 (see MIL-PRF-38535, appendix A). 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. (2) TA = +125°C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 5 TABLE I. Electrical performance characteristics. Test Symbol Resolution for which no missing codes is guaranteed Integral linearity error Full-scale error Min 16 2/ 1, 2, 3 01 ±3.0 02 ±2.0 ∆VOFF/∆t BOFF ∆BOFF/∆t BNFSE 2/ 2/ 3/ 4/ 2/ 2/ 3/ 4/ 2/ 2/ 3/ 4/ 2/ LSB 01 ±5.0 ±3.0 2, 3 All ±4.0 LSB 1, 2, 3 01 ±5.0 LSB 02 ±3.0 2, 3 All ±4.0 LSB 1, 2, 3 01 ±5.0 LSB 02 ±3.0 2, 3 All ±4.0 LSB 1, 2, 3 01 ±5.0 LSB 02 ±3.0 2, 3 All ±4.0 1, 2, 3 All LSB LSB 2.0 V 0.8 VIL 5/ 6/ 1, 2, 3 All ±10 µA VOL 5/ 6/ Logic “0”, ISINK = -1.6 mA 1, 2, 3 All 0.4 V VOH 5/ 6/ IIN Logic “1”, +VD -1.0 ISOURCE = 100 µA Positive analog supply current Negative analog supply current Positive digital supply current Negative digital supply current Analog input capacitance in fine charge mode Bits 02 1, 2, 3 Bipolar negative full-scale ∆BNFSE/∆t 2/ 3/ 4/ error drift 5/ 6/ 7/ Digital input voltage VIH Digital output voltage Max INL VOFF Digital input current Unit All ∆FSE/∆t Bipolar negative full-scale error 1/ Limits 1, 2, 3 Unipolar offset error Bipolar offset error drift Device type 2/ FSE Bipolar offset error Group A subgroups RES Full-scale error drift Unipolar offset error drift Conditions -55°C ≤ TA ≤+125°C unless otherwise specified IA+ 2/ 6/ 8/ +VA = 5.5 V dc 1, 2, 3 All 3.5 mA IA- 2/ 6/ 8/ -VA = -5.5 V dc 1, 2, 3 All -3.5 mA ID+ 2/ 6/ 8/ +VD = 5.5 V dc 1, 2, 3 All 3.5 mA ID- 2/ 6/ 8/ -VD = -5.5 V dc 1, 2, 3 All -2.5 mA CIN 2/ 3/ Unipolar mode 4 All 425 pF 2/ 3/ Bipolar mode 265 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 6 TABLE I. Electrical performance characteristics – Continued. Test Symbol Peak harmonic or spurious noise Signal to noise ratio Conditions -55°C ≤ TA ≤+125°C unless otherwise specified Group A subgroups Device type 01 S/PN 2/ 4, 5, 6 S/(N+D) 2/ 4, 5, 6 Acquisition time tACQ Conversion time tC 1/ Limits Min 94 02 98 01 87 02 90 Unit Max dB dB 9 All 9.375 µs 2/ 6/ 9, 10, 11 All 40.63 µs 2/ 3/ 9/ 2/ 6/ 9, 10, 11 All 20 kHz tRST 3/ 5/ 10/ (see figure 3) 9, 10, 11 All 150 ns tDFSH4 5/ 6/ 10/ 11/ (see figure 4a) 9, 10, 11 All HOLD to TRK1 , TRK 2 , falling tDFSH1 5/ 6/ 10/ 12/ (see figure 4b) 9, 10, 11 All HOLD pulse width tHOLD 5/ 6/ 10/ 12/ (see figure 5) 9, 10, 11 HOLD to CH1 / 2 edge tDHLRI 5/ 6/ 10/ 12/ (see figure 5) HOLD falling to CLKIN falling SCLK input pulse period tHCF Throughput ftp RST pulse width 68 tclk +260 ns 66 tclk 68 tclk +260 ns All 1 tclk +20 63 tclk ns 9, 10, 11 All 15 64 tclk ns 5/ 6/ 10/ 12/ (see figure 6) 9, 10, 11 All 95 1 tclk +10 ns tSCLK 5/ 6/ 10/ (see figure 7a) PDT and RBT modes 9, 10, 11 All 200 ns SCLK input pulse width low tSCLKL 5/ 6/ 10/ (see figure 7) PDT and RBT modes 9, 10, 11 All 50 ns SCLK input pulse width high tSCLKH 5/ 6/ 10/ (see figure 7) PDT and RBT modes 9, 10, 11 All 50 ns CH1 / 2 edge to TRK1 , TRK 2 , falling SCLK input falling to SDATA valid tDSS 5/ 6/ 10/ (see figures 7 and 8) PDT and RBT modes 9, 10, 11 All SDATA valid before rising SCLK tSS 5/ 6/ 10/ (see figure 8b) FRN and SSC modes 9, 10, 11 All 2 tclk -100 ns SDATA valid after rising SCLK tSH 5/ 6/ 10/ (see figure 7b) FRN and SSC modes 9, 10, 11 All 2 tclk -100 ns tRSDL 5/ 6/ 10/ (see figure 7b) FRN and SSC modes 9, 10, 11 All tHFS 5/ 6/ 10/ (see figure 7b) FRN and SSC modes 9, 10, 11 All tDHS 5/ 6/ 10/ (see figure 8a) PDT mode 9, 10, 11 All Last rising SCLK to SDL rising HOLD falling to 1 falling SCLK st HOLD falling to SDATA valid 150 6 tclk ns 2 tclk +200 ns 8 tclk +200 ns 230 ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 7 TABLE I. Electrical performance characteristics – Continued. Test Symbol Conditions -55°C ≤ TA ≤+125°C unless otherwise specified Group A subgroups Device type 1/ Limits Min Unit Max 125 ns 10 µs TRK1 , TRK 2 falling to SDATA valid CLKIN period tDTS 5/ 6/ 10/ 13/ (see figure 8b) 9, 10, 11 All tCLK 3/ 5/ 6/ 10/ 14/ (see figure 6) 9, 10, 11 All 0.5 CLKIN low time tCLKL 5/ 6/ 10/ (see figure 6) 9, 10, 11 All 200 ns CLKIN high time tCLKH 5/ 6/ 10/ (see figure 6) 9, 10, 11 All 200 ns 1/ The limiting terms “min” (minimum) and “max” (maximum) shall be considered to apply to magnitudes only. Negative current shall be defined as conventional current flow out of a device terminal. 2/ Unless otherwise specified, +VA, +VD = +5.0 V dc; -VA, -VD = -5.0 V dc; VREF = +4.5 V dc; CLKIN = 1.6 MHz; fs = 20 kHz; bipolar mode; FRN mode; AIN1 and AIN2 tied together; each channel tested separately; analog source impedance = 50 Ω with 1000 pF to AGND; 200 Hz full scale input sine wave; error tests are done after calibration at the temperature of interest; logic “0” inputs are 0 V dc; logic “1” inputs are +VD. 3/ This parameter shall be measured only for initial characterization and after process or design changes which may affect this parameter. 4/ Total drift over -55°C to +125°C since calibration at power-up at +25°C . 5/ +VA, +VD = +5.0 V dc ±10 percent; -VA, -VD = -5.0 V dc ±10 percent. 6/ This parameter is guaranteed, if not tested, at TA = +25°C. This parameter is tested at TA = -55°C to +125°C. 7/ Guaranteed at VIH = 2.0 V dc, VIL = 0.8 V dc. Tested at VIH = +VD, VIL = 0 V dc. 8/ All outputs unloaded; inputs: Logic “0” = 0 V dc, Logic “1” = +VD. 9/ Acquisition time is the time allowed by the converter for acquisition of the input voltage prior to conversion. 10/ Inputs: Logic “0” = 0 V dc, Logic “1” = +VD; CL = 50 pF. 11/ These times are for FRN mode. 12/ These times are for SSC, PDT and RBT mode. 13/ Only valid for TRK1 , TRK 2 falling when SCLK is low. If SCLK is high when TRK1 , TRK 2 falls, then SDATA is valid tDSS time after the next falling clock. 14/ Clock speeds of less than 1.6 MHz, at temperatures > +100°C, will degrade DNL performance. Minimum CLKIN period is 0.625 µs in FRN mode (20 kHz sample rate). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 8 Device type 01 and 02 Case outline X, 3 Terminal number Terminal symbol 1 -VD 2 3 RST CLKIN 4 XOUT 5 6 STBY DGND 7 +VD 8 TRK1 9 TRK 2 10 11 CRS/ FIN SSH/SDL 12 HOLD 13 14 CH1/ 2 SCLK 15 SDATA 16 CODE 17 18 BP/ UP OUTMOD 19 AIN1 20 VREF 21 REFBUF 22 AGND 23 -VA 24 AIN2 25 +VA 26 27 TEST SCKMOD 28 SLEEP FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 9 FIGURE 2. Block diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 10 FIGURE 3. Reset timing. FIGURE 4. Control output timing. FIGURE 5. Channel selection timing. FIGURE 6. Start conversion timing. NOTE: All measurements taken at 50 percent of the rise and fall edges. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 11 FIGURE 7. Serial data timing. FIGURE 8. Data transmission timing. NOTE: All measurements taken at 50 percent of the rise and fall edges. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 12 TABLE II. Electrical test requirements. Test requirements Interim electrical parameters (see 4.2) Final electrical parameters (see 4.2) Group A test requirements (see 4.4) Group C end-point electrical parameters (see 4.4) Group D end-point electrical parameters (see 4.4) Group E end-point electrical parameters (see 4.4) Subgroups (in accordance with MIL-STD-883, method 5005, table I) Device class M 1, 4 Subgroups (in accordance with MIL-PRF-38535, table III) Device class Q 1, 4 Device class V 1, 4 1/ 1, 2, 3, 4, 5, 6, 10, 11 1/ 1, 2, 3, 4, 5, 6, 10, 11 1/ 1, 2, 3, 4, 5, 6, 10, 11 2/ 1, 2, 3, 4, 5, 6, 9, 10, 11 2/ 1, 2, 3, 4, 5, 6, 9, 10, 11 2/ 1, 2, 3, 4, 5, 6, 9, 10, 11 1, 4, 9 1, 4, 9 1, 2, 3, 4, 5, 6, 9, 10, 11 1, 4, 9 1, 4, 9 1, 4, 9 ------- ------- ------- 1/ PDA applies to subgroup 1. 2/ Subgroup 9 will be guaranteed if not tested. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 7 and 8 in table I, method 5005 of MIL-STD-883 shall be omitted. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. b. TA = +125°C, minimum. b. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 13 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table II herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C ±5°C, after exposure, to the subgroups specified in table II herein. c. When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43216-5000, or telephone (614) 692-0547. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-91692 A REVISION LEVEL A SHEET 14 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 02-04-18 Approved sources of supply for SMD 5962-91692 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. Standard microcircuit drawing PIN 1/ 5962-9169201MXA 5962-9169201M3A 5962-9169202MXA 5962-9169202M3A Vendor CAGE number 68911 68911 68911 68911 Vendor similar PIN 2/ SEI5102A-SDB SEI5102A-SEB SEI5102A-TDB SEI5102A-TEB 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number 68911 Vendor name and address Maxwell Technologies Electronics Components Group, Inc. 9244 Balboa Ave. San Diego, CA 92123 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.