Revised November 1999 74AC00 • 74ACT00 Quad 2-Input NAND Gate General Description Features The AC/ACT00 contains four 2-input NAND gates. ■ ICC reduced by 50% ■ Outputs source/sink 24 mA ■ ACT00 has TTL-compatible inputs Ordering Code: Order Number Package Number Package Description M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 74AC00SC 74AC00SJ 74AC00MTC M14D MTC14 14-Lead Small Outline Package (SOP), EIAJ Type II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74AC00PC N14A 74ACT00SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 74ACT00SJ M14D 14-Lead Small Outline Package (SOP), EIAJ Type II, 5.3mm Wide 74ACT00MTC 74ACT00PC MTC14 N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering form. (PC not available in Tape and Reel.) Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description An , Bn Inputs On Outputs FACT is a trademark of Fairchild Semiconductor Corporation. © 1999 Fairchild Semiconductor Corporation DS009911 www.fairchildsemi.com 74AC00 • 74ACT00 Quad 2-Input NAND Gate November 1988 74AC00 • 74ACT00 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions −0.5V to +7.0V Supply Voltage (VCC ) DC Input Diode Current (IIK) VI = −0.5V −20 mA VI = VCC + 0.5V +20 mA DC Input Voltage (VI) Supply Voltage (VCC) −0.5V to VCC + 0.5V VO = VCC + 0.5V +20 mA 0V to VCC −40°C to +85°C Minimum Input Edge Rate (∆V/∆t) AC Devices DC Output Source VIN from 30% to 70% of VCC ±50 mA VCC @ 3.3V, 4.5V, 5.5V DC VCC or Ground Current 125 mV/ns Minimum Input Edge Rate (∆V/∆t) ±50 mA per Output Pin (ICC or IGND) Storage Temperature (TSTG) 0V to VCC Operating Temperature (TA) −0.5V to VCC + 0.5V or Sink Current (IO) 4.5V to 5.5V Output Voltage (VO) −20 mA DC Output Voltage (VO) 2.0V to 6.0V ACT Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V AC ACT Devices −65°C to +150°C VIN from 0.8V to 2.0V Junction Temperature (TJ) VCC @ 4.5V, 5.5V PDIP 140°C 125 mV/ns Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications. DC Electrical Characteristics for AC Symbol VIH Parameter Minimum HIGH Level Input Voltage VIL VOH TA = +25°C VCC TA = −40°C to +85°C (V) Typ Guaranteed Limits 3.0 1.5 2.1 2.1 4.5 2.25 3.15 3.15 5.5 2.75 3.85 3.85 Maximum LOW Level 3.0 1.5 0.9 0.9 Input Voltage 4.5 2.25 1.35 1.35 5.5 2.75 1.65 1.65 Minimum HIGH Level 3.0 2.99 2.9 2.9 Output Voltage 4.5 4.49 4.4 4.4 5.5 5.49 5.4 5.4 3.0 2.56 2.46 4.5 3.86 3.76 5.5 4.86 4.76 0.002 0.1 0.1 Units Conditions VOUT = 0.1V V or VCC − 0.1V VOUT = 0.1V V or VCC − 0.1V V IOUT = −50 µA VIN = VIL or VIH VOL Maximum LOW Level 3.0 Output Voltage 4.5 0.001 0.1 0.1 5.5 0.001 0.1 0.1 0.36 0.44 IOH = −12 mA V IOH = −24 mA IOH = −24 mA (Note 2) V IOUT = 50 µA VIN = VIL or VIH 3.0 IIN Maximum Input 0.36 0.44 5.5 0.36 0.44 5.5 ±0.1 ±1.0 µA VI = VCC, GND 75 mA VOLD = 1.65V Max −75 mA VOHD = 3.85V Min 20.0 µA VIN = VCC or GND Leakage Current IOLD Minimum Dynamic IOHD Output Current (Note 4) 5.5 ICC Maximum Quiescent Supply Current 5.5 5.5 2.0 (Note 3) Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. 2 V IOL = 24 mA 4.5 (Note 3) www.fairchildsemi.com IOL = 12 mA IOL = 24 mA (Note 2) 74AC00 • 74ACT00 DC Electrical Characteristics for ACT Symbol Minimum HIGH Level VIH VIL VOH TA = +25°C VCC Parameter (V) Typ 4.5 1.5 TA = −40°C to +85°C Guaranteed Limits 2.0 2.0 Input Voltage 5.5 1.5 2.0 2.0 Maximum LOW Level 4.5 1.5 0.8 0.8 Input Voltage 5.5 1.5 0.8 0.8 Minimum HIGH Level 4.5 4.49 4.4 4.4 Output Voltage 5.5 5.49 5.4 5.4 4.5 3.86 3.76 5.5 4.86 4.76 Units Conditions VOUT = 0.1V V or VCC − 0.1V VOUT = 0.1V V or VCC − 0.1V IOUT = −50 µA V VIN = VIL or VIH VOL IOH = −24 mA V IOH = −24 mA (Note 5) Maximum LOW Level 4.5 0.001 0.1 0.1 Output Voltage 5.5 0.001 0.1 0.1 4.5 0.36 0.44 5.5 0.36 0.44 ±0.1 ±1.0 µA VI = VCC, GND 1.5 mA VI = VCC − 2.1V IOUT = 50 µA V VIN = VIL or VIH IOL = 24 mA V IOL = 24 mA (Note 5) IIN Maximum Input ICCT Maximum ICC/Input 5.5 IOLD Minimum Dynamic 5.5 75 mA VOLD = 1.65V Max IOHD Output Current (Note 6) 5.5 −75 mA VOHD = 3.85V Min ICC Maximum Quiescent 20.0 µA 5.5 Leakage Current 0.6 5.5 Supply Current 2.0 VIN = VCC or GND Note 5: All outputs loaded; thresholds on input associated with output under test. Note 6: Maximum test duration 2.0 ms, one output loaded at a time. AC Electrical Characteristics for AC Symbol tPLH Parameter Propagation Delay tPHL Propagation Delay VCC TA = +25°C (V) CL = 50 pF TA = −40°C to +85°C CL = 50 pF Units (Note 7) Min Typ Max Min Max 3.3 2.0 7.0 9.5 2.0 10.0 5.0 1.5 6.0 8.0 1.5 8.5 3.3 1.5 5.5 8.0 1.0 8.5 5.0 1.5 4.5 6.5 1.0 7.0 ns ns Note 7: Voltage Range 3.3 is 3.3V ± 0.3V Voltage Range 5.0 is 5.0V ± 0.5V AC Electrical Characteristics for ACT Symbol Parameter VCC TA = +25°C (V) CL = 50 pF (Note 8) Min Typ TA = −40°C to +85°C CL = 50 pF Max Min Units Max tPLH Propagation Delay 5.0 1.5 5.5 9.0 1.0 9.5 ns tPHL Propagation Delay 5.0 1.5 4.0 7.0 1.0 8.0 ns Note 8: Voltage Range 5.0 is 5.0V ±0.5V Capacitance Typ Units CIN Symbol Input Capacitance Parameter 4.5 pF VCC = Open CPD Power Dissipation Capacitance 30.0 pF VCC = 5.0V 3 Conditions www.fairchildsemi.com 74AC00 • 74ACT00 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body Package Number M14A www.fairchildsemi.com 4 74AC00 • 74ACT00 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOIC), EIAJ Type II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com 74AC00 • 74ACT00 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,4.4mm Wide Package Number MTC14 www.fairchildsemi.com 6 74AC00 • 74ACT00 Quad 2-Input NAND Gate Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com