74ACQ245, 74ACTQ245 Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs Features General Description ■ ICC and IOZ reduced by 50% ■ Guaranteed simultaneous switching noise level and The ACQ/ACTQ245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 24mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A Ports to B Ports; Receive (activeLOW) enables data from B Ports to A Ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition. dynamic threshold performance ■ Guaranteed pin-to-pin skew AC performance ■ Improved latch-up immunity ■ 3-STATE outputs drive bus lines or buffer memory address registers ■ Outputs source/sink 24mA ■ Faster prop delays than the standard ACT245 The ACQ/ACTQ utilizes Fairchild Quiet Series™ technology to guarantee quiet output switching and improve dynamic threshold performance. FACT Quiet Series™ features GTO™ output control and undershoot corrector in addition to a split ground bus for superior performance. Ordering Information Order Number Package Number Package Description 74ACQ245SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74ACQ245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACTQ245SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74ACTQ245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACTQ245QSC MQA20 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide 74ACTQ245MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 74ACTQ245MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs January 2008 Logic Symbol IEEE/IEC Pin Description Pin Names OE Description Output Enable Input T/R Transmit/Receive Input A0–A7 Side A 3-STATE Inputs or 3-STATE Outputs B0–B7 Side B 3-STATE Inputs or 3-STATE Outputs Truth Table Inputs OE T/R Outputs L L Bus B Data to Bus A L H Bus A Data to Bus B H X HIGH-Z State H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 2 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs Connection Diagram Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC IIK Parameter Rating Supply Voltage –0.5V to +7.0V DC Input Diode Current VI = –0.5V –20mA VI = VCC + 0.5V +20mA VI DC Input Voltage IOK DC Output Diode Current –0.5V to VCC + 0.5V VO = –0.5V –20mA VO = VCC + 0.5V +20mA VO DC Output Voltage –0.5V to VCC + 0.5V IO DC Output Source or Sink Current ±50mA ICC or IGND DC VCC or Ground Current per Output Pin TSTG ±50mA Storage Temperature –65°C to +150°C DC Latch-Up Source or Sink Current TJ ±300mA Junction Temperature 140°C Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCC Parameter Rating Supply Voltage ACQ 2.0V to 6.0V ACTQ 4.5V to 5.5V VI Input Voltage 0V to VCC VO Output Voltage 0V to VCC TA Operating Temperature ∆V / ∆t –40°C to +85°C 125mV/ns Minimum Input Edge Rate, ACQ Devices: VIN from 30% to 70% of VCC, VCC @ 3.0V, 4.5V, 5.5V ∆V / ∆t 125mV/ns Minimum Input Edge Rate, ACTQ Devices: VIN from 0.8V to 2.0V, VCC @ 4.5V, 5.5V ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 3 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs Absolute Maximum Ratings Symbol VIH Parameter Minimum HIGH Level Input Voltage VCC (V) 3.0 4.5 Conditions VOUT = 0.1V or VCC – 0.1V 5.5 VIL Maximum LOW Level Input Voltage 3.0 4.5 VOUT = 0.1V or VCC – 0.1V 5.5 VOH VOL Minimum HIGH Level Output Voltage Maximum LOW Level Output Voltage 3.0 IOUT = –50µA TA = +25°C TA = –40°C to +85°C Typ. Guaranteed Limits Units 1.5 2.1 2.1 2.25 3.15 3.15 2.75 3.85 3.85 1.5 0.9 0.9 2.25 1.35 1.35 2.75 1.65 1.65 2.99 2.9 2.9 4.5 4.49 4.4 4.4 5.5 5.49 5.4 5.4 3.0 VIN = VIL or VIH, IOH = –12mA 2.56 2.46 4.5 VIN = VIL or VIH, IOH = –24mA 3.86 3.76 5.5 VIN = VIL or VIH, IOH = –24mA(1) 4.86 4.76 3.0 IOUT = 50µA 0.002 0.1 0.1 4.5 0.001 0.1 0.1 5.5 0.001 0.1 0.1 3.0 VIN = VIL or VIH, IOL = 12mA 0.36 0.44 4.5 VIN = VIL or VIH, IOL = 24mA 0.36 0.44 5.5 VIN = VIL or VIH, IOL = 24mA(1) 0.36 0.44 ±0.1 ±1.0 V V V V IIN(3) Maximum Input Leakage Current 5.5 VI = VCC, GND IOLD Minimum Dynamic Output Current(2) 5.5 VOLD = 1.65V Max. 75 mA 5.5 VOHD = 3.85V Min. –75 mA ICC(3) Maximum Quiescent Supply Current 5.5 VIN = VCC or GND 4.0 40.0 µA IOZT Maximum I/O Leakage Current 5.5 VI (OE) = VIL, VIH; VI = VCC, GND; VO = VCC, GND ±0.3 ±3.0 µA VOLP Quiet Output Maximum Dynamic VOL 5.0 Figures 1 & 2(4) 1.1 1.5 V VOLV Quiet Output Minimum Dynamic VOL 5.0 Figures 1 & 2(4) –0.6 –1.2 V VIHD Minimum HIGH Level Dynamic Input Voltage 5.0 (5) 3.1 3.5 V VILD Maximum LOW Level Dynamic Input Voltage 5.0 5) 1.9 1.5 V IOHD µA Notes: 1. All outputs loaded; thresholds on input associated with output under test. 2. Maximum test duration 2.0ms, one output loaded at a time. 3. IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. 4. Max number of outputs defined as (n). Data Inputs are driven 0V to 5V; one output @ GND. 5. Max number of Data Inputs (n) switching. (n–1) Inputs switching 0V to 5V (ACQ). Input-under-test switching: 5V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz. ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 4 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs DC Electrical Characteristics for ACQ TA = +25°C TA = –40°C to +85°C Symbol VIH VIL VOH Parameter VCC (V) Conditions Typ. Guaranteed Limits VOUT = 0.1V or VCC – 0.1V 1.5 2.0 2.0 1.5 2.0 2.0 VOUT = 0.1V or VCC – 0.1V 1.5 0.8 0.8 5.5 1.5 0.8 0.8 4.5 IOUT = –50µA 4.49 4.4 4.4 Minimum HIGH Level Input Voltage 4.5 Maximum LOW Level Input Voltage 4.5 Minimum HIGH Level Output Voltage 5.5 5.5 4.5 5.49 VIN = VIL or VIH, 5.4 5.4 3.86 3.76 4.86 4.76 0.1 0.1 Units V V V IOH = –24mA 5.5 VIN = VIL or VIH, IOH = –24mA(6) VOL Maximum LOW Level Output Voltage 4.5 IOUT = 50µA 5.5 4.5 0.001 0.001 VIN = VIL or VIH, 0.1 0.1 0.36 0.44 0.36 0.44 V IOL = 24mA 5.5 VIN = VIL or VIH, IOL = 24mA(6) Maximum Input Leakage Current 5.5 VI = VCC, GND ±0.1 ±1.0 µA IOZT Maximum 3-STATE Leakage Current 5.5 VI = VIL, VIH, VO = VCC, GND ±0.3 ±3.0 µA ICCT Maximum ICC/Input 5.5 VI = VCC – 2.1V 1.5 mA IOLD Minimum Dynamic 5.5 VOLD = 1.65V Max. 75 mA –75 mA 40.0 µA IIN 0.6 5.5 VOHD = 3.85V Min. Maximum Quiescent Supply Current 5.5 VIN = VCC or GND VOLP Quiet Output Maximum Dynamic VOL 5.0 Figures 1 & 2(8) 1.1 1.5 V VOLV Quiet Output Minimum Dynamic VOL 5.0 Figures 1 & 2(8) –0.6 –1.2 V VIHD Minimum HIGH Level Dynamic Input Voltage 5.0 (9) 1.9 2.2 V VILD Maximum LOW Level Dynamic Input Voltage 5.0 (9) 1.2 0.8 V IOHD ICC Output Current(7) 4.0 Notes: 6. All outputs loaded; thresholds on input associated with output under test. 7. Maximum test duration 2.0ms, one output loaded at a time. 8. Max number of outputs defined as (n). n–1 Data Inputs are driven 0V to 3V; one output @ GND. 9. Max number of Data Inputs (n) switching. (n–1) Inputs switching 0V to 3V (ACTQ). Input-under-test switching: 3V to threshold (VILD), 0V to threshold (VIHD) f = 1 MHz. ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 5 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs DC Electrical Characteristics for ACTQ TA = +25°C, CL = 5 pF Symbol tPHL, tPLH tPZL, tPZH tPHZ, tPLZ Parameter TA = –40°C to +85°C, CL = 50pF VCC (V)(10) Min. Typ. Max. Min. Max. Units 3.3 2.0 7.5 10.0 2.0 10.5 ns 5.0 1.5 5.0 6.5 1.5 7.0 Propagation Delay, Data to Output Output Enable Time Output Disable Time tOSHL, tOSLH Output to Output Skew, Data to Output(11) 3.3 3.0 8.5 13.0 3.0 13.5 5.0 2.0 6.0 8.5 2.0 9.0 3.3 1.0 8.5 14.5 1.0 15.0 5.0 1.0 7.5 9.5 1.0 10.0 3.3 1.0 1.5 1.5 5.0 0.5 1.0 1.0 ns ns ns Notes: 10. Voltage range 5.0 is 5.0V ± 0.5V. Voltage range 3.3 is 3.3V ± 0.3V. 11. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. AC Electrical Characteristics for ACTQ TA = +25°C, CL = 50pF TA = –40°C to +85°C, CL = 50pF VCC (V)(12) Min. Typ. Max. Min. Max. Units Propagation Delay, Data to Output 5.0 1.5 5.5 7.0 1.5 7.5 ns tPZL, tPZH Output Enable Time 5.0 2.0 7.0 9.0 2.0 9.5 ns tPHZ, tPLZ Output Disable Time 5.0 1.0 8.0 10.0 1.0 10.5 ns 0.5 1.0 1.0 ns Symbol Parameter tPHL, tPLH tOSHL, tOSLH Output to Output Skew, Data to Output(13) 5.0 Notes: 12. Voltage range 5.0 is 5.0V ± 0.5V 13. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Capacitance Symbol Parameter Conditions Typ. Units CIN Input Capacitance VCC = OPEN 4.5 pF CI/O Input/Output Capacitance VCC = 5.0V 15 pF CPD Power Dissipation Capacitance VCC = 5.0V 80.0 pF ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 6 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs AC Electrical Characteristics for ACQ VOLP/VOLV and VOHP/VOHV: The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of FACT. ■ Determine the quiet output pin that demonstrates the greatest noise levels. The worst case pin will usually be the furthest from the ground pin. Monitor the output voltages using a 50Ω coaxial cable plugged into a standard SMB type connector on the test fixture. Do not use an active FET probe. ■ Measure VOLP and VOLV on the quiet output during the worst case transition for active and enable. Measure VOHP and VOHV on the quiet output during the worst case active and enable transition. ■ Verify that the GND reference recorded on the oscilloscope has not drifted to ensure the accuracy and repeatability of the measurements. Equipment: Hewlett Packard Model 8180A Word Generator PC-163A Test Fixture Tektronics Model 7854 Oscilloscope Procedure: 1. Verify Test Fixture Loading: Standard Load 50pF, 500Ω. 2. Deskew the HFS generator so that no two channels have greater than 150 ps skew between them. This requires that the oscilloscope be deskewed first. It is important to deskew the HFS generator channels before testing. This will ensure that the outputs switch simultaneously. VILD and VIHD: ■ Monitor one of the switching outputs using a 50Ω coaxial cable plugged into a standard SMB type connector on the test fixture. Do not use an active FET probe. ■ First increase the input LOW voltage level, VIL, until the output begins to oscillate or steps out a min of 2ns. Oscillation is defined as noise on the output LOW level that exceeds VIL limits, or on output HIGH levels that exceed VIH limits. The input LOW voltage level at which oscillation occurs is defined as VILD. ■ Next decrease the input HIGH voltage level, VIH, until the output begins to oscillate or steps out a min of 2ns. Oscillation is defined as noise on the output LOW level that exceeds VIL limits, or on output HIGH levels that exceed VIH limits. The input HIGH voltage level at which oscillation occurs is defined as VIHD. ■ Verify that the GND reference recorded on the oscilloscope has not drifted to ensure the accuracy and repeatability of the measurements. 3. Terminate all inputs and outputs to ensure proper loading of the outputs and that the input levels are at the correct voltage. 4. Set the HFS generator to toggle all but one output at a frequency of 1 MHz. Greater frequencies will increase DUT heating and effect the results of the measurement. 5. Set the HFS generator input levels at 0V LOW and 3V HIGH for ACT devices and 0V LOW and 5V HIGH for AC devices. Verify levels with an oscilloscope. Notes: 14. VOHV and VOLP are measured with respect to ground reference. 15. Input pulses have the following characteristics: f = 1MHz, tr = 3ns, tf = 3ns, skew < 150ps. Figure 1. Quiet Output Noise Voltage Waveforms Figure 2. Simultaneous Switching Test Circuit ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 7 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs FACT Noise Characteristics 13.00 12.60 A 11.43 20 11 B 9.50 10.65 7.60 10.00 7.40 2.25 1 10 0.51 0.35 PIN ONE INDICATOR 0.25 M 0.65 1.27 1.27 C B A LAND PATTERN RECOMMENDATION 2.65 MAX SEE DETAIL A 0.33 0.20 C 0.75 0.25 X 45° SEATING PLANE NOTES: UNLESS OTHERWISE SPECIFIED (R0.10) GAGE PLANE (R0.10) 0.10 C 0.30 0.10 0.25 8° 0° A) THIS PACKAGE CONFORMS TO JEDEC MS-013, VARIATION AC, ISSUE E B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) CONFORMS TO ASME Y14.5M-1994 1.27 0.40 SEATING PLANE E) LANDPATTERN STANDARD: SOIC127P1030X265-20L (1.40) DETAIL A F) DRAWING FILENAME: MKT-M20BREV3 SCALE: 2:1 Figure 3. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 8 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs Physical Dimensions 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs Physical Dimensions (Continued) Figure 4. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 9 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs Physical Dimensions (Continued) Figure 5. 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 10 Figure 6. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 11 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs Physical Dimensions (Continued) Figure 7. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 12 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs Physical Dimensions (Continued) ACEx® Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EZSWITCH™ * ™ PDP-SPM™ SyncFET™ ® Power220® ® Power247 The Power Franchise® POWEREDGE® Power-SPM™ PowerTrench® TinyBoost™ Programmable Active Droop™ TinyBuck™ ® QFET TinyLogic® QS™ TINYOPTO™ QT Optoelectronics™ TinyPower™ ® Quiet Series™ TinyPWM™ RapidConfigure™ TinyWire™ Fairchild® SMART START™ Fairchild Semiconductor® µSerDes™ ® SPM FACT Quiet Series™ UHC® STEALTH™ FACT® Ultra FRFET™ SuperFET™ FAST® UniFET™ SuperSOT™-3 FastvCore™ VCX™ ® ®* SuperSOT™-6 FlashWriter SuperSOT™-8 * EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor. FPS™ FRFET® Global Power ResourceSM Green FPS™ Green FPS™ e-Series™ GTO™ i-Lo™ IntelliMAX™ ISOPLANAR™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MillerDrive™ Motion-SPM™ OPTOLOGIC® OPTOPLANAR® DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I32 ©1989 Fairchild Semiconductor Corporation 74ACQ245, 74ACTQ245 Rev. 1.5.1 www.fairchildsemi.com 13 74ACQ245, 74ACTQ245 — Quiet Series™ Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.