74AHC245; 74AHCT245 Octal bus transceiver; 3-state Rev. 03 — 25 September 2007 Product data sheet 1. General description The 74AHC/AHCT245 is a high-speed Si-gate CMOS device. The 74AHC/AHCT245 is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The 74AHC245/74AHCT245 features an Output Enable (OE) input for easy cascading and a send/receive (DIR) input for direction control. OE controls the outputs so that the buses are effectively isolated. 2. Features ■ ■ ■ ■ ■ ■ Balanced propagation delays All inputs have a Schmitt-trigger action Inputs accepts voltages higher than VCC For 74AHC245 only: operates with CMOS input levels For 74AHCT245 only: operates with TTL input levels ESD protection: ◆ HBM JESD22-A114E exceeds 2000 V ◆ MM JESD22-A115-A exceeds 200 V ◆ CDM JESD22-C101C exceeds 1000 V ■ Multiple package options ■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Ordering information Table 1: Ordering information Type number 74AHC245D Package Temperature range Name Description Version −40 °C to +125 °C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 −40 °C to +125 °C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 −40 °C to +125 °C DHVQFN20 plastic dual-in-line compatible thermal enhanced very thin quad flat package no leads; 20 terminals; body 2.5 × 4.5 × 0.85 mm SOT764-1 74AHCT245D 74AHC245PW 74AHCT245PW 74AHC245BQ 74AHCT245BQ 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state 4. Functional diagram 1 DIR OE 2 B0 3 19 1 14 2 18 3 17 4 16 5 15 6 14 7 13 8 12 A5 13 A6 B6 9 3EN1 3EN2 2 B5 8 G3 15 A4 B4 7 1 16 A3 B3 6 17 A2 B2 5 18 A1 B1 4 19 A0 12 A7 B7 11 9 Fig 1. Logic symbol Fig 2. IEC logic symbol 74AHC_AHCT245_3 Product data sheet 11 mna175 mna174 © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 2 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state 5. Pinning information 1 terminal 1 index area 1 20 VCC A0 2 19 OE A1 3 18 B0 A2 4 17 B1 A0 2 19 OE A1 3 18 B0 A3 5 17 B1 A4 6 16 B2 A5 7 4 A3 5 A4 6 A5 7 245 15 B3 A6 8 A7 9 15 B3 14 B4 GND(1) 13 B5 14 B4 A6 8 13 B5 A7 9 12 B6 GND 10 11 B7 12 B6 GND 10 A2 16 B2 245 B7 11 DIR 20 VCC DIR 5.1 Pinning 001aac432 Transparent top view 001aac431 (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 3. Pin configuration SO20, TSSOP20 Fig 4. Pin configuration DHVQFN20 5.2 Pin description Table 2: Pin description Symbol Pin Description DIR 1 direction control A[0:7] 2, 3, 4, 5, 6, 7, 8, 9 data input/output B[0:7] 18, 17, 16, 15, 14, 13, 12, 11 data input/output GND 10 ground (0 V) OE 19 output enable input (active LOW) VCC 20 supply voltage 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 3 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state 6. Functional description Table 3: Function table[1] Input Input/output OE DIR An Bn L L A=B input L H input B=A H X Z Z [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VCC supply voltage VI input voltage IIK input clamping current VI < −0.5 V [1] IOK output clamping current VO < −0.5 V or VO > VCC + 0.5 V [1] IO output current VO = −0.5 V to (VCC + 0.5 V) Min Max Unit −0.5 +7.0 V −0.5 +7.0 V −20 - mA - ±20 mA - ±25 mA ICC supply current - 75 mA IGND ground current −75 - mA Tstg storage temperature −65 +150 °C Ptot total power dissipation Tamb = −40 °C to +125 °C SO20 package [2] - 500 mW TSSOP20 package [3] - 500 mW DHVQFN20 package [4] - 500 mW [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] Ptot derates linearly with 8 mW/K above 70 °C. [3] Ptot derates linearly with 5.5 mW/K above 60 °C. [4] Ptot derates linearly with 4.5 mW/K above 60 °C. 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 4 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC245 Min Typ 74AHCT245 Max Min Typ Unit Max VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V VI input voltage 0 - 5.5 0 - 5.5 V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature −40 +25 +125 −40 +25 +125 °C ∆t/∆V input transition rise and fall rate VCC = 3.3 V ± 0.3 V - - 100 - - - ns/V VCC = 5.0 V ± 0.5 V - - 20 - - 20 ns/V 9. Static characteristics Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V HIGH-level VI = VIH or VIL output voltage IO = −50 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = −50 µA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = −50 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = −4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = −8.0 mA; VCC = 4.5 V For type 74AHC245 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage 3.94 - - 3.8 - 3.70 - V LOW-level VI = VIH or VIL output voltage IO = 50 µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 µA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V IOZ OFF-state VI = VIH or VIL; output current VO = VCC or GND; VCC = 5.5 V - - ±0.25 - ±2.5 - ±10.0 µA II input leakage current - - 0.1 - 1.0 - 2.0 µA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 4.0 - 40 - 80 µA VI = VCC or GND; VCC = 5.5 V 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 5 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state Table 6. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max CI input capacitance - 3.0 10 - 10 - 10 pF CO output capacitance - 4.0 - - - - - pF For type 74AHCT245 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = −50 µA 4.4 4.5 - 4.4 - 4.4 - V 3.94 - - 3.8 - 3.70 - V - 0 0.1 - 0.1 - 0.1 V - - 0.36 - 0.44 - 0.55 V - - ±0.25 - ±2.5 - ±10.0 µA IO = −8.0 mA VOL LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 µA IO = 8.0 mA IOZ OFF-state per input pin; VI = VIH or VIL; output current VCC = 5.5 V; IO = 0 A VO = VCC or GND; other pins at VCC or GND II input leakage current VI = VIH or VIL; VCC = 5.5 V - - 0.1 - 1.0 - 2.0 µA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 4.0 - 40 - 80 µA ∆ICC additional per input pin; supply current VI = VCC − 2.1 V; IO = 0 A; other pins at VCC or GND; VCC = 4.5 V to 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance - 3 10 - 10 - 10 pF CO output capacitance - 4.0 - - - - - pF 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 6 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V. For test circuit see Figure 7. Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max CL = 15 pF - 5.0 8.4 1.0 10.0 1.0 10.5 ns CL = 50 pF - 6.5 11.9 1.0 13.5 1.0 15.0 ns - 3.5 5.5 1.0 6.5 1.0 7.0 ns 5.0 7.5 1.0 8.5 1.0 9.5 ns For type 74AHC245 tpd propagation delay nAn to nYn; see Figure 5 [2] VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF ten enable time nOE to nYn; see Figure 6 [2] VCC = 3.0 V to 3.6 V CL = 15 pF - 6.5 13.2 1.0 15.5 1.0 16.5 ns CL = 50 pF - 9.0 16.7 1.0 19.0 1.0 21.0 ns - 4.0 8.5 1.0 10.0 1.0 11.0 ns - 5.0 10.6 1.0 12.0 1.0 13.5 ns CL = 15 pF - 7.5 12.5 1.0 15.5 1.0 16.0 ns CL = 50 pF - 10.0 15.8 1.0 18.0 1.0 20.0 ns CL = 15 pF - 4.5 7.8 1.0 9.2 1.0 10.0 ns CL = 50 pF - 6.0 9.7 1.0 11.0 1.0 12.5 ns - 12 - - - - - pF VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF tdis disable time nOE to nYn; see Figure 6 [2] VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V CPD power CL = 50 pF; fi = 1 MHz; dissipation VI = GND to VCC capacitance [3] 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 7 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state Table 7. Dynamic characteristics …continued GND = 0 V. For test circuit see Figure 7. Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max CL = 15 pF - 3.5 7.7 1.0 8.5 1.0 10.0 ns CL = 50 pF - 4.5 8.7 1.0 9.5 1.0 11.0 ns - 5.0 13.8 1.0 15.0 1.0 17.5 ns - 6.0 14.8 1.0 16.0 1.0 18.5 ns - 5.0 14.4 1.0 15.5 1.0 18.0 ns - 6.0 15.4 1.0 16.5 1.0 19.5 ns - 15 - - - - - pF For type 74AHCT245 tpd ten propagation delay enable time nAn to nYn; see Figure 5 [2] VCC = 4.5 V to 5.5 V nOE to nYn; see Figure 6 VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF tdis disable time nOE to nYn; see Figure 6 [2] VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF CPD [3] power per buffer; dissipation CL = 50 pF; f = 1 MHz; capacitance VI = GND to VCC [1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). [2] tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [3] CPD is used to determine the dynamic power dissipation PD (µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 11. Waveforms VI An, Bn input VM VM GND tPLH tPHL VOH VM Bn, An output VOL VM mna176 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 5. Propagation delay input (An, Bn) to output (Bn, An) 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 8 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state VI OE input VM GND t PLZ t PZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL t PHZ t PZH VOH VY output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs enabled outputs disabled mna367 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. enable and disable times Table 8: Measurement points Type Input Output VM VM VX VY 74AHC245 0.5VCC 0.5VCC VOL + 0.3 V VOH − 0.3 V 74AHCT245 1.5 V 0.5VCC VOL + 0.3 V VOH − 0.3 V 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 9 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC PULSE GENERATOR VI VO RL S1 open DUT RT CL 001aad983 Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator CL = Load capacitance including jig and probe capacitance RL = Load resistor S1 = Test selection switch Fig 7. Load circuitry for switching times Table 9: Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74AHC245 VCC 3.0 ns 15 pF, 50 pF 1 kΩ open GND VCC 74AHCT245 3.0 V 3.0 ns 15 pF, 50 pF 1 kΩ open GND VCC 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 10 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state 12. Package outline SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index θ Lp L 10 1 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 inches 0.1 0.012 0.096 0.004 0.089 0.043 0.039 0.01 0.01 Z (1) 0.9 0.4 0.035 0.004 0.016 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 8. Package outline SOT163-1 (SO20) 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 11 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A θ Lp L 1 10 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC JEITA MO-153 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 9. Package outline SOT360-1 (TSSOP20) 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 12 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT764-1 20 terminals; body 2.5 x 4.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 9 y y1 C v M C A B w M C b L 1 10 Eh e 20 11 19 12 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b 1 0.05 0.00 0.30 0.18 mm c D (1) Dh E (1) Eh 0.2 4.6 4.4 3.15 2.85 2.6 2.4 1.15 0.85 e 0.5 e1 L v w y y1 3.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT764-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 10. Package outline SOT764-1 (DHVQFN20) 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 13 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state 13. Abbreviations Table 10: Abbreviations Acronym Description CDM Charge Device Model CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11: Revision history Document ID Release date Data sheet status 74AHC_AHCT245_3 20070925 Product data sheet Modifications: Change notice Doc. number Supersedes - 74AHC_AHCT245_2 • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name when appropiate. • • • Section 3: DHVQFN20 package added. Section 8: derating values added for DHVQFN20 package. Section 12: outline drawing added for DHVQFN20 package. 74AHC_AHCT245_2 19990928 Product specification - 939775006297 74AHC_AHCT245_1 74AHC_AHCT245_1 19980921 Product specification - 939775004255 - 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 14 of 16 74AHC245; 74AHCT245 NXP Semiconductors Octal bus transceiver; 3-state 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 15.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] 74AHC_AHCT245_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 25 September 2007 15 of 16 NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information. . . . . . . . . . . . . . . . . . . . . 15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 25 September 2007 Document identifier: 74AHC_AHCT245_3