INTEGRATED CIRCUITS 74ALS651/74ALS651–1 74ALS652/74ALS652–1 Transceiver/register Product specification IC05 Data Handbook 1991 Feb 08 Philips Semiconductors Product specification 74ALS651/74ALS651-1 74ALS652/74ALS652-1 Transceiver/register 74ALS651/651-1 74ALS652/652-1 Octal transceiver/register, inverting (3-State) Octal transceiver/register, non-inverting (3-State) FEATURES • Independent registers for A and B buses • Multiplexed real-time and stored data • Choice of non-inverting and inverting data paths • 3-State outputs • The -1 versions sinks 48mA IOL within the ±5% VCC range TYPICAL fMAX TYPICAL SUPPLY CURRENT (TOTAL) 74ALS651/74ALS651-1 140MHz 40mA 74ALS652/74ALS652-1 140MHz 46mA TYPE ORDERING INFORMATION ORDER CODE DESCRIPTION The 74LAS651 and 74ALS652 transceivers/registers consist of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output enable (OEAB, OEBA) and select (SAB, SBA) pins are provided for bus management. The 74LAS651-1 and 74ALS652-1 will sink 48mA if the VCC is limited to 5.0V ± 0.25V. DRAWING NUMBER DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C 24-pin plastic DIP 74ALS651N, 74ALS651-1N, 74ALS652N, 74ALS652-1N SOT222-1 24-pin plastic SOL 74ALS651D, 74ALS651-1D, 74ALS652D, 74ALS652-1D SOT137-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74ALS (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW A0 – A7 A inputs 1.0/1.0 70µA/0.1mA B0 – B7 B inputs 1.0/1.0 70µA/0.1mA CPAB A-to-B clock input 1.0/1.0 20µA/0.1mA CPBA B-to-A clock input 1.0/1.0 20µA/0.1mA SAB A-to-B select input 1.0/1.0 20µA/0.1mA SBA B-to-A select input 1.0/1.0 20µA/0.1mA OEAB A-to-B output enable input 1.0/1.0 20µA/0.1mA OEBA B-to-A output enable input 1.0/1.0 20µA/0.1mA A0 – A7, B0 – B7 A, B outputs 750/240 15mA/24mA A0 – A7, B0 – B7 A, B outputs (-1 version) 750/480 15mA/48mA NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state. 1991 Feb 08 2 853–1407 01670 Philips Semiconductors Product specification 74ALS651/74ALS651-1 74ALS652/74ALS652-1 Transceiver/register PIN CONFIGURATION – 74ALS651/651-1 CPAB 1 24 VCC SAB 2 23 CPBA OEAB 3 22 SBA A0 4 21 OEBA A1 5 A2 A3 PIN CONFIGURATION – 74ALS652/652-1 CPAB 1 24 VCC SAB 2 23 CPBA OEAB 3 22 SBA A0 4 21 OEBA 20 B0 A1 5 20 B0 6 19 B1 A2 6 19 B1 7 18 B2 A3 7 18 B2 A4 8 17 B3 A4 8 17 B3 A5 9 16 B4 A5 9 16 B4 A6 10 15 B5 A6 10 15 B5 A7 11 14 B6 A7 11 14 B6 GND 12 13 B7 GND 12 13 B7 SC00127 SC00128 LOGIC SYMBOL – 74ALS651/651-1 4 5 6 7 8 9 10 LOGIC SYMBOL – 74ALS652/652-1 11 4 A0 A1 A2 A3 A4 A5 A6 A7 5 CPAB 1 CPAB 2 3 23 22 21 SAB OEAB CPBA SBA OEBA 2 3 23 22 21 SAB OEAB CPBA SBA OEBA B0 B1 B2 B3 B4 B5 B6 B7 20 19 18 17 16 15 14 13 VCC = Pin 24 GND = Pin 12 SC00129 22 1 2 21 EN1 [BA] 10 11 20 19 18 17 16 15 14 13 SC00130 EN1 [BA] 3 EN1 [AB] 23 G3 22 G5 1 C6 G7 2 1 4 5 1 5 7 6D 5 9 IEC/IEEE SYMBOL – 74ALS652/652-1 3 23 8 B0 B1 B2 B3 B4 B5 B6 B7 IEC/IEEE SYMBOL – 74ALS651/651-1 21 7 A0 A1 A2 A3 A4 A5 A6 A7 1 VCC = Pin 24 GND = Pin 12 6 1 7 4D 20 EN1 [AB] G3 G5 C6 G7 1 4 5 1 1 1 5 7 6D 2 1 7 4D 20 1 1 2 19 5 6 18 6 18 7 17 7 17 8 16 8 16 9 15 9 15 10 14 10 14 11 13 11 13 SC00131 1991 Feb 08 19 SC00132 3 Philips Semiconductors Product specification 74ALS651/74ALS651-1 74ALS652/74ALS652-1 Transceiver/register BUS MANAGEMENT FUNCTIONS The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74ALS651/74ALS651-1 and 74ALS652/74ALS652-1. The select pins determine whether data is stored or transferred through the device in real time. The output enable pins determine the direction of the data flow. BUS A BUS A BUS B OEABOEBA CPAB CPBA SAB SBA L L X X X STORAGE FROM A, B, OR A AND B REAL TIME BUS TRANSFER BUS A TO BUS B REAL TIME BUS TRANSFER BUS B TO BUS A L BUS A BUS B OEABOEBA CPAB CPBA SAB SBA H H X X L TRANSFER STORED DATA TO A AND/OR B BUS B BUS A OEABOEBA CPAB CPBA SAB SBA X X X ↑ X X X L X X ↑ X X L X ↑ ↑ X X BUS B OEABOEBA CPAB CPBA SAB SBA H L H or L H or L H H SC00133 1991 Feb 08 4 Philips Semiconductors Product specification 74ALS651/74ALS651-1 74ALS652/74ALS652-1 Transceiver/register LOGIC DIAGRAM – 74ALS651/651-1 OEBA OEAB CPBA SBA SPAB SAB LOGIC DIAGRAM – 74ALS652/652-1 21 OEBA 3 23 22 1 2 OEAB CPBA SBA SPAB SAB 1 OF 8 CHANNELS 21 3 23 22 1 2 1 OF 8 CHANNELS 1D C1 4 4 20 A0 20 A0 B0 B0 1D 1D C1 C1 TO 7 OTHER CHANNELS VCC = Pin 24 GND = Pin 12 1D C1 VCC = Pin 24 GND = Pin 12 SC00134 TO 7 OTHER CHANNELS SC00135 FUNCTION TABLE INPUTS DATA I/O OPERATING MODE OEAB OEBA CPAB CPBA SAB SBA An Bn 74ALS651/74ALS651-1 74ALS652/74ALS652-1 L H H or L H or L X X Input Input Isolation Isolation L H ↑ ↑ X X Input Input Store A and B data Store A and B data X H ↑ H or L X X Input Unspecified* Store A, hold B Store A, hold B H H ↑ ↑ L X Input Output Store A in both registers Store A in both registers L X H or L ↑ X S Unspecified* Input Hold A, store B Hold A, store B L L ↑ ↑ X L Output Input Store B in both registers Store B in both registers L L X X X L Output Input Real time B data to A bus Real time B data to A bus L L X H or L X H Output Input Stored B data to A bus Stored B data to A bus H H X X L X Input Output Real time A data to B bus Real time A data to B bus H H H or L X H X Input Output Stored A data to B bus Stored A data to B bus H L H or L H or L H H Output Output Stored A data to B bus Stored A data to B bus H L H or L H or L H H Output Output Stored B data to A bus Stored B data to A bus NOTES: H = High voltage level L = Low voltage level X = Don’t care * = The data output function may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock. ↑ = Low-to-High clock transition 1991 Feb 08 5 Philips Semiconductors Product specification 74ALS651/74ALS651-1 74ALS652/74ALS652-1 Transceiver/register ABSOLUTE MAXIMUM RATINGS (Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) PARAMETER SYMBOL RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current VOUT Voltage applied to output in High output state IOUT O Current applied to output in Low output state Tamb Operating free-air temperature range Tstg Storage temperature range All versions -1 version –30 to +5 mA –0.5 to VCC V 48 mA 96 mA 0 to +70 °C –65 to +150 °C RECOMMENDED OPERATING CONDITIONS LIMITS PARAMETER SYMBOL MIN NOM MAX 5.0 5.5 UNIT VCC Supply voltage 4.5 V VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V V IIK Input clamp current –18 mA IOH High-level output current –15 mA All versions 24 mA IOL O Low level output current Low-level -1 version 48 1 mA +70 °C Tamb Operating free-air temperature range 0 NOTE: 1. The 48mA limit applies only under the condition of VCC = 5.0V ±5%. 1991 Feb 08 6 Philips Semiconductors Product specification 74ALS651/74ALS651-1 74ALS652/74ALS652-1 Transceiver/register DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL VOH TEST CONDITIONS1 PARAMETER VCC±10%,, VIL = MAX,, VIH = MIN High-level High level out output ut voltage VCC = MIN, VIL = MAX, VIH = MIN VOL VIK Low-level output lt voltage All versions VCC = MIN,, VIL = MAX,, VIH = MIN -1 versions VCC = 4.75V, VIL = MAX, VIH = MIN Input clamp voltage LIMITS TYP2 MIN IOH = –0.4mA VCC – 2 IOH = –3mA 2.4 IOH = –15mA 2.0 MAX UNIT V 3.2 V V IOL = 12mA 0.25 0.40 V IOL = 24mA 0.35 0.50 V IOL = 48mA 0.35 0.50 V –0.73 –1.5 V control inputs VCC = MIN, II = IIK VCC = MAX, VI = 7.0V 0.1 mA A or B ports II Input current at maximum input voltage VCC = MAX, VI = 5.5V 0.1 mA IIH High-level input current3 VCC = MAX, VI = 2.7V 20 µA IIL Low-level input current3 VCC = MAX, VI = 0.4V IO Output current4 VCC = MAX, VO = 2.25V 74ALS651/ 74ALS651 1 74ALS651-1 ICC ICCH ICCL VCC = MAX ICCZ Supply current (total) ICCH 74ALS652/ 74ALS652-1 ICCL –0.1 mA –112 mA 32 50 mA 45 68 mA 44 68 mA 36 58 mA 53 78 mA 49 72 mA –30 VCC = MAX ICCZ NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. For I/O ports, the parameter IIH and IIL include the off-state current. 4. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. AC ELECTRICAL CHARACTERISTICS FOR 74ALS651/74ALS651-1 LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω MIN UNIT MAX fmax Maximum clock frequency Waveform 1 100 tPLH tPHL Propagation delay CPBA to An, CPAB to Bn Waveform 1 5.0 6.0 13.0 13.0 ns tPLH tPHL Propagation delay An to Bn or Bn to An Waveform NO TAG, 3 1.0 2.0 7.0 9.0 ns tPLH tPHL Propagation delay SBA to An or SAB to Bn (A or B Low) Waveform NO TAG, 3 6.0 5.0 14.0 11.0 ns tPLH tPHL Propagation delay SBA to An or SAB to Bn (A or B High) Waveform NO TAG, 3 4.0 5.0 11.0 12.0 ns tPZH tPZL Output enable time OEBA to An Waveform 7 Waveform 8 2.0 5.0 8.0 12.0 ns tPHZ tPLZ Output disable time OEBA to An Waveform 7 Waveform 8 2.0 3.0 8.0 10.0 ns tPZH tPZL Output enable time OEAB to Bn Waveform 7 Waveform 8 2.0 5.0 9.0 12.0 ns tPHZ tPLZ Output disable time OEAB to Bn Waveform 7 Waveform 8 3.0 5.0 11.0 13.0 ns 1991 Feb 08 7 MHz Philips Semiconductors Product specification 74ALS651/74ALS651-1 74ALS652/74ALS652-1 Transceiver/register AC ELECTRICAL CHARACTERISTICS FOR 74ALS652/74ALS652-1 LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω MIN UNIT MAX fmax Maximum clock frequency Waveform 1 100 MHz tPLH tPHL Propagation delay CPBA to An, CPAB to Bn Waveform 1 5.0 6.0 13.0 13.0 ns tPLH tPHL Propagation delay An to Bn or Bn to An Waveform NO TAG, 3 2.0 4.0 8.0 9.0 ns tPLH tPHL Propagation delay SBA to An or SAB to Bn (A or B Low) Waveform NO TAG, 3 4.0 5.0 11.0 11.0 ns tPLH tPHL Propagation delay SBA to An or SAB to Bn (A or B High) Waveform NO TAG, 3 6.0 5.0 14.0 11.0 ns tPZH tPZL Output enable time OEBA to An Waveform 7 Waveform 8 2.0 5.0 8.0 11.0 ns tPHZ tPLZ Output disable time OEBA to An Waveform 7 Waveform 8 2.0 3.0 8.0 10.0 ns tPZH tPZL Output enable time OEAB to Bn Waveform 7 Waveform 8 2.0 5.0 9.0 11.0 ns tPHZ tPLZ Output disable time OEAB to Bn Waveform 7 Waveform 8 3.0 5.0 11.0 13.0 ns AC SETUP REQUIREMENTS LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω MIN tsu (H) tsu (L) Setup time, High or Low An or Bn to CPAB or CPBA th (H) th (L) Hold time, High or Low An or Bn to CPAB or CPBA tsu (H) tsu (L) UNIT MAX Waveform 4 5.0 5.0 ns Waveform 4 0.0 1.0 ns Setup time, High or Low1 OEBA to OEAB or OEAB to OEBA Waveform 5, 6 5.0 5.0 ns th (H) th (L) Hold time, High or Low OEBA to OEAB or OEAB to OEBA Waveform 5, 6 0.0 0.0 ns tw (H) tw (L) Pulse width, High or Low CPAB or CPBA Waveform 1 6.0 4.0 ns NOTE: 1. Setup time is to protect against current surge caused by enabling 16 outputs (24mA per output) simultaneously. 1991 Feb 08 8 Philips Semiconductors Product specification 74ALS651/74ALS651-1 74ALS652/74ALS652-1 Transceiver/register AC WAVEFORMS For all waveforms, VM = 1.3V. The shaded areas indicate when the input is permitted to change for predictable output performance. 1/fmax CPBA or CPAB VM An or Bn VM tw(H) VM SBA or SAB VM VM tPHL tPHL VM VM An or Bn tPLH tPLH tw(L) VM Bn or An VM An or Bn SF00394 SF00395 Waveform 2. Waveform 1. Propagation Delay for Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency An or Bn VM tPLH Bn or An SBA or SAB VM An or Bn VM VM tsu(H) tPHL VM Propagation Delay for An to Bn or Bn to An and SAB or SBA to An or Bn CPBA or CPAB An or Bn VM VM tsu(L) th(H) VM SF00397 Propagation Delay for An to Bn or Bn to An and SAB or SBA to An or Bn OEBA VM tsu(L) th(L) VM SF00396 Waveform 3. VM Waveform 4. VM OEAB th(L) VM tsu(H) Data Setup Time and Hold Times VM th(H) OEAB VM OEBA VM SF00410 Waveform 5. SF00411 OEBA to OEAB Setup Time and Hold Times Waveform 6. OEBA OEBA VM VM VM VM OEAB OEAB tPZH An or Bn OEAB to OEBA Setup Time and Hold Times tPHZ VOH -0.3V tPZL An or Bn VM tPLZ VM 0V VOL +0.3V SF00412 SF00413 Waveform 7. 3-State Output Enable Time to High Level and Output Disable Time from High Level 1991 Feb 08 Waveform 8. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 9 Philips Semiconductors Product specification 74ALS651/74ALS651-1 74ALS652/74ALS652-1 Transceiver/register TEST CIRCUIT AND WAVEFORMS VCC 7.0V VIN VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE 10% RL CL RL AMP (V) VM VM D.U.T. RT 90% 10% tTHL (tff) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0.3V AMP (V) 90% Test Circuit for 3-State and Open Collector Outputs POSITIVE PULSE closed All other open VM VM 10% SWITCH POSITION TEST SWITCH closed tPLZ, tPZL open collector 90% 10% tw 0.3V Input Pulse Definition INPUT PULSE REQUIREMENTS Family Amplitude VM DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 74ALS 3.5V 1.3V Rep.Rate tw tTLH tTHL 1MHz 500ns 2.0ns 2.0ns SC00126 1991 Feb 08 10 Philips Semiconductors Product specification 74ALS651/74ALS651–1 74ALS652/74ALS652–1 Transceiver/register DIP24: plastic dual in-line package; 24 leads (300 mil) 1991 Feb 08 11 SOT222-1 Philips Semiconductors Product specification 74ALS651/74ALS651–1 74ALS652/74ALS652–1 Transceiver/register SO24: plastic small outline package; 24 leads; body width 7.5 mm 1991 Feb 08 12 SOT137-1 Philips Semiconductors Product specification 74ALS651/74ALS651–1 74ALS652/74ALS652–1 Transceiver/register DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Copyright Philips Electronics North America Corporation 1997 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 1991 Feb 08 13