Revised October 2001 74ALVC16245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs General Description Features The ALVC16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. Each byte has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. ■ 1.65V–3.6V VCC supply operation The 74ALVC16245 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V. ■ Power-down high impedance inputs and outputs The 74ALVC16245 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation. ■ Uses patented noise/EMI reduction circuitry ■ 3.6V tolerant inputs and outputs ■ tPD 3.0 ns max for 3.0V to 3.6V VCC 3.5 ns max for 2.3V to 2.7V VCC 6.0 ns max for 1.65V to 1.95V VCC ■ Supports live insertion/withdrawal (Note 1) ■ Latchup conforms to JEDEC JED78 ■ ESD performance: Human body model > 2000V Machine model >200V ■ Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary) Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number 74ALVC16245GX (Note 2) Package Number BGA54A (Preliminary) 74ALVC16245MTD (Note 3) MTD48 Package Description 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide [TAPE and REEL] 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Note 2: BGA package available in Tape and Reel only. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2001 Fairchild Semiconductor Corporation DS500678 www.fairchildsemi.com 74ALVC16245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs October 2001 74ALVC16245 Connection Diagrams Pin Descriptions Pin Assignment of TSSOP Pin Names Description OEn Output Enable Input (Active LOW) T/Rn Transmit/Receive Input A0–A15 Side A Inputs or 3-STATE Outputs B0–B15 Side B Inputs or 3-STATE Outputs NC No Connect FBGA Pin Assignments 1 2 3 4 5 6 A B0 NC T/R1 OE1 NC A0 B B2 B1 NC NC A1 A2 C B4 B3 VCC VCC A3 A4 D B6 B5 GND GND A5 A6 E B8 B7 GND GND A7 A8 F B10 B9 GND GND A9 A10 A12 G B12 B11 VCC VCC A11 H B14 B13 NC NC A13 A14 J B15 NC T/R2 OE2 NC A15 Truth Tables Pin Assignment for FBGA Inputs T/R1 OE1 Outputs L L L H Bus B0–B7 Data to Bus A0–A7 Bus A0–A7 Data to Bus B0–B7 H X HIGH Z State on A0–A7, B0–B7 Inputs OE2 Outputs L L L H Bus B8–B15 Data to Bus A8–A15 Bus A8–A15 Data to Bus B8–B15 H X HIGH Z State on A8–A15, B8–B15 H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial (HIGH or LOW, inputs and I/O’s may not float) Z = High Impedance (Top Thru View) Logic Diagram www.fairchildsemi.com T/R2 2 Recommended Operating Conditions (Note 6) −0.5V to +4.6V Supply Voltage (VCC) −0.5V to 4.6V DC Input Voltage (VI) Output Voltage (VO) (Note 5) Power Supply −0.5V to VCC +0.5V Operating DC Input Diode Current (IIK) VI < 0V −50 mA 0V to VCC Output Voltage (VO) DC Output Diode Current (IOK) 0V to VCC Free Air Operating Temperature (TA) VO < 0V −50 mA −40°C to +85°C Minimum Input Edge Rate (∆t/∆V) VIN = 0.8V to 2.0V, VCC = 3.0V DC Output Source/Sink Current ±50 mA (IOH/IOL) ±100 mA Supply Pin (ICC or GND) 10 ns/V Note 4: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. DC VCC or GND Current per Storage Temperature Range (TSTG) 1.65V to 3.6V Input Voltage −65°C to +150°C Note 5: IO Absolute Maximum Rating must be observed. Note 6: Floating or unused control inputs must be held HIGH or LOW. DC Electrical Characteristics Symbol VIH VIL VOH VOL Parameter Conditions HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage LOW Level Output Voltage IOH = −100 µA VCC (V) Min 1.65 - 1.95 0.65 x VCC 2.3 - 2.7 1.7 2.7 - 3.6 2.0 Max V 1.65 - 1.95 0.35 x VCC 2.3 - 2.7 0.7 2.7 - 3.6 0.8 1.65 - 3.6 V VCC - 0.2 IOH = −4 mA 1.65 1.2 IOH = −6 mA 2.3 2.0 IOH = −12 mA 2.3 1.7 2.7 2.2 V 3.0 2.4 IOH = −24 mA 3.0 2 IOL = 100 µA 1.65 - 3.6 0.2 1.65 0.45 IOL = 4 mA Units IOL = 6 mA 2.3 0.4 IOL = 12 mA 2.3 0.7 2.7 0.4 IOL = 24 mA 3.0 0.55 V II Input Leakage Current 0 ≤ VI ≤ 3.6V 3.6 ±5.0 µA IOZ 3-STATE Output Leakage 0 ≤ VO ≤ 3.6V 3.6 ±10 µA ICC Quiescent Supply Current VI = V CC or GND, IO = 0 3.6 40 µA ∆ICC Increase in ICC per Input VIH = VCC − 0.6V 3 - 3.6 750 µA 3 www.fairchildsemi.com 74ALVC16245 Absolute Maximum Ratings(Note 4) 74ALVC16245 AC Electrical Characteristics TA = −40°C to +85°C, RL = 500Ω CL = 50 pF CL = 30 pF Units Symbol Parameter Min Max Min Max Min Max Min Max tPHL, tPLH Propagation Delay 1.3 3 1.5 3.5 1.0 3.0 1.5 6.0 ns tPZL, tPZH Output Enable Time 1.3 4.3 1.5 5.4 1.0 4.9 1.5 9.3 ns tPLZ, tPHZ Output Disable Time 1.3 4.2 1.5 4.7 1.0 4.2 1.5 7.6 ns VCC = 3.3V ± 0.3V VCC = 2.7V VCC = 2.5V ± 0.2V VCC = 1.8V ± 0.15V Capacitance Symbol Parameter Conditions TA = +25°C VCC Typical CIN Input Capacitance VI = 0V or VCC 3.3 6 CIO Input, Output Capacitance VO = 0V or VCC 3.3 7 CPD Power Dissipation Capacitance 3.3 20 2.5 20 www.fairchildsemi.com Outputs Enabled f = 10 MHz, CL = 50 pF 4 Units pF pF pF TABLE 1. Values for Figure 1 TEST SWITCH tPLH, tPHL Open tPZL, tPLZ VL tPZH, tPHZ GND FIGURE 1. AC Test Circuit TABLE 2. Variable Matrix (Input Characteristics: f = 1MHz; tr = tf = 2ns; ZO = 50Ω) Symbol VCC 3.3V ± 0.3V 2.7V 2.5 ± 0.2V 1.8V ± 0.15V Vmi 1.5V 1.5V VCC/2 VCC/2 Vmo 1.5V 1.5V VCC/2 VCC/2 VX VOL + 0.3V VOL + 0.3V VOL + 0.15V VOL + 0.15V VY VOH − 0.3V VOH − 0.3V VOH − 0.15V VOH − 0.15V VL 6V 6V VCC*2 VCC*2 FIGURE 2. Waveform for Inverting and Non-inverting Functions FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic 5 www.fairchildsemi.com 74ALVC16245 AC Loading and Waveforms 74ALVC16245 Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A www.fairchildsemi.com 6 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com 74ALVC16245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued)