Revised February 2005 74LVX14 Low Voltage Hex Inverter with Schmitt Trigger Input General Description Features The LVX14 contains six inverter gates each with a Schmitt trigger input. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have a greater noise margin than conventional inverters. ■ Input voltage level translation from 5V to 3V ■ Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance The LVX14 has hysteresis between the positive-going and negative-going input thresholds (typically 1.0V) which is determined internally by transistor ratios and is essentially insensitive to temperature and supply voltage variations. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. Ordering Code: Order Number Package Package Description Number 74LVX14M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX14MX_NL M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX14SJ 74LVX14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LVX14MTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. © 2005 Fairchild Semiconductor Corporation DS011603 www.fairchildsemi.com 74LVX14 Low Voltage Hex Inverter with Schmitt Trigger Input March 1993 74LVX14 Connection Diagram Logic Symbol IEEE/IEC Truth Table Pin Descriptions Pin Names Description In Inputs On Outputs www.fairchildsemi.com 2 Input Output A O L H H L Recommended Operating Conditions (Note 3) 0.5V to 7.0V Supply Voltage (VCC ) DC Input Diode Current (IIK) VI Supply Voltage (VCC) 0.5V 20 mA 0.5V to 7V DC Input Voltage (VI) VO 0V to 5.5V Output Voltage (VO) DC Output Diode Current (IOK) VO 2.0V to 3.6V Input Voltage (VI) 0V to VCC 40qC to 85qC Operating Temperature (TA) 0.5V VCC 0.5V 20 mA 20 mA 0.5V to VCC 0.5V DC Output Voltage (VO) Note 2: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. DC Output Source r25 mA or Sink Current (IO) DC VCC or Ground Current r50 mA 65qC to 150qC (ICC or IGND) Storage Temperature (TSTG) Power Dissipation Note 3: Unused inputs must be held HIGH or LOW. They may not float. 180 mW DC Electrical Characteristics TA 25qC TA 40qC to 85qC Parameter VCC Vt Positive Threshold 3.0 Vt Negative Threshold 3.0 0.9 VH Hysteresis 3.0 0.3 VOH HIGH Level 2.0 1.9 2.0 1.9 Output Voltage 3.0 2.9 3.0 2.9 3.0 2.58 Symbol VOL Min Typ Max Min Units Max 2.2 2.2 0.9 1.2 Conditions V V 0.3 1.2 V V VIN 2.48 LOW Level 2.0 0.0 Output Voltage 3.0 0.0 0.1 0.1 0.1 0.1 3.0 0.36 0.44 V VIN IOH 50 PA VIL or VIH IOH 50 PA IOH 4 mA IOL 50 PA VIL or VIH IOL 50 PA IOL 4 mA IIN Input Leakage Current 3.6 r0.1 r1.0 PA VIN 5.5V or GND ICC Quiescent Supply Current 3.6 2.0 20 PA VIN VCC or GND Noise Characteristics (Note 4) Symbol VCC Parameter (V) TA Typ 25qC Limit Units CL (pF) 50 VOLP Quiet Output Maximum Dynamic VOL 3.3 0.3 0.5 V VOLV Quiet Output Minimum Dynamic VOL 3.3 0.3 0.5 V 50 VIHD Minimum HIGH Level Dynamic Input Voltage 3.3 2.0 V 50 VILD Maximum LOW Level Dynamic Input Voltage 3.3 0.8 V 50 Note 4: Input tr tf 3ns 3 www.fairchildsemi.com 74LVX14 Absolute Maximum Ratings(Note 2) 74LVX14 AC Electrical Characteristics Symbol VCC Parameter tPLH Propagation tPHL Delay Time (V) TA Min 2.7 3.3 r 0.3 tOSLH Output to Output tOSHL Skew (Note 5) 25qC Max Min Max CL (pF) 8.7 16.3 1.0 19.5 15 19.8 1.0 23.0 50 6.8 10.6 1.0 12.5 9.3 14.1 1.0 16.0 3.3 |tPLHm tPLHn|, tOSHL Units 11.2 2.7 Note 5: Parameter guaranteed by design. tOSLH 40qC to 85qC TA Typ 1.5 1.5 1.5 1.5 ns 15 50 ns 50 |tPHLm tPHLn| Capacitance Symbol TA Parameter Min CIN Input Capacitance CPD Power Dissipation 25qC TA Typ Max 4 10 40qC to 85qC Min 10 21 Capacitance (Note 6) Note 6: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. www.fairchildsemi.com 4 Units Max pF pF 74LVX14 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A 5 www.fairchildsemi.com 74LVX14 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D www.fairchildsemi.com 6 74LVX14 Low Voltage Hex Inverter with Schmitt Trigger Input Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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