Product Specification PE926C32 Product Description The PE926C32 is a high performance monolithic CMOS RS-422 line receiver. Its operating supply range is 3.0 to 3.6V, with an input signal common mode range of +/-10V. The PE926C32 offers higher speed and lower power than other RS-422 receiver types. It is packaged in a flat pack and is ideal for space applications. The PE926C32 is manufactured in Peregrine’s patented Ultra Thin Silicon (UTSi®) CMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Quad RS-422 Differential Line Driver Radiation Hardened Features • High-speed operation: < 15 nS typical • Low power: < 9 mA typical • 3.3 V operation • Standard packaging: 16-lead flat pack • SEL Immune UTSi CMOS-on-sapphire • SEU <10-10 errors / bit-day • 300 Krad Total Dose Figure 1. Package Drawing Document No. 70-0158-01 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 6 PE926C32 Product Specification Figure 2. Pin Configuration (Top View) Table 2. Recommended Operating Conditions Symbol AA+ 1 16 2 15 V+ D- Parameter/Conditions Min Max Units V+ Supply voltage 3.0 3.6 V TOP Operating temperature range -55 125 °C Maximum input voltage -7 7 V VIN (Line) A+/-, B+/-, C+/-, D+/AQ 3 E+ 4 BQ 14 PE926C32 D+ 13 DQ 5 12 E- B+ 6 11 CQ B- 7 10 C+ V- 8 9 C- VIN (Dig) Maximum input voltage 0 Vdd V VOUT Maximum output voltage 0 Vdd V IOUT Maximum output current -10 10 mA Electrostatic Discharge (ESD) Precautions Table 1. Pin Descriptions When handling this UTSi device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 2. Latch-Up Avoidance Pin No. Pin Name 1 A- Channel A Inverting Input 2 A+ Channel A Noninverting Input 3 AQ Channel A Output 4 E+ Enable, active high 5 BQ Channel B Output 6 B+ Channel B Noninverting Input 7 B- Channel B Inverting Input 8 V- Ground Pin 9 C- Channel C Inverting Input 10 C+ 11 Description Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. Device Functional Considerations The PE926C32 operates at high switching speeds. In order to obtain maximum performance, it is crucial that pin 16 be supplied with a bypass capacitor to ground (pin 8). Table 3. Truth Table E+ E- Vin (Diff) Q Channel C Noninverting Input L H X Z CQ Channel C Ouput H X <-200 mV L 12 E- Enable, active low X L 13 DQ Channel D Output H X >+200 mV H X L 14 D+ Channel D Noninverting Input H X Open H 15 D- Channel D Inverting Input X L 16 V+ Supply Pin ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 6 Document No. 70-0158-01 │ UltraCMOS™ RFIC Solutions PE926C32 Product Specification Table 4. Electrical Specifications -55° C < Tcase < 125° C, 3.0 V < V+ < 3.6 V, PreRad, unless otherwise specified Parameter Minimum Typical Maximum Units 3.0 3.3 3.6 V 5 10 mA -200 200 mV -200 200 mV -200 200 mV 100 mV 15 K 25 K Ohms 15 K 25 K Ohms 15 K 25 K Ohms 1000 uA (V+)*0.7 V -1 1 uA Input “Failsafe” Open Circuit Differential voltage 200 2500 mV Output Drive Current @ 0.5 V from rail (high or low) 10 Output Short Circuit Current (to V-) 15 75 mA Output Tristate Current, 0 < Vout < V+ -5 5 uA Supply Voltage Supply Current (Line inputs open, enabled) (V+)=3.6V Input Threshold (Line, differential) VCM=+7 VCM=0 VCM=-7 Input Threshold Hysteresis (Line, Differential) VCM=0 Input Resistance (Line pins) VCM=+7 VCM=0 VCM=-7 Input Current (Line pins) 1 15 VCM=+7 -1200 VCM=-7 Input Threshold (Enable) Input Current (Enable) (V+)*0.3 (V+)/2 mA VOH @ 10 mA (V+) – 0.5 V (V+) – 0.4 (V+) V VOL @ 10 mA 0 0.4 0.5 V V TPHL (See Fig 2) 12 25 nS TPLH (See Fig 2) 12 25 nS TPZL, TPZH (See Fig 3) 10 25 nS TPHZ, TPLZ (See Fig 3) 10 25 nS 50 FMAX Notes: MHz 1. “Line” pins refer to A-, A+, B-, B+, C-, C+, D-, D+, differential outputs 2. “Digital Input” or “Enable” pins refer to E+, E3. “Digital Input” pins refer to AQ, BQ, CQ, DQ 4. Output Short Circuit not intended to imply continuous operation 5. FMAX is guaranteed by design. Test performed at 1 MHz. Document No. 70-0158-01 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 6 PE926C32 Product Specification Table 5. Post-Irradiation DC Electrical Specifications Tcase = 25° C, 3.0 V < V+ < 3.6 V, 300 KRad, unless otherwise specified Parameter Minimum Typical Maximum Units 3.0 3.3 3.6 V 5 10 mA -200 200 mV -200 200 mV -200 200 mV 100 mV 15K 25K Ohms 15K 25K Ohms 15K 25K Ohms 1000 uA (V+)*0.7 V -1 1 uA Input “Failsafe” Open Circuit Differential voltage 200 2500 mV Output Drive Current @ 0.5 V from rail (high or low) 10 Output Short Circuit Current (to V-) 15 75 mA Output Tristate Current, 0 < Vout < V+ -10 10 uA Supply Voltage Supply Current (Line inputs open, enabled) (V+)=3.3 V Input Threshold (Line, differential) VCM=+7 VCM=0 VCM=-7 Input Threshold Hysteresis (Line, Differential) VCM=0 Input Resistance (Line pins) VCM=+7 VCM=0 VCM=-7 Input Current (Line pins) 1 30 VCM=+7 -1200 VCM=-7 Input Threshold (Enable) Input Current (Enable) (V+)*0.3 (V+)/2 mA VOH @ 10 mA (V+) – 0.5 V (V+) – 0.4 (V+) V VOL @ 10 mA 0 0.4 0.5 V V TPHL (See Fig 2) 15 25 nS TPLH (See Fig 2) 15 25 nS TPZL, TPZH (See Fig 3) 15 25 nS TPHZ, TPLZ (See Fig 3) 15 25 nS 50 FMAX Notes: MHz 1. “Line” pins refer to A-, A+, B-, B+, C-, C+, D-, D+, differential outputs 2. “Digital Input” or “Enable” pins refer to E+, E3. “Digital Input” pins refer to AQ, BQ, CQ, DQ 4. Output Short Circuit not intended to imply continuous operation 5. FMAX is guaranteed by design. Test performed at 1 MHz. ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 6 Document No. 70-0158-01 │ UltraCMOS™ RFIC Solutions PE926C32 Product Specification Figure 3. TPLH, TPHL Test Circuit Block Diagram TPLH, TPHL measured from input 50% to output 50% thresholds. TRISE, TFALL measured from output 20% to output 80% thresholds. 4,16 DC 8,12 2,6,10,14 - VI 1.0 –+ 2.0 I- 3,5,11,13 + 1,7,9,15 I+ CL 15pF VI1.0 – 2.0 Q TPLH TPLH Figure 2: TPLH, TPHL Q TRISE TFALL Figure 4. TPLZ, TPZL, TPHZ, TPZH Test Circuit Block Diagram TPZH, TPZL measured from input 50% to output 50% thresholds. TPHZ, TPLZ measured from input 50% to output 10% thresholds. 16 DC Vcc 3.3V 4 R 2KΩ L 2,6,10,14 3,5,11,13 + 13 E+/E0-(V+) VI DC L: 0.0 + H: 1.5 CL 15pF 1,7,9,15 DC EE+ Q VIL: 1.5 H: 0.0 TPZH TPHZ TPZL TPLZ Q Figure 3: TPHZ, TPZH, TPLZ, TPZL Table 6. Ordering Information Order Code Part Marking Description Package Shipping Method 926C32-01 PE926C32-01 Engineering Sample 16-lead FLAT PACK 1/Box 926C32-21 PE926C32-21 Flight Product, FP 16-lead FLAT PACK 25/Tray 926C32-00 PE926C32-EK Evaluation Kit Evaluation Board 1/Box Document No. 70-0158-01 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 6 PE926C32 Product Specification Sales Offices United States Japan Peregrine Semiconductor Corp. Peregrine Semiconductor K.K. 9450 Carroll Park Drive San Diego, CA 92121 Tel 1-858-731-9400 Fax 1-858-731-9499 5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: 011-81-3-3502-5211 Fax: 011-81-3-3502-5213 Europe China Peregrine Semiconductor Europe Peregrine Semiconductor Bâtiment Maine 13-15 rue des Quatre Vents F- 92380 Garches, France Tel: 011- 33-1-47-41-91-73 Fax : 011-33-1-47-41-91-73 28G, Times Square, No. 500 Zhangyang Road, Shanghai, 200122, P.R. China Tel: 011-86-21-5836-8276 Fax: 011-86-21-5836-7652 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 6 The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS is a trademark of Peregrine Semiconductor Corp. Document No. 70-0158-01 │ UltraCMOS™ RFIC Solutions