A62L256 Series Preliminary 32K X 8 BIT LOW VOLTAGE CMOS SRAM Document Title 32K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. History Issue Date 1.0 Initial issue September 01, 1997 1.1 Modify 28-pin DIP, SOP and TSOP packages outline January 20, 1998 Remark dimensions. 1.2 Modify 28-pin SOP and TSOP packages outline drawings June 17, 1998 and dimensions 1.3 Add -LLU type April 11, 2001 Change operating voltage Vccmax from 3.3V to 3.6V 1.4 Add Product Family in page 1 November 30, 2001 Delete ICC item Add ICC2(typ.) ICCDR(typ.) Change ISB1(typ.) ICCDR(max.) Change ordering information from ICC1 to ICC2 PRELIMINARY (November, 2001, Version 1.4) AMIC Technology, Inc. A62L256 Series Preliminary 32K X 8 BIT LOW VOLTAGE CMOS SRAM Features General Description n External Operating Voltage: 2.7V to 3.6V n Access times: 55ns (max.): for VCC = 3.0V to 3.6V 70ns (max.): for VCC = 2.7V to 3.6V n Current: Operating (ICC1): -55 series 18mA (typ.) -70 series 12mA (typ.) Standby (ISB1): 0.05µA (typ.) n Extended operating temperature range: -40º C to +85º C for -LLU series n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2.0V (min.) n Available in 28-pin DIP, SOP and TSOP (forward and reverse type) packages The A62L256 is a low operating current 262,144-bit static random access memory organized as 32,768 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Minimum standby power is drawn by this device when CE is at a high level, independent of the other input levels. Data retention is guaranteed at a power supply voltage as low as 2.0V. Product Family Power Dissipation Data Retention Standby Operating (ICCDR, Typ.) (ISB1, Typ.) (ICC2, Typ.) Product Family Operating Temperature VCC Range Speed A62L256 -40°C ~ +85°C 2.7V~3.6V 55ns / 70ns 0.02µA 28L DIP 28L SOP 28L TSOP 1mA 0.05µA Package Type 1. Typical values are measured at VCC = 3.0V, TA = 25°C and not 100% tested. 2. Data retention current VCC = 2.0V. Pin Configurations 28 VCC A14 1 28 VCC 2 27 WE A12 2 27 WE A7 3 26 A13 A7 3 26 A13 A6 4 25 A8 A6 4 25 A8 A5 5 24 A9 A5 5 24 A9 A4 6 23 A11 A4 6 23 A11 A3 7 22 OE A3 7 22 OE A2 8 21 A10 A2 8 A1 9 20 CE A1 9 A62L256M 1 A12 A62L256 A14 21 A10 20 CE A0 10 19 I/O7 A0 10 19 I/O7 I/O0 11 18 I/O6 I/O0 11 18 I/O6 I/O1 12 17 I/O5 I/O1 12 17 I/O5 I/O2 13 16 I/O4 I/O2 13 16 I/O4 GND 14 15 I/O3 GND 14 15 I/O3 PRELIMINARY (November, 2001, Version 1.4) 2 OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 A3 A4 A5 A6 A7 A12 A14 VCC WE A13 A8 A9 A11 OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ~ ~ n TSOP A62L256V ~ ~ ~ ~ n SOP A62L256R ~ ~ n DIP 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 VSS I/O2 I/O1 I/O0 A0 A1 A2 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A2 A1 A0 I/O0 I/O1 I/O2 VSS I/O3 I/O4 I/O5 I/O6 I/O7 CE A10 AMIC Technology, Inc. A62L256 Series Block Diagram VCC A5 GND A9 ROW 512 X 512 DECODER MEMORY ARRAY A11 A14 I/O 0 COLUMN I/O INPUT DATA CIRCUIT COLUMN DECODER I/O 7 A0 CE A4 A10 CONTORL OE CIRCUIT WE Pin Descriptions - DIP/SOP Pin Description-TSOP Pin No. Symbol Description 1-10, 21, 23-26 A0 - A14 Address Input 11-13, 15-19 I/O0 - I/O7 Data Input/Output 14 GND 20 Pin No. Symbol 1 OE Output Enable 2-5, 8-17, 28 A0 - A14 Address Input Ground 7 VCC Power Supply CE Chip Enable 6 WE Write Enable 22 OE Output Enable 18-20, 22-26 I/O0 - I/O7 27 WE Write Enable 21 GND 28 VCC Power Supply 27 CE PRELIMINARY (November, 2001, Version 1.4) 3 Description Data Input/Output Ground Chip Enable AMIC Technology, Inc. A62L256 Series Recommended DC Operating Conditions (TA = 0°C to + 70°C or -40°C to +85°C) Symbol Parameter Min. Typ. Max. Unit 2.7 3.0 3.6 V 0 0 0 V VCC Supply Voltage GND Ground VIH Input High Voltage VCC * 0.7 - VCC + 0.3 V VIL Input Low Voltage -0.3 0 +0.3 V Absolute Maximum Ratings* *Comments VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to +3.6V IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V Operating Temperature, Topr . . . . . . . . . . 0°C to +70°C Storage Temperature, Tstg . . . . . . . . . -55°C to +125°C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . 0.7W Soldering Temp. & Time . . . . . . . . . . . . . 260°C, 10 sec Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (TA = 0°C to + 70°C or -40º C to +85º C, VCC = 2.7V to 3.6V, GND = 0V) Symbol Parameter A62L256-55LL/55LLU A62L256-70LL/70LLU Min. Typ. Max. Min. Typ. Max. Unit Conditions ILI Input Leakage Current - - 1 - - 1 µA VIN = GND to VCC ILO Output Leakage Current - - 1 - - 1 µA CE = VIH or WE = VIL VI/O = GND to VCC ICC1 Dynamic Operating Current - *18 25 - **12 20 mA Min. Cycle, Duty = 100% CE = VIL, II/O = 0mA ICC2 Dynamic Operating Current - 1 3 - 1 3 mA CE = VIL, VIH = VCC VIL = 0V, f = 1 MHz II/O = 0 mA Typical values are measured at VCC = 3.0V, TA = 25°C and not 100% tested. * Testing condition : TA = 25°C, VCC = 3.0V, Cycle Time = 55 ns ** Testing condition : TA = 25°C, VCC = 3.0V, Cycle Time = 70 ns PRELIMINARY (November, 2001, Version 1.4) 4 AMIC Technology, Inc. A62L256 Series DC Electrical Characteristics (continued) Symbol ISB Parameter Supply Current A62L256-55LL/70LL A62L256-55LLU/70LLU Unit Min. Typ. Max. Min. Typ. Max. - - 50 - - 50 µA CE = VIH - 0.05 2 - 0.05 5 µA CE ≥ VCC - 0.2V VIN ≥ 0V Standby Power ISB1 Conditions VOL Output Low Voltage - - 0.3 - - 0.3 V IOL = 2.1mA VOH Output High Voltage VCC - 0.3 - - VCC - 0.3 - - V IOH = -1.0mA Typical values are measured at VCC = 3.0V, TA = 25°C and not 100% tested. Truth Table Mode I/O Operation Supply Current CE OE WE Standby H X X High Z ISB, ISB1 Output Disable L H H High Z ICC, ICC1, ICC2 Read L L H DOUT ICC, ICC1, ICC2 Write L X L DIN ICC, ICC1, ICC2 Note: X: H or L Capacitance (TA = 25°C, f = 1.0 MHz) Symbol Parameter Min. Max. Unit Conditions CIN* Input Capacitance 6 pF VIN = 0V CI/O* Input/Output Capacitance 8 pF VI/O = 0V These parameters are sampled and not 100% tested. PRELIMINARY (November, 2001, Version 1.4) 5 AMIC Technology, Inc. A62L256 Series AC Characteristics (TA = 0°C to +70°C or -40º C to +85º C) Symbol Parameter A62L256-55LL/LLU A62L256-70LL/LLU (VCC = 3.0V to 3.6V) (VCC = 2.7V to 3.6V) Unit Min. Max. Min. Max. 55 - 70 - ns Read Cycle tRC Read Cycle Time tAA Address Access Time - 55 - 70 ns tACE Chip Enable Access Time - 55 - 70 ns tOE Output Enable to Output Valid - 30 - 35 ns tCLZ Chip Enable to Output in Low Z 10 - 10 - ns tOLZ Output Enable to Output in Low Z 5 - 5 - ns tCHZ Chip Disable to Output in High Z - 20 - 25 ns tOHZ Output Disable to Output in High Z - 20 - 25 ns tOH Output Hold from Address Change 5 - 10 - ns tWC Write Cycle Time 55 - 70 - ns tCW Chip Enable to End of Write 50 - 60 - ns tAS Address Set up Time 0 - 0 - ns tAW Address Valid to End of Write 50 - 60 - ns tWP Write Pulse Width 40 - 50 - ns tWR Write Recovery Time 0 - 0 - ns tWHZ Write to Output in High Z - 25 - 25 ns tDW Data to Write Time Overlap 25 - 30 - ns tDH Data Hold from Write Time 0 - 0 - ns tOW Output Active from End of Write 5 - 5 - ns Write Cycle Notes: tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels. PRELIMINARY (November, 2001, Version 1.4) 6 AMIC Technology, Inc. A62L256 Series Timing Waveforms Read Cycle 1 (1) tRC Address tAA OE tOE tOH tOLZ5 CE tOHZ5 tACE tCHZ5 tCLZ5 DOUT Read Cycle 2 (1, 2, 4) tRC Address tAA tOH tOH DOUT PRELIMINARY (November, 2001, Version 1.4) 7 AMIC Technology, Inc. A62L256 Series Timing Waveforms (continued) Read Cycle 3 (1, 3, 4) CE tACE tCLZ 5 tCHZ 5 DOUT Notes: 1. 2. 3. 4. 5. WE is high for Read Cycle. Device is continuously enabled, CE = VIL. Address valid prior to or coincident with CE transition low. OE = VIL. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. (6) Write Cycle 1 (Write Enable Controlled) tWC Address tAW tWR 3 tCW5 CE (4) tAS1 tWP 2 WE tDW tDH DIN tWHZ 7 tOW 7 DOUT PRELIMINARY (November, 2001, Version 1.4) 8 AMIC Technology, Inc. A62L256 Series Timing Waveforms (continued) (6) Write Cycle 2 (Chip Enable Controlled) tWC Address tWR 3 tAW tCW5 CE tAS1 (4) tWP 2 WE tDW tDH DIN tWHZ7 DOUT Notes: 1. 2. 3. 4. tAS is measured from the address valid to the beginning of Write. A Write occurs during the overlap (tWP) of a low CE and a low WE . tWR is measured form the earliest of CE or WE going high to the end of the Write cycle. If the CE low transition occurs simultaneously with the WE low transition or after the WE transition, outputs remain in a high impedance state. 5. tCW is measured from the later of CE going low to the end of Write. 6. OE level is high or low. 7. Transition is measured ±500mV from steady. This parameter is sampled and not 100% tested. PRELIMINARY (November, 2001, Version 1.4) 9 AMIC Technology, Inc. A62L256 Series AC Test Conditions Input Pulse Levels 0V, VCC Input Rise And Fall Time 5 ns Input and Output Timing Reference Levels VCC/2 Output Load See Figure 1 CL 30pF * Including scope and jig. Figure 1. Output Load Data Retention Characteristics (TA = 0°C to 70°C or -40º C to +85º C) Symbol Parameter VDR VCC for Data Retention ICCDR Data Retention Current tCDR tR Min. Typ. Max. Unit 2.0 - 3.6 V CE ≥ VCC - 0.2V LL-version - 0.02 0.5 µA LLU-version - 0.02 2 VCC = 2V, CE ≥ VCC - 0.2V VIN ≥ 0V Chip Disable to Data Retention Time Operation Recovery Time 0 - ns tRC - ns Conditions See Retention Waveform Typical values are measured at TA = 25°C. Low VCC Data Retention Waveform DATA RETENTION MODE VCC 3.0V tCDR 3.0V tR VCC ≥ 2.0V VIH VIH CE CE ≥ VCC - 0.2V PRELIMINARY (November, 2001, Version 1.4) 10 AMIC Technology, Inc. A62L256 Series Ordering Information Operating Current (ICC2) Max. (mA) Standby Current (ISB1) Max. (µA) Package 3 2 28L DIP 3 2 28L SOP A62L256V-55LL 3 2 28L TSOP (Forward) A62L256R-55LL 3 2 28L TSOP (Reverse) A62L256-70LL 3 2 28L DIP 3 2 28L SOP A62L256V-70LL 3 2 28L TSOP (Forward) A62L256R-70LL 3 2 28L TSOP (Reverse) A62L256-55LLU 3 5 28L DIP 3 5 28L SOP A62L256V-55LLU 3 5 28L TSOP (Forward) A62L256R-55LLU 3 5 28L TSOP (Reverse) A62L256-70LLU 3 5 28L DIP 3 5 28L SOP A62L256V-70LLU 3 5 28L TSOP (Forward) A62L256R-70LLU 3 5 28L TSOP (Reverse) Part No. Access Time (ns) A62L256-55LL A62L256M-55LL 55 A62L256M-70LL 70 A62L256M-55LLU A62L256M-70LLU PRELIMINARY 55 70 (November, 2001, Version 1.4) 11 AMIC Technology, Inc. A62L256 Series Package Information P-DIP 28L Outline Dimensions unit: inches/mm D 15 E1 28 14 1 E A1 A2 Base Plane Seating Plane L A C S B B1 α e1 Dimensions in inches Symbol Min Nom Max eA Dimensions in mm Min Nom Max A - - 0.210 - - 5.33 A1 0.010 - - 0.25 - - A2 0.150 0.155 0.160 3.81 3.94 4.06 B 0.016 0.018 0.022 0.41 0.46 0.56 B1 0.058 0.060 0.064 1.47 1.52 1.63 C D 0.008 - 0.010 1.460 0.014 1.470 0.20 - 0.25 37.08 0.36 37.34 E 0.590 0.600 0.610 14.99 15.24 15.49 E1 0.540 0.545 0.550 13.72 13.84 13.97 e1 0.090 0.100 0.110 2.29 2.54 2.79 L 0.120 0.130 0.140 3.05 3.30 3.56 α 0° - 15° 0° - 15° eA 0.630 0.650 0.670 16.00 16.51 17.02 S - - 0.090 - - 2.29 Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E1 does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (November, 2001, Version 1.4) 12 AMIC Technology, Inc. A62L256 Series Package Information SOP (W.B.) 28L Outline Dimensions unit: inches/mm H 15 E 28 θ L 1 B Detail F 14 L1 A1 e S D y A A2 c D Seating Plane y See Detail F Dimensions in inches Symbol Min Nom Max A - - 0.112 A1 0.004 - - A2 0.093 0.098 0.103 Dimensions in mm Min Nom Max - - 2.85 0.10 - - 2.36 2.49 2.62 0.51 B 0.014 0.016 0.020 0.36 0.41 C 0.008 0.010 0.012 0.20 0.25 0.30 D - 0.713 0.728 - 18.11 18.49 E 0.326 0.331 0.336 8.28 8.41 8.53 e 0.044 0.050 0.056 1.12 1.27 1.42 H 0.453 0.465 0.477 11.51 11.81 12.12 1.12 L 0.028 0.036 0.044 0.71 0.91 L1 0.059 0.067 0.075 1.50 1.70 1.91 S - - 0.047 - - 1.19 y - - 0.004 - - 0.10 ο 0° - 8° 0° - 8° Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (November, 2001, Version 1.4) 13 AMIC Technology, Inc. A62L256 Series Package Information TSOP 28L TYPE I (8 X 13.4mm) Outline Dimensions unit: inches/mm D1 Detail "A" 28 A1 E c A A2 1 e θ 14 L 15 D D Detail "A" y S Dimensions in inches Symbol b Dimensions in mm Min Nom Max Min Nom Max A - - 0.049 - - 1.25 A1 0.002 - - 0.05 - - A2 0.037 0.039 0.041 0.95 1.00 1.05 b 0.007 0.009 0.011 0.17 0.22 0.27 c 0.005 - 0.008 0.12 - 0.21 E 0.311 0.315 0.319 7.90 8.00 8.10 L 0.012 0.020 0.028 0.30 0.50 0.70 D 0.520 0.528 0.536 13.20 13.40 13.60 D1 0.461 0.465 0.469 11.70 11.80 11.90 e 0.022 BSC S 0.55 BSC 0.017 TYP 0.425 TYP y - - 0.004 - - 0.10 θ 0° - 5° 0° - 5° Notes: 1. The maximum value of dimension D1 includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (November, 2001, Version 1.4) 14 AMIC Technology, Inc.