A62S8308 Series Preliminary 256K X 8 BIT LOW VOLTAGE CMOS SRAM Document Title 256K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. History Issue Date Remark 0.0 Initial issue December 6, 1999 Preliminary 0.1 Modify VCCmax from 3.3V to 3.6V December 20, 2000 0.2 Add 55ns grade spec. for VCC = 3.0V to 3.6V March 23, 2001 PRELIMINARY (March, 2001, Version 0.2) AMIC Technology, Inc. A62S8308 Series Preliminary 256K X 8 BIT LOW VOLTAGE CMOS SRAM Features n n n n n Power supply range: 2.7V to 3.6V n Access times: 55ns (max.): for VCC = 3.0V to 3.6V 70ns (max.): for VCC = 2.7V to 3.6V n Current: A62S8308-S series: Operating: 40mA (max.) Standby: 10µA (max.) A62S8308-SI series: Operating: 40mA (max.) Standby: 15µA (max.) n Extended operating temperature range:-25°C to 85°C for –SI series Full static operation, no clock or refreshing required All inputs and outputs are directly TTL compatible Common I/O using three-state output Output enable and two chip enable inputs for easy application n Data retention voltage: 2V (min.) n Available in 32-pin SOP, TSOP, sTSOP (8X 13.4mm) forward type and 36-ball Mini BGA (6X8) packages General Description The A62S8308 is a low operating current 2,097,152-bit static random access memory organized as 262,144 words by 8 bits and operates on a low power supply voltage from 2.7V to 3.6V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enable inputs are provided for power down and a device enable and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Pin Configurations 1 32 VCC 2 31 A15 A14 3 30 CE2 A12 4 29 WE A7 5 28 A13 A6 6 27 A8 A5 7 26 A9 A4 8 25 A11 A3 9 24 OE A2 10 23 A10 A1 11 22 CE1 A0 12 21 I/O 7 I/O 0 13 20 I/O 6 I/O 1 14 19 I/O 5 I/O 2 15 18 I/O 4 GND 16 17 I/O 3 A62S8308M A17 A16 PRELIMINARY A11 A9 A8 A13 WE CE2 A15 VCC A17 A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (March, 2001, Version 0.2) n Mini BGA (6X8) Top View ~ n TSOP/(sTSOP) (forward type) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 A62S8308V (A62S8308X) ~ ~ n SOP 1 OE A10 CE1 I/O 7 I/O 6 I/O 5 I/O 4 I/O 3 GND I/O 2 I/O 1 I/O 0 A0 A1 A2 A3 1 2 3 4 5 6 A A0 A1 CE2 A3 A6 A8 B I/O4 A2 WE A4 A7 I/O0 C I/O5 NC A5 D VSS VCC E VCC VSS F I/O6 G I/O7 H A9 I/O1 NC A17 I/O2 OE CE1 A16 A15 I/O3 A10 A11 A12 A13 A14 AMIC Technology, Inc. A62S8308 Series Block Diagram A0 VCC GND A15 ROW 1024 X 2048 DECODER MEMORY ARRAY INPUT DATA CIRCUIT COLUMN I/O A16 A17 I/O0 I/O7 CE2 CE1 CONTROL CIRCUIT OE WE Pin Descriptions - SOP Pin Description - TSOP/sTSOP Pin No. Symbol 1 - 12, 23, 25 - 28, 31 A0 - A17 Address Inputs 13 - 15, 17 - 21 I/O0 - I/O7 Data Inputs/Outputs 16 GND Ground 22 CE1 Chip Enable 1 24 OE Output Enable 29 WE Write Enable 30 CE2 Chip Enable 2 32 VCC Power Supply PRELIMINARY Description (March, 2001, Version 0.2) 2 Pin No. Symbol Description 1 - 4, 7, 9 - 20, 31 A0 - A17 5 WE Write Enable 6 CE2 Chip Enable 2 8 VCC Power Supply 21 - 23, 25 - 29 I/O0 - I/O7 24 GND Ground 30 CE1 Chip Enable 1 32 OE Output Enable Address Inputs Data Inputs/Outputs AMIC Technology, Inc. A62S8308 Series Recommended DC Operating Conditions (TA = 0°C to + 70°C or -25°C to 85°C) Symbol Parameter VCC Supply Voltage GND Ground Min. Typ. Max. Unit 2.7 3.0 3.6 V 0 0 0 V VIH Input High Voltage 2.4 - VCC + 0.3 V VIL Input Low Voltage -0.3 - +0.6 V CL Output Load - - 30 pF TTL Output Load - - 1 - Absolute Maximum Ratings* *Comments VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to + 4.6V IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V Operating Temperature, Topr . . . . . . . . -25°C to + 85°C Storage Temperature, Tstg . .. . . . . . . . -55°C to + 125°C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . 0.7W Soldering Temp. & Time . . . . . . . . . . . . . 260°C, 10 sec Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics Symbol Parameter (TA = 0°C to + 70°C or -25°C to 85°C, VCC = 2.7V to 3.6V, GND = 0V) A62S8308-55S/70S A62S8308-55SI/70SI Min. Max. Min. Max. Unit Conditions ILI Input Leakage Current - 1 - 1 µA VIN = GND to VCC ILO Output Leakage Current - 1 - 1 µA CE1 = VIH or CE2 = VIL or OE = VIH or WE = VIL VI/O = GND to VCC ICC Active Power Supply Current - 3 - 3 mA CE1 = VIL, CE2 = VIH II/O = 0mA - 40 - 40 mA Min. Cycle, Duty = 100% CE1 = VIL, CE2 = VIH II/O = 0mA - 10 - 10 mA CE1 = VIL, CE2 = VIH VIH = VCC, VIL = 0V, f = 1MHz, II/O = 0mA ICC1 Dynamic Operating Current ICC2 PRELIMINARY (March, 2001, Version 0.2) 3 AMIC Technology, Inc. A62S8308 Series DC Electrical Characteristics (continued) Symbol A62S8308-55S/70S Parameter Unit Conditions Min. Max. Min. Max. - 0.5 - 0.5 mA CE1 = VIH or CE2 = VIL - 10 - 15 µA CE1 ≥ VCC - 0.2V CE2 ≥ VCC - 0.2V VIN ≥ 0V - 10 - 15 µA CE2 ≤ 0.2V VIN ≥ 0V ISB Standby Power Supply Current ISB1 A62S8308-55SI/70SI ISB2 VOL Output Low Voltage - 0.4 - 0.4 V IOL = 2.1mA VOH Output High Voltage 2.4 - 2.4 - V IOH = -1.0mA Truth Table Mode CE1 CE2 OE WE I/O Operation H X X X High Z ISB, ISB1 X L X X High Z ISB, ISB2 Output Disable L H H H High Z ICC, ICC1, ICC2 Read L H L H DOUT ICC, ICC1, ICC2 Write L H X L DIN ICC, ICC1, ICC2 Standby Supply Current Note: X = H or L Capacitance (TA = 25°C, f = 1.0MHz) Symbol Parameter Min. Max. Unit Conditions CIN* Input Capacitance 6 pF VIN = 0V CI/O* Input/Output Capacitance 8 pF VI/O = 0V * These parameters are sampled and not 100% tested. PRELIMINARY (March, 2001, Version 0.2) 4 AMIC Technology, Inc. A62S8308 Series AC Characteristics (TA = 0°C to + 70°C or -25°C to 85°C, VCC = 2.7V to 3.6V) Symbol Parameter A62S8308-55S/SI A62S8308-70S/SI (VCC = 3.0V to 3.6V) (VCC = 2.7V to 3.6V) Unit Min. Max. Min. Max. 55 - 70 - ns - 55 - 70 ns CE1 - 55 - 70 ns CE2 - 55 - 70 ns - 30 - 35 ns CE1 10 - 10 - ns CE2 10 - 10 - ns 5 - 5 - ns CE1 0 20 0 25 ns CE2 0 20 0 25 ns Read Cycle tRC Read Cycle Time tAA Address Access Time tACE1 Chip Enable Access Time tACE2 tOE Output Enable to Output Valid tCLZ1 Chip Enable to Output in Low Z tCLZ2 tOLZ Output Enable to Output in Low Z tCHZ1 Chip Disable to Output in High Z tCHZ2 tOHZ Output Disable to Output in High Z 0 20 0 25 ns tOH Output Hold from Address Change 5 - 10 - ns tWC Write Cycle Time 55 - 70 - ns tCW Chip Enable to End of Write 50 - 60 - ns tAS Address Setup Time 0 - 0 - ns tAW Address Valid to End of Write 50 - 60 - ns tWP Write Pulse Width 40 - 50 - ns tWR Write Recovery Time 0 - 0 - ns tWHZ Write to Output in High Z 0 25 0 25 ns tDW Data to Write Time Overlap 25 - 30 - ns tDH Data Hold from Write Time 0 - 0 - ns tOW Output Active from End of Write 5 - 5 - ns Read Cycle Notes: tCHZ1, tCHZ2, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels. PRELIMINARY (March, 2001, Version 0.2) 5 AMIC Technology, Inc. A62S8308 Series Timing Waveforms Read Cycle 1(1, 2, 4) tRC Address tAA tOH tOH DOUT Read Cycle 2 (1, 3, 4, 6) CE1 tACE1 tCLZ15 tCHZ15 DOUT Read Cycle 3 (1, 4, 7 ,8) CE2 tACE2 tCHZ25 tCLZ25 DOUT PRELIMINARY (March, 2001, Version 0.2) 6 AMIC Technology, Inc. A62S8308 Series Timing Waveforms (continued) Read Cycle 4 (1) tRC Address tAA OE tOE tOH tOLZ5 CE1 tACE1 tCHZ15 tCLZ15 CE2 tACE2 tOHZ5 tCHZ25 tCLZ25 DOUT Notes: 1. 2. 3. 4. 5. 6. 7. 8. WE is high for Read Cycle. Device is continuously enabled CE1 = VIL and CE2 = VIH. Address valid prior to or coincident with CE1 transition low. OE = VIL. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. CE2 is high. CE1 is low. Address valid prior to or coincident with CE2 transition high. PRELIMINARY (March, 2001, Version 0.2) 7 AMIC Technology, Inc. A62S8308 Series Timing Waveforms (continued) Write Cycle 1(6) (Write Enable Controlled) tWC Address tAW tWR3 tCW5 CE1 (4) CE2 (4) tAS1 tWP2 WE tDW tDH DIN tWHZ tOW DOUT PRELIMINARY (March, 2001, Version 0.2) 8 AMIC Technology, Inc. A62S8308 Series Timing Waveforms (continued) Write Cycle 2 (Chip Enable Controlled) tWC Address tWR3 tAW tCW5 CE1 tAS1 CE2 (4) (4) tCW5 tWP2 WE tDW tDH DIN tWHZ7 DOUT Notes: 1. 2. 3. 4. tAS is measured from the address valid to the beginning of Write. A Write occurs during the overlap (tWP) of a low CE1 , a high CE2 and a low WE . tWR is measured from the earliest of CE1 or WE going high or CE2 going low to the end of the Write cycle. If the CE1 low transition or the CE2 high transition occurs simultaneously with the WE low transition or after the WE transition, outputs remain in a high impedance state. 5. tCW is measured from the later of CE1 going low or CE2 going high to the end of Write. 6. OE is continuously low. ( OE = VIL) 7. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. PRELIMINARY (March, 2001, Version 0.2) 9 AMIC Technology, Inc. A62S8308 Series AC Test Conditions Input Pulse Levels 0V to 3.0V Input Rise and Fall Time 5 ns Input and Output Timing Reference Levels 1.5V Output Load See Figures 1 and 2 TTL TTL CL CL 30pF 5pF * Including scope and jig. * Including scope and jig. Figure 1. Output Load Data Retention Characteristics Symbol Figure 2. Output Load for tCLZ1, tCLZ2, tOHZ, tOLZ, tCHZ1, tCHZ2, tWHZ, and tOW (TA = 0°C to + 70°C or -25°C to 85°C) Parameter VDR1 Min. Max. Unit 2.0 3.6 V CE1 ≥ VCC - 0.2V 2.0 3.6 V CE2 ≤ 0.2V CE1 ≥ VCC - 0.2V or CE1 ≤ 0.2V - 5* VCC for Data Retention VDR2 S-Version µA ICCDR1 SI-Version - 10** S-Version - 5* Data Retention Current µA ICCDR2 SI-Version tCDR Chip Disable to Data Retention Time tR Operation Recovery Time * A62S8308-55S/70S ** A62S8308-55SI/70SI PRELIMINARY - 10** 0 - ns tRC - ns Conditions VCC = 2.0V CE1 ≥ VCC - 0.2V CE2 ≥ VCC - 0.2V VIN ≥ 0V VCC = 2.0V CE2 ≤ 0.2V VIN ≥ 0V See Retention Waveform ICCDR: Max. 1µA at TA = 0°C + 40°C ICCDR: Max. 1µA at TA = 0°C + 40°C (March, 2001, Version 0.2) 10 AMIC Technology, Inc. A62S8308 Series Low VCC Data Retention Waveform (1) ( CE1 Controlled) DATA RETENTION MODE VCC 2.7V tCDR CE1 2.7V tR VDR ≥ 2V VIH VIH CE1 ≥ VDR - 0.2V Low VCC Data Retention Waveform (2) (CE2 Controlled) DATA RETENTION MODE VCC 2.7V tCDR CE2 2.7V tR VDR ≥ 2V VIL VIL CE2 < 0.2V PRELIMINARY (March, 2001, Version 0.2) 11 AMIC Technology, Inc. A62S8308 Series Ordering Information Operating Current Max. (mA) Standby Current Max. (µ µA) A62S8308M-55S 40 10 32L SOP A62S8308M-55SI 40 15 32L SOP A62S8308V-55S 40 10 32L TSOP 40 15 32L TSOP A62S8308X-55S 40 10 32L sTSOP A62S8308X-55SI 40 15 32L sTSOP A62S8308G-55S 40 10 36B Mini BGA A62S8308G-55SI 40 15 36B Mini BGA A62S8308M-70S 40 10 32L SOP A62S8308M-70SI 40 15 32L SOP A62S8308V-70S 40 10 32L TSOP 40 15 32L TSOP A62S8308X-70S 40 10 32L sTSOP A62S8308X-70SI 40 15 32L sTSOP A62S8308G-70S 40 10 36B Mini BGA A62S8308G-70SI 40 15 36B Mini BGA Part No. A62S8308V-55SI A62S8308V-70SI PRELIMINARY Access Time (ns) 55 70 (March, 2001, Version 0.2) 12 Package AMIC Technology, Inc. A62S8308 Series Package Information SOP (W.B.) 32L Outline Dimensions HE 17 E 32 unit: inches/mm θ L 1 b 16 Detail F D Seating Plane LE A1 e S A A2 c D y See Detail F Dimensions in inches Symbol Dimensions in mm Min Nom Max Min Nom Max A - - 0.118 - - 3.00 A1 0.004 - - 0.10 - - A2 0.101 0.106 0.111 2.57 2.69 2.82 b 0.014 0.016 0.020 0.36 0.41 0.51 c 0.006 0.008 0.012 0.15 0.20 0.31 D - 0.805 0.817 - 20.45 20.75 E 0.440 0.445 0.450 11.18 11.30 11.43 e 0.044 0.050 0.056 1.12 1.27 1.42 HE 0.546 0.556 0.566 13.87 14.12 14.38 L 0.023 0.031 0.039 0.58 0.79 0.99 LE 0.047 0.055 0.063 1.19 1.40 1.60 S - - 0.036 - - 0.91 y - - 0.004 - - 0.10 θ 0° - 10° 0° - 10° Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (March, 2001, Version 0.2) 13 AMIC Technology, Inc. A62S8308 Series Package Information TSOP 32L TYPE I (8 X 20mm) Outline Dimensions unit: inches/mm A A1 c E A2 e D θ L LE HD Detail "A" D Detail "A" y S Dimensions in inches Symbol Min Nom Max b Dimensions in mm Min Nom Max 1.20 A - - 0.047 - - A1 0.002 - 0.006 0.05 - 0.15 A2 0.037 0.039 0.041 0.95 1.00 1.05 b 0.007 0.009 0.011 0.18 0.22 0.27 c 0.004 - 0.008 0.11 - 0.20 D 0.720 0.724 0.728 18.30 18.40 18.50 E - 0.315 0.319 - 8.00 8.10 e 0.020 BSC 0.50 BSC HD 0.779 0.787 0.795 19.80 20.00 20.20 L 0.016 0.020 0.024 0.40 0.50 0.60 LE - 0.032 - - 0.80 - S - - 0.020 - - 0.50 y - - 0.003 - - 0.08 θ 0° - 5° 0° - 5° Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (March, 2001, Version 0.2) 14 AMIC Technology, Inc. A62S8308 Series Package Information sTSOP 32L TYPE I (8 X 13.4mm) Outline Dimensions A A1 c E A2 e unit: inches/mm θ L LE D1 D Detail "A" D Detail "A" 0.076MM S b SEATING PLANE Dimensions in inches Symbol Min Nom A - A1 A2 Dimensions in mm Max Min Nom Max - 0.049 - - 1.25 0.002 - - 0.05 - - 0.037 0.039 0.041 0.95 1.00 1.05 b 0.007 0.008 0.009 0.17 0.20 0.23 c 0.0056 0.0059 0.0062 0.142 0.150 0.158 E 0.311 0.315 0.319 7.90 8.00 8.10 e 0.020 TYP 0.50 TYP D 0.520 0.528 0.535 13.20 13.40 13.60 D1 0.461 0.465 0.469 11.70 11.80 11.90 L 0.012 0.020 0.028 0.30 0.50 0.70 LE 0.0275 0.0315 0.0355 0.700 0.800 0.900 S θ 0.0109 TYP 0° 3° 0.278 TYP 5° 0° 3° 5° Notes: 1. The maximum value of dimension D1 includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (March, 2001, Version 0.2) 15 AMIC Technology, Inc. A62S8308 Series Package Information Mini BGA 6X8 (36 BALLS) Outline Dimensions unit : millimeter(mm) Bottom View Top View Pin A1 Index Pin A1 Index 6 5 4 3 2 1 C C1 A B C D A E F G H A B Diameter D Solder Ball B1 D E2 0.10 E1 E PRELIMINARY Symbol Min Typ Max A - 0.75 - B 5.90 6.00 6.10 B1 - 3.75 - C 7.90 8.00 8.10 C1 - 5.25 - D 0.30 0.35 0.40 E 1.00 1.10 1.20 E1 - 0.36 - E2 - 0.22 - (March, 2001, Version 0.2) 16 AMIC Technology, Inc.