LP62S1664C Series Preliminary 64K X 16 BIT LOW VOLTAGE CMOS SRAM Document Title 64K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.0 PRELIMINARY History Issue Date Remark Initial issue February 19, 2002 Preliminary (February, 2002, Version 0.0) AMIC Technology, Inc. LP62S1664C Series Preliminary 64K X 16 BIT LOW VOLTAGE CMOS SRAM Features General Description n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max.) n Current: LP62S1664C-55 series: Operating: 50mA (max.) Standby: 5µA (max.) LP62S1664C-70 series: Operating: 40mA (max.) Standby: 5µA (max.) n Extended operating temperature range : -40°C to 85°C for -LLI series n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2V (min.) n Available in 44-pin TSOP and 48-ball Mini BGA (6X8) packages. The LP62S1664C is a low operating current 1,048,576bit static random access memory organized as 65,536 words by 16 bits and operates on low power supply voltage from 2.7V to 3.6V. It is built using AMIC’s high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. The chip enable input is provided for POWER-DOWN, device enable. Two byte enable inputs and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Product Family Power Dissipation Product Family Operating Temperature VCC Range Speed Data Retention (ICCDR, Typ.) Standby (ISB1, Typ.) Operating (ICC2, Typ.) LP62S1664C -40°C ~ +85°C 2.7V~3.6V 55ns / 70ns 0.2µA 0.3µA 3mA Package Type 44L TSOP 48B MBGA 1. Typical values are measured at VCC = 3.0V, TA = 25°C and not 100% tested. 2. Data retention current VCC = 2.0V. Pin Configuration n TSOP (Type II) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 PRELIMINARY LP62S1664CV A4 A3 A2 A1 A0 CE I/O0 I/O1 I/O2 I/O3 VCC GND I/O4 I/O5 I/O6 I/O7 WE A15 A14 A13 A12 NC 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 n Mini BGA (6X8) Top View A5 A6 A7 OE HB LB I/O15 I/O14 I/O13 I/O12 GND VCC I/O11 I/O10 I/O9 I/O8 NC A8 A9 A10 A11 NC (February, 2002, Version 0.0) 1 2 3 4 5 6 A LB OE A0 A1 A2 NC B I/O8 HB A3 A4 CS I/O0 C I/O9 I/O10 A5 A6 I/O1 I/O2 D VSS I/O11 NC A7 I/O3 VCC E VCC I/O12 NC NC I/O4 VSS F I/O14 I/O13 A14 A15 I/O5 I/O6 G I/O15 NC A12 A13 WE I/O7 H NC A8 A9 A10 A11 NC LP62S1664CU 1 AMIC Technology, Inc. LP62S1664C Series Block Diagram VCC A0 GND 512 X 2048 DECODER MEMORY ARRAY A14 A15 I/O0 I/O8 INPUT COLUMN I/O INPUT DATA CIRCUIT DATA CIRCUIT I/O15 I/O7 CE LB HB OE WE PRELIMINARY CONTROL CIRCUIT (February, 2002, Version 0.0) 2 AMIC Technology, Inc. LP62S1664C Series Pin Description - TSOP Pin No. Symbol Description 1 - 5, 18 - 21, 24 - 27,42 - 44 A0 - A15 6 CE Chip Enable Input 7 - 10, 13 - 16, 29 - 32, 35 - 38 I/O0 - I/O15 Data Input/Outputs 17 WE Write Enable Input 39 LB Byte Enable Input (I/O0 to I/O7) 40 HB Byte Enable Input (I/O8 to I/O15) 41 OE Output Enable Input 11, 33 VCC Power 12, 34 GND Ground 22 , 23, 28 NC Address Inputs No Connection Recommended DC Operating Conditions (TA = -25°C to + 85°C for –LLT or -40°C to 85°C for -LLI) Symbol Parameter Min. Typ. Max. Unit 2.7 3.0 3.6 V 0 0 0 V VCC Supply Voltage GND Ground VIH Input High Voltage 2.2 - VCC + 0.3 V VIL Input Low Voltage -0.3 - +0.6 V CL Output Load - - 30 pF TTL Output Load - - 1 - PRELIMINARY (February, 2002, Version 0.0) 3 AMIC Technology, Inc. LP62S1664C Series Absolute Maximum Ratings* *Comments VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to +4.6V IN, IN/OUT Volt to GND . . . . . . . . -0.5V to VCC + 0.5V Operating Temperature, Topr . . . . . . . . -40°C to +85°C Storage Temperature, Tstg . . . . . . . . . -55°C to +125°C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . 0.7W Soldering Temp. & Time . . . . . . . . . . . . 260°C, 10 sec Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (TA = -25°C to + 85°C for -LLT or -40°C to + 85°C for -LLI, VCC = 2.7V to 3.6V, GND = 0V) Symbol Parameter LP62S1664C-55LLT/LLI LP62S1664C-70LLT/LLI Min. Max. Min. Max. - 1 - 1 ILI Input Leakage Current ILO Output Leakage Current - 1 - ICC Active Power Supply Current - 5 - ICC1 ICC2 Dynamic Operating Current ISB ISB1 Standby Power Supply Current Unit Conditions µA VIN = GND to VCC 1 µA CE = VIH or OE = VIH or LB = HB = VIH or WE = VIL VI/O = GND to VCC - 5 mA CE = VIL, II/O = 0mA 50 - 40 mA Min. Cycle, Duty = 100% CE = VIL, II/O = 0mA - 5 - 5 mA CE = VIL, VIH = VCC, VIL = 0V, f = 1MHz, II/O = 0 mA - 0.3 - 0.3 mA CE = VIH - 5 - 5 µA CE ≥ VCC - 0.2V VIN ≥ 0V VOL Output Low Voltage - 0.4 - 0.4 V IOL = 2.1mA VOH Output High Voltage 2.2 - 2.2 - V IOH = -1.0mA PRELIMINARY (February, 2002, Version 0.0) 4 AMIC Technology, Inc. LP62S1664C Series Truth Table I/O0 to I/O7 Mode I/O8 to I/O15 Mode VCC Current CE OE WE LB HB H X X X X Not selected Not selected ISB1, ISB L L Read Read ICC1, ICC2, ICC L H Read High - Z ICC1, ICC2, ICC H L High - Z Read ICC1, ICC2, ICC L L Write Write ICC1, ICC2, ICC L H Write Not Write/Hi - Z ICC1, ICC2, ICC H L Not Write/Hi - Z Write ICC1, ICC2, ICC L X High - Z High - Z ICC1, ICC2, ICC X L High - Z High - Z ICC1, ICC2, ICC H H Not selected L L L L X H X X H L H X Not selected ISB1, ISB Note: X = H or L Capacitance (TA = 25°C, f = 1.0MHz) Symbol Parameter Min. Max. Unit Conditions CIN* Input Capacitance - 6 pF VIN = 0V CI/O* Input/Output Capacitance - 8 pF VI/O = 0V * These parameters are sampled and not 100% tested. PRELIMINARY (February, 2002, Version 0.0) 5 AMIC Technology, Inc. LP62S1664C Series AC Characteristics (TA = -25°C to +85°C for -LLT or -40°C to +85°C for -LLI, VCC = 2.7V to 3.6V) Symbol Parameter LP62S1664C-55LLT/LLI LP62S1664C-70LLT/LLI Unit Min. Max. Min. Max. 55 - 70 - ns Read Cycle tRC Read Cycle Time tAA Address Access Time - 55 - 70 ns tACE Chip Enable Access Time - 55 - 70 ns tBE Byte Enable Access Time - 55 - 70 ns tOE Output Enable to Output Valid - 30 - 35 ns tCLZ Chip Enable to Output in Low Z 10 - 10 - ns tBLZ Byte Enable to Output in Low Z 5 - 5 - ns tOLZ Output Enable to Output in Low Z 5 - 5 - ns tCHZ Chip Disable to Output in High Z - 20 - 25 ns tBHZ Byte Disable to Output in High Z - 20 - 25 ns tOHZ Output Disable to Output in High Z - 20 - 25 ns tOH Output Hold from Address Change 5 - 10 - ns tWC Write Cycle Time 55 - 70 - ns tCW Chip Enable to End of Write 50 - 60 - ns tBW Byte Enable to End of Write 50 - 60 - ns tAS Address Setup Time 0 - 0 - ns tAW Address Valid to End of Write 50 - 60 - ns tWP Write Pulse Width 40 - 50 - ns tWR Write Recovery Time 0 - 0 - ns tWHZ Write to Output in High Z - 25 - 30 ns tDW Data to Write Time Overlap 25 - 30 - ns tDH Data Hold from Write Time 0 - 0 - ns tOW Output Active from End of Write 5 - 5 - ns Write Cycle Note: tCHZ, tBHZ and tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels. PRELIMINARY (February, 2002, Version 0.0) 6 AMIC Technology, Inc. LP62S1664C Series Timing Waveforms (1, 2, 4) Read Cycle 1 tRC Address tAA tOH tOH DOUT (1, 2, 3) Read Cycle 2 tRC Address tAA CE tACE tCHZ 5 tCLZ 5 tBE HB, LB tBLZ 5 tBHZ 5 OE tOHZ 5 tOE tOLZ 5 DOUT Notes: 1. WE is high for Read Cycle. 2. Device is continuously enabled CE = VIL, HB = VIL and, or LB = VIL. 3. Address valid prior to or coincident with CE and ( HB and, or LB ) transition low. 4. OE = VIL. 5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. PRELIMINARY (February, 2002, Version 0.0) 7 AMIC Technology, Inc. LP62S1664C Series Timing Waveforms (continued) Write Cycle 1 (Write Enable Controlled) tWC Address tWR3 tAW tCW CE tBW HB, LB tAS1 tWP2 WE tDW tDH DATA IN tWHZ 4 tOW DATA OUT PRELIMINARY (February, 2002, Version 0.0) 8 AMIC Technology, Inc. LP62S1664C Series Timing Waveforms (continued) Write Cycle 2 (Chip Enable Controlled) tWC Address tAW tAS1 tWR3 tCW2 CE tBW HB, LB tWP WE tDW tDH DATA IN tWHZ 4 tOW DATA OUT PRELIMINARY (February, 2002, Version 0.0) 9 AMIC Technology, Inc. LP62S1664C Series Timing Waveforms (continued) Write Cycle 3 (Byte Enable Controlled) tWC Address tAW tCW CE tAS1 tWR3 tBW2 HB, LB tWP WE tDH tDW DATA IN tWHZ 4 tOW DATA OUT Notes: 1. tAS is measured from the address valid to the beginning of Write. 2. A Write occurs during the overlap (tWP, tBW) of a low CE , WE and ( HB and, or LB ). 3. tWR is measured from the earliest of CE or WE or ( HB and, or LB ) going high to the end of the Write cycle. 4. OE level is high or low. 5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. PRELIMINARY (February, 2002, Version 0.0) 10 AMIC Technology, Inc. LP62S1664C Series AC Test Conditions Input Pulse Levels 0V to 2.4V Input Rise And Fall Time 5 ns Input and Output Timing Reference Levels 1.5V Output Load See Figures 1 and 2 TTL TTL CL CL 5pF 30pF * Including scope and jig. * Including scope and jig. Figure 1. Output Load Figure 2. Output Load for tCLZ, tOLZ, tCHZ, tOHZ, tWHZ, and tOW Data Retention Characteristics (TA = -25°C to 85°C for –LLT or -40°C to 85°C for -LLI) Symbol Parameter Min. Max. Unit Conditions VDR VCC for Data Retention 2.0 3.6 V CE ≥ VCC - 0.2V ICCDR Data Retention Current - 3* µA VCC = 2.0V, CE ≥ VCC - 0.2V VIN ≥ 0V tCDR Chip Disable to Data Retention Time 0 - ns tRC - ns 5 - ms tR tVR Operation Recovery Time VCC Rise Time from Data Retention Voltage to Operating Voltage * LP62S1664C-55/70(LLT/LLI) PRELIMINARY ICCDR: max. (February, 2002, Version 0.0) See Retention Waveform 1µA at TA = 0°C to + 40°C 11 AMIC Technology, Inc. LP62S1664C Series Low VCC Data Retention Waveform DATA RETENTION MODE VCC 2.7V 2.7V tCDR tR VDR ≥ 2V tVR VIH CE VIH CE ≥ VDR - 0.2V Ordering Information Part No. Access Time (ns) Operating Current Max. (mA) Standby Current Max. (µ µA) LP62S1664CV-55LLT Package 44L TSOP LP62S1664CV-55LLI 44L TSOP 55 50 5 LP62S1664CU-55LLT 48B Mini BGA LP62S1664CU-55LLI 48B Mini BGA LP62S1664CV-70LLT 44L TSOP LP62S1664CV-70LLI 44L TSOP 70 40 5 LP62S1664CU-70LLT 48B Mini BGA LP62S1664CU-70LLI 48B Mini BGA LLT : for -25°C ~ 85°C LLI : for -40°C ~ 85°C PRELIMINARY (February, 2002, Version 0.0) 12 AMIC Technology, Inc. LP62S1664C Series Package Information TSOP 44L (Type II) Outline Dimensions unit: inches/mm E E1 44 θ L L1 1 L A2 A1 e D b A c D ZD L1 y Dimensions in inches Dimensions in mm Symbol Min Nom Max Min Nom Max A - - 0.047 - - 1.20 A1 0.002 - 0.006 0.05 - 0.15 A2 0.037 0.039 0.041 0.95 1.00 1.05 b 0.012 - 0.018 0.30 - 0.45 c 0.005 - 0.008 0.12 - 0.21 D 0.720 0.725 0.730 18.28 18.41 18.54 ZD E 0.032 REF 0.805 REF 0.455 0.463 0.471 11.56 11.76 11.96 E1 0.395 0.400 0.405 10.03 10.16 10.29 L 0.019 0.023 0.027 0.49 0.59 0.69 L1 0.031 REF e 0.80 REF 0.031 BSC 0.80 BSC y - - 0.004 - - 0.10 θ 0° - 5° 0° - 5° Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E1 does not include resin fins. 3. Dimension ZD includes end flash. PRELIMINARY (February, 2002, Version 0.0) 13 AMIC Technology, Inc. LP62S1664C Series Package Information Mini BGA 6X8 (48 BALLS) Outline Dimensions unit : millimeter(mm) Bottom View Top View Pin A1 Index Pin A1 Index 6 5 4 3 2 1 C C1 A B C D A E F G H A B Diameter D Solder Ball B1 D E2 0.10 E1 E PRELIMINARY Symbol Min Typ Max A - 0.75 - B 5.90 6.00 6.10 B1 - 3.75 - C 7.90 8.00 8.10 C1 - 5.25 - D 0.30 0.35 0.40 E 1.00 1.10 1.20 E1 - 0.36 - E2 - 0.25 - (February, 2002, Version 0.0) 14 AMIC Technology, Inc.