±15 V/12 V Quad SPST Switches ADG1311/ADG1312/ADG1313 33 V supply range Fully specified at +12 V, ±15 V 130 Ω on resistance No VL supply required 3 V logic-compatible inputs Rail-to-rail operation 16-lead TSSOP and 16-lead SOIC Typical power consumption: <0.03 μW FUNCTIONAL BLOCK DIAGRAM S1 IN1 IN1 D1 D1 S2 S2 IN2 D2 ADG1312 APPLICATIONS ADG1313 S3 IN3 D3 D3 S4 S4 D3 S4 IN4 IN4 D4 Signal switching Battery-powered systems Communication systems Audio/video signal routing D2 D2 IN3 IN4 S2 S3 S3 IN3 D1 IN2 IN2 ADG1311 S1 S1 IN1 D4 SWITCHES SHOWN FOR A LOGIC 1 INPUT D4 05676-001 FEATURES Figure 1. GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG1311/ADG1312/ADG1313 are monolithic CMOS devices containing four independently selectable switches designed on a CMOS process. 1. 2. 3. 3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V. No VL logic power supply required. 16-lead TSSOP and SOIC packages. The ADG1311/ADG1312/ADG1313 contain four independent single-pole/single-throw (SPST) switches. The ADG1311 and ADG1312 differ only in that the digital control logic is inverted. The ADG1311 switches are turned on with Logic 0 on the appropriate control input, while Logic 1 is required for the ADG1312. The ADG1313 has two switches with digital control logic similar to the ADG1311; the logic is inverted on the other two switches. The ADG1313 exhibits break-before-make switching action for use in multiplexer applications. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. ADG1311/ADG1312/ADG1313 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................5 Applications....................................................................................... 1 ESD Caution...................................................................................5 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions..............................6 General Description ......................................................................... 1 Terminology .......................................................................................7 Product Highlights ........................................................................... 1 Typical Performance Characteristics ..............................................8 Specifications..................................................................................... 3 Test Circuits..................................................................................... 10 Dual Supply ................................................................................... 3 Outline Dimensions ....................................................................... 12 Single Supply ................................................................................. 4 Ordering Guide .......................................................................... 12 REVISION HISTORY 10/05—Revision 0: Initial Version Rev. 0 | Page 2 of 12 ADG1311/ADG1312/ADG1313 SPECIFICATIONS DUAL SUPPLY VDD = 15 V ± 10%, VSS = −15 V± 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (∆RON) 25°C 130 200 5 Y Version 1 −40°C to +105°C VDD to VSS 230 Unit Test Conditions/Comments V Ω typ Ω max Ω typ VS = ±10 V, IS = −1 mA; Figure 10 VDD = +13.5 V, VSS = −13.5 V VS = ±10 V, IS = −1 mA 10 25 65 Ω max Ω typ Ω max LEAKAGE CURRENTS Source Off Leakage, IS (Off ) ±10 nA typ VS = ±10 V, VD = ∓10 V; Figure 11 Drain Off Leakage, ID (Off ) ±10 nA typ ±10 nA typ VS = ±10V, VD = ∓10 V; Figure 11 VS = VD = ±10 V; Figure 12 On Resistance Flatness (RFLAT(ON)) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH VDD = +16.5 V, VSS = −16.5 V 2.0 0.8 0.005 ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 tON tOFF Break-Before-Make Time Delay, tD (ADG1313 Only) Charge Injection Off Isolation Channel-to-Channel Crosstalk −3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD 2.5 105 125 40 50 25 180 60 10 2 80 90 600 5 5 10 0.001 1.0 IDD 220 320 ISS 0.001 1.0 ISS 0.001 1.0 1 2 VS = −5 V/0 V/+5 V; IS = −1 mA Temperature range for Y Version is −40°C to +105°C. Guaranteed by design, not subject to production test. Rev. 0 | Page 3 of 12 V min V max μA typ μA max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ pF typ μA typ μA max μA typ μA max μA typ μA max μA typ μA max VIN = VINL or VINH RL = 300 Ω, CL = 35 pF VS = +10 V; Figure 13 RL = 300 Ω, CL = 35 pF VS = +10 V; Figure 13 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 10 V; Figure 14 VS = 0 V, RS = 0 Ω, CL = 1 nF; Figure 15 RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 16 RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 17 RL = 50 Ω, CL = 5 pF; Figure 18 VDD = +16.5 V, VSS = −16.5 V Digital inputs = 0 V or VDD Digital inputs = 5 V Digital inputs = 0 V or VDD Digital inputs = 5 V ADG1311/ADG1312/ADG1313 SINGLE SUPPLY VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (∆RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C 325 500 10 Y Version 1 −40°C to +105°C 0 V to VDD 520 tOFF Break-Before-Make Time Delay, tD (ADG1313 Only) Charge Injection Off Isolation Channel-to-Channel Crosstalk −3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD 2 VS = 0 V − 10 V, IS = −1 mA; Figure 10 VDD = 10.8 V, VSS = 0 V VS = 0 V − 10 V, IS = −1 mA ±10 ±10 ±10 nA typ nA typ nA typ 2.0 0.8 0.001 3 120 155 45 65 50 210 80 10 2 80 90 500 5 5 10 0.001 220 320 1 V Ω typ Ω max Ω typ Ω max Ω typ 1.0 IDD Test Conditions/Comments 15 65 ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 tON Unit Temperature range for Y Version is −40°C to +105°C. Guaranteed by design, not subject to production test. Rev. 0 | Page 4 of 12 V min V max μA typ μA max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ pF typ μA typ μA max μA typ μA max VS = +3 V/+6 V/+9 V, IS = −1 mA VDD = 13.2 V, VSS = 0 V VS = +1 V/+10 V, VD = +10 V/+1 V; Figure 11 VS = +1 V/+10 V, VD = +10 V/+1 V Figure 11 VS = VD = +1 V or +10 V; Figure 12 VIN = VINL or VINH RL = 300 Ω, CL = 35 pF VS = 8 V; Figure 13 RL = 300 Ω, CL = 35 pF VS = 8 V; Figure 13 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 8 V; Figure 14 VS = 6 V, RS = 0 Ω, CL = 1 nF; Figure 15 RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 16 RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 17 RL = 50 Ω, CL = 5 pF; Figure 18 VDD = 13.2 V Digital inputs = 0 V or VDD Digital inputs = 5 V ADG1311/ADG1312/ADG1313 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 3. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs 1 Digital Inputs1 Peak Current, S or D Continuous Current per Channel, S or D Operating Temperature Range Automotive Storage Temperature Range Junction Temperature 16-Lead TSSOP, θJA Thermal Impedance (4-layer board) 16-Lead SOIC, θJA Thermal Impedance Reflow Soldering Peak Temperature, Pb free 1 Rating 35 V −0.3 V to +25 V +0.3 V to −25 V VSS − 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first GND − 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first 100 mA (pulsed at 1 ms, 10% duty cycle max) 25 mA Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4. ADG1311/ADG1312 Truth Table ADG1311 INx 0 1 ADG1312 INx 1 0 Switch Condition On Off Table 5. ADG1313 Truth Table ADG1313 INx 0 1 −40°C to +105°C −65°C to +150°C 150°C 112°C/W Switch 1, 4 Off On 77°C/W 260°C Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 5 of 12 Switch 2, 3 On Off ADG1311/ADG1312/ADG1313 IN1 1 16 IN2 D1 2 15 D2 S1 3 14 S2 VSS 4 GND 5 S4 ADG1311/ ADG1312/ ADG1313 13 VDD 12 NC 6 11 S3 D4 7 10 D3 IN4 8 9 IN3 TOP VIEW NC = NO CONNECT 05676-002 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 2. SOIC/TSSOP Pin Configuration Table 6. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Mnemonic IN1 D1 S1 VSS GND S4 D4 IN4 IN3 D3 S3 NC VDD S2 D2 IN2 Description Logic Control Input. Drain Terminal. Can be an input or output. Source Terminal. Can be an input or output. Most Negative Power Supply Potential. Ground (0 V) Reference. Source Terminal. Can be an input or output. Drain Terminal. Can be an input or output. Logic Control Input. Logic Control Input. Drain Terminal. Can be an input or output. Source Terminal. Can be an input or output. No Connection. Most Positive Power Supply Potential. Source Terminal. Can be an input or output. Drain Terminal. Can be an input or output. Logic Control Input. Rev. 0 | Page 6 of 12 ADG1311/ADG1312/ADG1313 TERMINOLOGY IDD The positive supply current. CD, CS (On) The on switch capacitance, measured with reference to ground. ISS The negative supply current. CIN The digital input capacitance. VD (VS) The analog voltage on Terminal D and Terminal S. tON The delay between applying the digital control input and the output switching on. See Figure 13. RON The ohmic resistance between D and S. RFLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance, as measured over the specified analog signal range. IS (Off) The source leakage current with the switch off. tOFF The delay between applying the digital control input and the output switching off. See Figure 13. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. Off Isolation A measure of unwanted signal coupling through an off switch. ID (Off) The drain leakage current with the switch off. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. ID, IS (On) The channel leakage current with the switch on. Bandwidth The frequency at which the output is attenuated by 3 dB. VINL The maximum input voltage for Logic 0. On Response The frequency response of the on switch. VINH The minimum input voltage for Logic 1. Insertion Loss The loss due to the on resistance of the switch. IINL (IINH) The input current of the digital input. CS (Off) The off switch source capacitance, measured with reference to ground. CD (Off) The off switch drain capacitance, measured with reference to ground. Rev. 0 | Page 7 of 12 ADG1311/ADG1312/ADG1313 TYPICAL PERFORMANCE CHARACTERISTICS 200 600 TA = 25°C 180 VDD = 12V VSS = 0V 500 TA = +85°C VDD = +15V VSS = –15V 140 ON RESISTANCE (Ω) ON RESISTANCE (Ω) 160 120 100 80 60 400 300 200 TA = –40°C 40 TA = +25°C 20 0 –15 –12 –9 –6 –3 0 3 6 9 SOURCE OR DRAIN VOLTAGE (V) 12 0 0 15 Figure 3. On Resistance as a Function of VD (VS) for Dual Supply 4 6 8 SOURCE OR DRAIN VOLTAGE (V) 10 12 200 TA = 25°C 400 180 350 160 12V SS TON 140 300 TIME (ns) VDD = 12V VSS = 0V 250 200 150 120 15V DS TON 100 80 12V SS TOFF 60 100 0 0 2 4 6 8 SOURCE OR DRAIN VOLTAGE (V) 10 15V DS TOFF 05676-016 05676-005 40 50 20 0 –40 12 Figure 4. On Resistance as a Function of VD (VS) for Single Supply –20 0 20 40 60 TEMPERATURE (°C) 80 100 120 Figure 7. TON/TOFF Times vs. Temperature 0 250 VDD = +15V VSS = –15V –10 –20 OFF ISOLATION (dB) 200 150 TA = +85°C 100 TA = –40°C TA = +25°C VDD = +15V VSS = –15V TA = 25°C –30 –40 –50 –60 –70 –80 50 –10 –5 0 5 SOURCE OR DRAIN VOLTAGE (V) 10 15 05676-017 0 –15 –90 05676-006 ON RESISTANCE (Ω) 2 Figure 6. On Resistance as a Function of VD (VS) for Different Temperatures, Single Supply 450 ON RESISTANCE (Ω) 05676-007 05676-008 100 –100 –110 10k 100k 1M 10M FREQUENCY (Hz) Figure 8. Off Isolation vs. Frequency Figure 5. On Resistance as a Function of VD (VS) for Different Temperatures, Dual Supply Rev. 0 | Page 8 of 12 100M 1G ADG1311/ADG1312/ADG1313 0 –10 –20 VDD = +15V VSS = –15V TA = 25°C –40 –50 –60 –70 –80 –90 –100 05676-018 CROSSTALK (dB) –30 –110 –120 10k 100k 1M FREQUENCY (Hz) 10M 100M Figure 9. Crosstalk vs. Frequency Rev. 0 | Page 9 of 12 ADG1311/ADG1312/ADG1313 TEST CIRCUITS IDS V1 VD D A VD NC = NO CONNECT Figure 11. Test Circuit 2—Off Leakage VDD S NC A VS Figure 10. Test Circuit 1—On Resistance Figure 12. Test Circuit 3 —On Leakage VSS 0.1μF VDD VSS S VIN ADG1312 50% 50% VIN ADG1311 50% 50% VOUT D CL 35pF RL 300Ω IN 90% VOUT 90% GND tOFF tON 05676-023 0.1μF VS D 05676-021 RON = V1/IDS VS ID (ON) ID (OFF) S A Figure 13. Test Circuit 4—Switching Times VDD VSS VSS S1 D1 S2 D2 CL 35pF RL 300Ω IN1, IN2 RL 300Ω VOUT2 CL 35pF VOUT1 VOUT1 50% 90% 90% 0V 90% VOUT2 90% 0V ADG1313 tD GND tD Figure 14. Test Circuit 5—Break-Before-Make Time Delay RS VS VDD VSS VDD VSS S D VIN CL 1nF IN GND ADG1312 ON VOUT VIN OFF ADG1311 VOUT QINJ = CL × ΔVOUT Figure 15. Test Circuit 6—Charge Injection Rev. 0 | Page 10 of 12 ΔVOUT 05676-025 VS2 50% 0V 05676-024 VDD VS1 VIN 0.1μF 0.1μF 05676-022 IS (OFF) D 05676-020 S ADG1311/ADG1312/ADG1313 VSS VDD 0.1μF VDD NETWORK ANALYZER VSS S S D RL 50Ω GND VOUT 50Ω VS VIN RL 50Ω 05676-026 GND OFF ISOLATION = 20 log VOUT VS Figure 16. Test Circuit 7—Off Isolation RL 50Ω NETWORK ANALYZER D VIN VOUT VSS IN VS NETWORK ANALYZER 0.1μF VDD 50Ω 50Ω IN VSS 0.1μF VDD 0.1μF VSS VDD VSS VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 18. Test Circuit 9—Bandwidth 0.1μF S1 D2 S2 R 50Ω VS VOUT VS 05676-027 GND CHANNEL-TO-CHANNEL CROSSTALK = 20 log INSERTION LOSS = 20 log Figure 17. Test Circuit 8—Channel-to-Channel Crosstalk Rev. 0 | Page 11 of 12 VOUT 05676-028 VDD 0.1μF ADG1311/ADG1312/ADG1313 OUTLINE DIMENSIONS 5.10 5.00 4.90 10.00 (0.3937) 9.80 (0.3858) 16 9 4.50 4.40 4.30 4.00 (0.1575) 3.80 (0.1496) 6.40 BSC 1 8 0.20 0.09 0.30 0.19 COPLANARITY 0.10 8 6.20 (0.2441) 5.80 (0.2283) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) × 45° 0.25 (0.0098) 0.25 (0.0098) 0.10 (0.0039) 1.20 MAX 0.65 BSC 9 1 1.27 (0.0500) BSC PIN 1 0.15 0.05 16 SEATING PLANE COPLANARITY 0.10 0.75 0.60 0.45 8° 0° 8° 0.51 (0.0201) SEATING 0.25 (0.0098) 0° 1.27 (0.0500) PLANE 0.31 (0.0122) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AC CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 20. 16-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-16) Dimensions shown in millimeters and (inches) Figure 19. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters ORDERING GUIDE Model ADG1311YRUZ 1 ADG1311YRUZ-REEL71 ADG1311YRZ1 ADG1311YRZ-REEL71 ADG1312YRUZ1 ADG1312YRUZ-REEL71 ADG1312YRZ1 ADG1312YRZ-REEL71 ADG1313YRUZ1 ADG1313YRUZ-REEL71 ADG1313YRZ1 ADG1313YRZ-REEL71 1 Temperature Range −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C Package Description 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Narrow Body Small Outline Package [SOIC_N] Z = Pb-free part. © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05676-0-10/05(0) Rev. 0 | Page 12 of 12 Package Option RU-16 RU-16 R-16 R-16 RU-16 RU-16 R-16 R-16 RU-16 RU-16 R-16 R-16