ETC ADM9690ARN

a
Power Supply and Watchdog Timer
Monitoring Circuit
ADM9690
FEATURES
Precision Voltage Monitor (4.40 V)
Watchdog Timeout Monitor
Selectable Watchdog Timeout—0.75 ms, 1.5 ms,
12.5 ms, 25 ms
Two RESET Outputs
APPLICATIONS
Microprocessor Systems
Computers
Printers
Controllers
Intelligent Instruments
FUNCTIONAL BLOCK DIAGRAM
VCC
VMON
ADM9690
4.40V
OSC SEL1
OSC SEL2
WATCHDOG
INPUT (WDI)
WATCHDOG
TIMEBASE
RESET(1)
TIMER
RESET(1)
RESET(2)
TIMER
RESET(2)
WATCHDOG
TRANSITION
DETECTOR
GND
GENERAL DESCRIPTION
The ADM9690 contains a voltage monitoring comparator and a
watchdog timer monitor. It is designed to monitor the 5 V
power supply to a microprocessor and the microprocessor operation via a watchdog function.
The voltage monitoring comparator monitors the voltage on
VMON. If it drops outside tolerance, as will happen during a
power-fail, two reset signals are generated. Both reset signals go
active (low) simultaneously. They will remain active while
VMON is below the threshold, and for 50 ms (RESET(1)) or
60 ms (RESET(2)) after VMON climbs above the reset threshold. RESET(1) is intended to provide a power-on reset signal
for the µP while RESET(2) is used to hold additional circuitry
in a reset state until the µP has regained control following a
power-up.
The watchdog timer monitoring circuit is designed to monitor
the activity on the WDI input. This input is normally connected
to an output line on the µP. Its function is to check that the
microprocessor has not stalled in an infinite loop. If there is a
period of inactivity for the watchdog timeout period, both reset
outputs are activated. As above, RESET(1) remains low for
50 ms while RESET(2) remains low for an additional 10 ms.
The watchdog timer is restarted when RESET(1) goes inactive.
The actual watchdog timeout period is adjustable using two
select inputs SEL1 and SEL2.
The ADM9690 is available in an 8-lead SOIC package. It is
specified over the industrial temperature range.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997
ADM9690–SPECIFICATIONS (V
CC
Parameter
Min
VCC OPERATING VOLTAGE RANGE
4.3
SUPPLY CURRENT
RESET AND WATCHDOG TIMER
Reset Voltage Threshold
Reset Threshold Hysteresis
Reset Timeout Delay (t1)
RESET(2) Timeout Delay (t2)
4.2
WATCHDOG TIMEOUT PERIOD (TWD)
0.4
1.0
9.0
18
WDI INPUT PULSE WIDTH
RESET(1)/(2) Output Voltage
100
= Full Operating Range. TA = TMIN to TMAX unless otherwise noted)
Typ
Max
Units
5.5
V
55
100
µA
4.4
30
50
10
4.55
75
15
V
mV
ms
ms
Figure 7, 8
Figure 7, 8
0.75
1.5
12.5
25
1.28
2.4
19
38
ms
ms
ms
ms
SEL2 = 0, SEL1 = 0
SEL2 = 0, SEL1 = 1
SEL2 = 1, SEL1 = 0
SEL2 = 1, SEL1 = 1
0.1
0.3
0.45
0.4
0.4
0.7
ns
V
V
V
V
VIL = 0.4, VIH = 3.5 V
ISINK = 3.2 mA
ISINK = 10 mA,
ISINK = 15 mA,
ISOURCE = 1 µA
V
V
µA
µA
µA
µA
150 ns Pulse
150 ns Pulse
WDI = VCC
WDI = 0 V
SEL = VCC
SEL = 0 V
3.5
WDI INPUT THRESHOLD
Logic Low
Logic High
WDI Input Current
SEL1/2 Input Current
0.8
3.5
–5
–1
–10
1.2
–1.2
-5
5
+1
10
Test Conditions/Comments
Specifications subject to change without notice.
–2–
REV. 0
ADM9690
ABSOLUTE MAXIMUM RATINGS*
PIN FUNCTION DESCRIPTIONS
(TA = +25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
VMON . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VCC + 0.3 V
Input Current
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA
GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA
Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . 200 mA
Power Dissipation, R-8 SOIC . . . . . . . . . . . . . . . . . . 400 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 120°C/W
Industrial (A Version) . . . . . . . . . . . . . . . . . . –40°C to +85°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300°C
Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 kV
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum ratings for
extended periods of time may affect device reliability.
Mnemonic
Function
VCC
VMON
GND
RESET(1)
Power Supply Input; +5 V.
Voltage Monitoring Input.
0 V. Ground reference for all signals.
Logic Output. RESET(1) goes low if VMON
falls below the Reset Threshold or the Watchdog timer is not serviced within its timeout
period. The reset threshold is typically 4.4 V
for the ADM9690. RESET(1) remains low
for 50 ms after VCC returns above the threshold. RESET(1) also goes low for 50 ms if the
Watchdog Timer is not serviced within its
timeout period.
Logic Output. RESET(2) goes low simultaneously with RESET(1) but remains low for
an additional 10 ms.
Watchdog Input. If an edge is not detected on
WDI within the selectable watchdog timeout
period, RESET(1) and RESET(2) are forced
low for their respective timeout periods. The
watchdog timer restarts with each positive
or negative going transition on the WDI
line. Following a reset it is restarted when
RESET(1) goes inactive (high). The Watchdog Timer may be disabled if WDI is left
floating or is driven to midsupply.
Watchdog Timeout selection inputs. Refer to
Table I.
RESET(2)
WDI
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Option
ADM9690AR
–40°C to +85°C
8-Lead Narrow
Body SOIC
R-8
SEL 1, 2
PIN CONFIGURATION
VMON 1
GND 2
8 VCC
ADM9690
7 RESET(1)
TOP VIEW
SEL1 3 (Not to Scale) 6 RESET(2)
SEL2 4
REV. 0
5 WDI
–3–
WATCHDOG AND RESET TIMEOUT PERIOD – ms
ADM9690 –Typical Performance Curves
VCC
RESET
CH1
1.0V
CH2
1.0V
M 500ms
CH1
380mV
RESET2/TIMEOUT
RESET1/TIMEOUT
WATCHDOG TIMEOUT
PERIOD
10
2.5
72.0
4.410
71.6
BATTERY SUPPLY CURRENT – A
4.412
4.408
4.406
4.404
4.402
4.400
3.5
4.0
4.5
5.0
VCC – Volts
5.5
6.0
6.5
71.2
70.8
70.4
70.0
69.6
69.2
4.398
4.396
–60
3.0
Figure 3. Watchdog and Reset Timeout Period vs. Supply
@ –40°C
Figure 1. Reset Output Voltage vs. Supply
RESET VOLTAGE THRESHOLD – Volts
100
–30
0
30
60
TEMPERATURE – C
90
68.8
–60
120
–30
0
30
60
TEMPERATURE – C
90
120
Figure 4. Supply Current vs. Temperature
Figure 2. Reset Voltage Threshold vs. Temperature
+5V
VCC
VMON
AUXILIARY
CIRCUITRY
4.40V
RESET
RESET(2)
TIMER
OSC SEL1
OSC SEL2
WATCHDOG
TIMEBASE
RESET(1)
TIMER
WATCHDOG
TRANSITION
DETECTOR
ADM9690
RESET(2)
RESET(1)
RESET
WATCHDOG
INPUT (WDI)
P
I/O LINE
GND
Figure 5. Typical Application Circuit
–4–
REV. 0
ADM9690
provide a power-on reset signal for the µP while RESET(2) is
used to hold additional circuitry in a reset state until the µP has
regained control following a power-up.
POWER SUPPLY AND WATCHDOG MONITORING
CIRCUIT
The ADM9690 contains a power supply voltage monitoring
comparator and a watchdog timer monitor. Either VMON dropping outside tolerance or the watchdog timer timing out results
in a reset sequence as discussed below. Two reset outputs are
provided. RESET(1) and RESET(2).
The guaranteed minimum and maximum thresholds for the
ADM9690 are 4.3 V and 4.5 V.
Watchdog Timer RESET
The watchdog timer circuit monitors the activity of the microprocessor in order to check that it is not stalled in an infinite
loop. An output line on the processor may be used to toggle the
Watchdog Input (WDI) line. If this line is not toggled within the
selected timeout period, both RESET outputs are taken active
(low). RESET(1) remains low for 50 ms and RESET(2)
remains low for an additional 10 ms . Each transition (either
positive-going or negative-going) of WDI after RESET(1) has
gone inactive restarts the watchdog timer. The actual watchdog
timeout period is adjustable using SEL1 and SEL2. Four timeout
periods are selectable. Please refer to Table I.
POWER FAIL/POWER-ON RESET
When VMON falls below the reset threshold (4.4 V) both RESET
outputs are forced low immediately.
On power-up, RESET(1) will remain low for 50 milliseconds
after VMON rises above the reset threshold. This provides a
power-on reset for the microprocessor. RESET(2) remains
active low for an additional 10 ms. RESET(1) is intended to
VCC
ADM9690
VMON
The watchdog timer is restarted at the end of RESET(1)
(RESET(1) going high), whether the reset was caused by lack of
activity on WDI or by VMON falling below the reset threshold.
4.40V
OSC SEL1
OSC SEL2
WATCHDOG
INPUT (WDI)
WATCHDOG
TIMEBASE
RESET(1)
TIMER
RESET(1)
RESET(2)
TIMER
RESET(2)
Table I.
WATCHDOG
TRANSITION
DETECTOR
GND
Figure 6. Functional Block Diagram
SEL2
SEL1
Watchdog Timeout
Period tWD (ms)
0
0
1
1
0
1
0
1
0.75
1.5
12.5
25
WDI
VMON
t WD
t1
t1
RESET(1)
RESET(1)
t2
t2
RESET(2)
RESET(2)
Figure 7. Power-On RESET Timing
REV. 0
Figure 8. Watchdog RESET Timing
–5–
ADM9690
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
C3135–2–8/97
8-Lead Narrow Body SOIC
(R-8)
0.1968 (5.00)
0.1890 (4.80)
0.2440 (6.20)
0.2284 (5.80)
8
5
1
4
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.102 (2.59)
0.094 (2.39)
0.0098 (0.25)
0.0040 (0.10)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
PRINTED IN U.S.A.
0.0500 0.0192 (0.49)
SEATING (1.27) 0.0138 (0.35) 0.0098 (0.25)
PLANE BSC
0.0075 (0.19)
0.0196 (0.50)
x 45°
0.0099 (0.25)
–6–
REV. 0