High Accuracy Ultralow IQ, 300 mA, anyCAP Low Dropout Regulator ADP3333 FEATURES FUNCTIONAL BLOCK DIAGRAM Q1 IN OUT ADP3333 THERMAL PROTECTION R1 CC DRIVER gm R2 SD BAND GAP REF 02615-001 High accuracy over line and load: ±0.8% @ 25°C, ±1.8% over temperature Ultralow dropout voltage: 230 mV (maximum) @ 300 mA Requires only COUT = 1.0 µF for stability anyCAP is stable with any type of capacitor (including MLCC) Current and thermal limiting Low noise Low shutdown current: < 1 µA 2.6 V to 12 V supply range −40°C to +85°C ambient temperature range Ultrasmall 8-lead MSOP package GND Figure 1. APPLICATIONS Cellular phones PCMCIA cards Personal digital assistants (PDAs) DSP/ASIC supplies GENERAL DESCRIPTION ADP3333 NC 4 VIN 2 IN CIN 1µF VOUT OUT 1 + SD GND 7 3 + COUT 1µF ON OFF NC = NO CONNECT 02615-002 The ADP3333 is a member of the ADP333x family of precision low dropout (LDO) anyCAP® voltage regulators. Pin compatible with the MAX8860, the ADP3333 operates with a wider input voltage range of 2.6 V to 12 V and delivers a load current up to 300 mA. ADP3333 stands out from other conventional LDOs with a novel architecture and an enhanced process that enables it to offer performance advantages over its competition. Its patented design requires only a 1.0 μF output capacitor for stability. This device is insensitive to output capacitor equivalent series resistance (ESR) and is stable with any good quality capacitor, including ceramic (MLCC) types for space-restricted applications. The ADP3333 achieves exceptional accuracy of ±0.8% at room temperature and ±1.8% over temperature, line, and load variations. The dropout voltage of the ADP3333 is only 140 mV (typical) at 300 mA. This device also includes a safety current limit, thermal overload protection, and a shutdown feature. In shutdown mode, the ground current is reduced to less than 1 μA. The ADP3333 has ultralow quiescent current, 70 μA (typical) in light load situations. Figure 2. Typical Application Circuit Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. www.analog.com Tel: 781.329.4700 Fax: 781.461.3113 ©2001–2009 Analog Devices, Inc. All rights reserved. ADP3333 TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation .........................................................................9 Applications ....................................................................................... 1 Applications Information .............................................................. 10 Functional Block Diagram .............................................................. 1 Capacitor Selection .................................................................... 10 General Description ......................................................................... 1 Output Current Limit ................................................................ 10 Revision History ............................................................................... 2 Thermal Overload Protection .................................................. 10 Specifications..................................................................................... 3 Calculating Junction Temperature ........................................... 10 Absolute Maximum Ratings ............................................................ 4 Shutdown Mode ......................................................................... 10 Thermal Resistance ...................................................................... 4 PCB Layout Considerations ...................................................... 10 ESD Caution .................................................................................. 4 Outline Dimensions ....................................................................... 11 Pin Configuration and Function Descriptions ............................. 5 Ordering Guide .......................................................................... 11 Typical Performance Characteristics ............................................. 6 REVISION HISTORY 4/09—Rev. A to Rev. B Changes to Voltage Accuracy, Line Regulation, Load Regulation, and Dropout Voltage Parameters, Table 1 ................ 3 Changes to Table 2 ............................................................................ 4 Added Thermal Resistance Section and Table 3; Renumbered Sequentially ....................................................................................... 4 Changes to Table 4 ............................................................................ 5 Changes to Figure 5 and Figure 7 ................................................... 6 Changes to Figure 10, Figure 11, Figure 13, and Figure 15 ......... 7 Changes to Figure 16 and Figure 17............................................... 8 Changes to Output Capacitor Section and Calculating Junction Temperature Section ...................................................................... 10 Updated Outline Dimensions ....................................................... 11 Changes to Ordering Guide .......................................................... 11 8/03—Data Sheet Changed from Rev. 0 to Rev. A Changes to Figure 1 ...........................................................................1 Updated Output Capacitor Section.............................................. 10 Updated Calculating Junction Temperature Section ................. 10 Updated Outline Dimensions ....................................................... 11 Updated Ordering Guide .............................................................. 11 Rev. B | Page 2 of 12 ADP3333 SPECIFICATIONS VIN = 6.0 V, CIN = COUT = 1.0 µF, TJ = −40°C to +125°C, unless otherwise noted. Table 1. Parameter 1 OUTPUT Voltage Accuracy2 Line Regulation2 Load Regulation Dropout Voltage Peak Load Current Output Noise GROUND CURRENT In Regulation 2 Condition Min VOUT VIN = VOUTNOM + 0.3 V to 12 V, IL = 0.1 mA to 300 mA, TJ = 25°C VIN = VOUTNOM + 0.3 V to 12 V, IL = 0.1 mA to 300 mA VIN = VOUTNOM + 0.3 V to 12 V, TJ = 25°C IL = 0.1 mA to 300 mA, TJ = 25°C VOUT = 98% of VOUTNOM IL = 300 mA IL = 200 mA IL = 0.1 mA VIN = VOUTNOM + 1 V f = 10 Hz to 100 kHz, CL = 10 μF, IL = 300 mA −0.8 −1.8 ΔVIN/ΔVOUT ΔVOUT/ΔIOUT VDROPOUT ILDPK VNOISE IGND In Dropout IGND In Shutdown IGNDSD SHUTDOWN Threshold Voltage 1 Symbol VTHSD SD Input Current ISD Output Current in Shutdown IOSD Application stable with no load. VIN = 2.6 V for models with VOUTNOM ≤ 2.3 V. Rev. B | Page 3 of 12 Max Unit +0.8 +1.8 % % mV/V mV/mA 140 105 30 600 45 230 185 mV mV mV mA μV rms 2.0 2.0 1.5 1.4 200 70 70 70 0.01 5.5 4.3 3.3 275 100 190 160 1 mA mA mA mA μA μA μA μA μA 0.85 0.8 0.01 0.01 0.4 7 4.5 1 1 V V μA μA μA μA 0.04 0.04 IL = 300 mA IL = 300 mA, TJ = 25°C IL = 300 mA, TJ = 85°C IL = 200 mA IL = 10 mA IL = 0.1 mA VIN = VOUTNOM − 100 mV, IL = 0.1 mA VIN = VOUTNOM − 100 mV, IL = 0.1 mA, TJ = 0°C to 125°C SD = 0 V, VIN = 12 V Regulator on Regulator off 0 ≤ SD ≤ 12 V 0 ≤ SD ≤ 5 V TJ = 25°C, VIN = 12 V TJ = 125°C, VIN = 12 V Typ 2.0 ADP3333 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Input Supply Voltage Shutdown Input Voltage Power Dissipation Operating Ambient Temperature Range Operating Junction Temperature Range Soldering Conditions Rating −0.3 V to +16 V −0.3 V to +16 V Internally Limited −40°C to +85°C −40°C to +125°C JEDEC J-STD-020 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance Package Type 8-Lead MSOP (4-Layer) 8-Lead MSOP (2-Layer) ESD CAUTION Rev. B | Page 4 of 12 θJA 158 220 Unit °C/W °C/W ADP3333 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUT 1 IN 2 GND 3 ADP3333 TOP VIEW (Not to Scale) NC1 4 8 NC 7 SD 6 NC 5 NC BE CONNECTED TO ANY OTHER PIN. 02615-003 NC = NO CONNECT 1CAN Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 3 4 to 6, 8 7 Mnemonic OUT IN GND NC SD Description Output of the Regulator. Bypass to ground with a 1.0 μF or larger capacitor. Input Pin. Bypass to ground with a 1.0 μF or larger capacitor. Ground Pin. No Connect. Best thermal performance is achieved when the NC pins are connected to the GND plane. Active Low Shutdown Pin. Connect to ground to disable the regulator output. When shutdown is not used, connect this pin to the IN pin. Rev. B | Page 5 of 12 ADP3333 TYPICAL PERFORMANCE CHARACTERISTICS 2.502 2.5 VOUT = 2.5V 0mA VIN = 6V 2.500 GROUND CURRENT (mA) 100mA 2.496 2.494 200mA 2.492 300mA 02615-004 2.488 4 5 1.0 0.5 2.490 3 1.5 6 7 8 9 10 11 02615-007 OUTPUT VOLTAGE (V) 2.0 2.498 0 12 0 50 100 INPUT VOLTAGE (V) 150 200 Figure 4. Line Regulation Output Voltage vs. Input Voltage 300 Figure 7. Ground Current vs. Output Current 2.502 1.0 VIN = 6V VOUT = 2.5V 0.9 2.500 0mA 0.8 0.7 2.498 OUTPUT CHANGE (%) OUTPUT VOLTAGE (V) 250 OUTPUT CURRENT (mA) 2.496 2.494 2.492 200mA 0.6 0.5 0.4 0.3 0.2 300mA 0.1 0 –0.1 2.488 0 50 100 150 200 250 –0.3 –0.4 –50 300 0mA –25 OUTPUT CURRENT (mA) 50 75 100 125 3.5 VOUT = 2.5V VIN = 6V 120 GROUND CURRENT (mA) 3.0 100 80 IL = 0µA 40 20 0 2 4 6 8 10 IL = 300mA 2.5 IL = 200mA 2.0 IL = 100mA 1.5 1.0 0.5 02615-009 60 02615-006 GROUND CURRENT (µA) 25 Figure 8. Output Voltage Variation % vs. Junction Temperature 140 0 0 JUNCTION TEMPERATURE (°C) Figure 5. Output Voltage vs. Output Current IL = 100µA 02615-008 –0.2 02615-005 2.490 IL = 0mA 0 –50 12 INPUT VOLTAGE (V) –25 0 25 50 75 100 JUNCTION TEMPERATURE (°C) Figure 6. Ground Current vs. Input Voltage Figure 9. Ground Current vs. Junction Temperature Rev. B | Page 6 of 12 125 ADP3333 0.16 VOUT = 2.5V RL = 8.3Ω CL = 1µF VOUT (V) 2.52 0.12 0.10 0.08 2.51 2.50 2.49 0.06 0 02615-010 0.02 0 50 100 150 200 250 3.50 3.00 300 02615-013 0.04 VIN (V) INPUT/OUTPUT VOLTAGE (mV) 0.14 40 80 140 OUTPUT CURRENT (mA) Figure 10. Dropout Voltage vs. Output Current VOUT (V) 2.5 2.0 VOUT = 2.5V RL = 8.3Ω CL = 10µF 2.52 VIN 2.51 2.50 2.49 1.5 1.0 VOUT 02615-011 0 1 2 3 3.50 3.00 02615-014 0.5 VIN (V) INPUT/OUTPUT VOLTAGE (V) Figure 13. Line Transient Response, CL = 1 µF VOUT = 2.5V SD = VIN RL = 8.3Ω 3.0 40 4 80 140 180 TIME (µs) TIME (Seconds) Figure 11. VOUT During Power-Up/Power-Down Figure 14. Line Transient Response, CL = 10 µF VIN = 4V VOUT = 2.5V CL = 1µF COUT = 1µF 2.7 VOUT (V) 3 VOUT (V) 180 TIME (µs) 2 2.6 2.5 1 COUT = 10µF 2.4 IOUT (mA) 4 2 200 400 600 300 10 02615-015 VOUT = 2.5V SD = VIN RL = 8.3Ω 0 02615-012 VIN (V) 0 200 800 400 600 800 TIME (µs) TIME (µs) Figure 12. Power-Up Response Figure 15. Load Transient Response, CL = 1 µF Rev. B | Page 7 of 12 ADP3333 –20 VOUT = 2.2V –30 2.6 2.5 IOUT (mA) 2.4 300 CL = 10µF IL = 500mA CL = 1µF IL = 500mA –40 CL = 1µF IL = 50µA –50 –60 –70 CL = 10µF IL = 50µA –80 02615-016 10 200 400 600 –90 10 800 100 1k 10k 100k 1M 02615-019 RIPPLE REJECTION (dB) VOUT (V) 2.7 VIN = 4V VOUT = 2.5V CL = 10µF 10M FREQUENCY (Hz) TIME (µs) Figure 19. Power Supply Ripple Rejection Figure 16. Load Transient Response, CL = 10 µF 120 2.5 RMS NOISE (µV) 0 3 VIN = 6V 60 300mA 40 0mA 1 20 0 02615-017 IOUT (A) 2 80 VIN = 3.6V 200 400 600 02615-020 VOUT (V) 100 0 0 800 10 20 30 40 50 CL (µF) TIME (µs) Figure 20. RMS Noise vs. CL (10 Hz to 100 kHz) Figure 17. Short-Circuit Current 100 VOUT = 2.5V IL = 1mA 10µF 2 1 10µF 0 1µF VSD 2 VIN = 6V VOUT = 2.5V RL = 8.3Ω 02615-018 0 200 400 600 10 CL = 10µF 0.1 0.01 0.001 10 800 CL = 1µF 1 02615-021 VOLTAGE NOISE SPECTRAL DENSITY (µV/ Hz) VOUT 3 1µF 100 1k 10k FREQUENCY (Hz) TIME (µs) Figure 21. Output Noise Density Figure 18. Turn-On/Turn-Off Response Rev. B | Page 8 of 12 100k 1M ADP3333 THEORY OF OPERATION temperature stable output. This unique arrangement specifically corrects for the loading of the divider so that the error resulting from base current loading in conventional circuits is avoided. The ADP3333 anyCAP LDO uses a single control loop for regulation and reference functions (see Figure 22). The output voltage is sensed by a resistive voltage divider consisting of R1 and R2 that is varied to provide the available output voltage option. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier. The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type, and ESR of the load capacitance. OUTPUT ATTENUATION (VBAND GAP /VOUT) Q1 COMPENSATION CAPACITOR NONINVERTING WIDEBAND DRIVER gm R3 PTAT VOS CL D1 FB R4 R1 (a) PTAT CURRENT ADP3333 RL R2 02615-022 INPUT GND Figure 22. Functional Block Diagram A very high gain error amplifier is used to control this loop. The amplifier is constructed in such a way that at equilibrium it produces a large, temperature-proportional input offset voltage that is repeatable and very well controlled. The temperature proportional offset voltage is combined with the complementary diode voltage to form a virtual band gap voltage, implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibility on the trade-off of noise sources and leads to a low noise design. The R1, R2 divider is chosen in the same ratio as the band gap voltage to the output voltage. Although the R1/R2 resistor divider is loaded by the diode, D1, and a second divider consisting of R3 and R4, the values can be chosen to produce a Most LDOs place very strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value required to keep conventional LDOs stable changes depending on load and temperature. These ESR limitations make designing with LDOs more difficult because of their unclear specifications and extreme variations over temperature. With the ADP3333 anyCAP LDO, this is no longer true. This device can be used with virtually any good quality capacitor, with no constraint on the minimum ESR. Its innovative design allows the circuit to be stable with just a small 1.0 μF capacitor on the output. Additional advantages of the pole splitting scheme include superior line noise rejection and very high regulator gain, which leads to excellent line and load regulation. An impressive ±1.8% accuracy is guaranteed over line, load, and temperature. Additional features of the circuit include current limit and thermal shutdown. Rev. B | Page 9 of 12 ADP3333 APPLICATIONS INFORMATION CAPACITOR SELECTION CALCULATING JUNCTION TEMPERATURE Output Capacitor Device power dissipation is calculated as follows: The stability and transient response of the LDO is a function of the output capacitor. The ADP3333 is stable with a wide range of capacitor values, types, and ESR (anyCAP). A capacitor as low as 1.0 μF is all that is needed for stability. Larger capacitors can be used if high current surges on the output are anticipated. The ADP3333 is stable with extremely low ESR capacitors (ESR ≈ 0), such as multilayer ceramic capacitors (MLCC) or OSCON. Note that the effective capacitance of some capacitor types falls below the minimum rated value over temperature or with dc voltage. Ensure that the capacitor provides at least 1.0 μF of capacitance over temperature and dc bias. PD = (VIN − VOUT) IL + (VIN) IGND where IL and IGND are the load current and ground current, and VIN and VOUT are the input and output voltages, respectively. Assuming the worst-case operating conditions are IL = 300 mA, IGND = 2.0 mA, VIN = 4.0 V, and VOUT = 3.0 V, the device power dissipation is PD = (4.0 V − 3.0 V) 300 mA + (4.0 V) 2.0 mA = 308 mW The package used on the ADP3333 has a thermal resistance of 158°C/W for 4-layer boards. The junction temperature rise above ambient is approximately equal to Input Bypass Capacitor TJA = 0.308 W × 158°C/W = 48.7°C An input bypass capacitor is not strictly required but is recommended in any application involving long input wires or high source impedance. Connecting a 1.0 μF capacitor from the input to ground reduces the circuit’s sensitivity to printed circuit board (PCB) layout and input transients. If a larger output capacitor is necessary, then a larger value input capacitor is also recommended. Therefore, to limit the junction temperature to 125°C, the maximum allowable ambient temperature is TA(MAX) = 125°C − 48.7°C = 76.3°C SHUTDOWN MODE The ADP3333 is short-circuit protected by limiting the pass transistor’s base drive current. The maximum output current is limited to about 1 A (see Figure 17). Applying a high signal to the shutdown pin, SD, or connecting it to the input pin, IN, turns the output on. Pulling the shutdown pin to 0.3 V or below, or connecting it to ground, turns the output off. In shutdown mode, the quiescent current is reduced to less than 1 μA. THERMAL OVERLOAD PROTECTION PCB LAYOUT CONSIDERATIONS The ADP3333 is protected against damage due to excessive power dissipation by its thermal overload protection circuit. Thermal protection limits the die temperature to a maximum of 165°C. Under extreme conditions (that is, high ambient temperature and power dissipation) where the die temperature starts to rise above 165°C, the output current is reduced until the die temperature drops to a safe level. Use the following general guidelines when designing printed circuit boards: OUTPUT CURRENT LIMIT Current and thermal limit protections are intended to protect the device against accidental overload conditions. For normal operation, the device’s power dissipation should be externally limited so that the junction temperature does not exceed 125°C. Rev. B | Page 10 of 12 Keep the output capacitor as close as possible to the output and ground pins. Keep the input capacitor as close as possible to the input and ground pins. PCB traces with larger cross sectional areas remove more heat from the ADP3333. For optimum heat transfer, use thick copper with wide traces. Connect the NC pins (Pin 4, Pin 5, Pin 6, and Pin 8) to ground for better thermal performance. The thermal resistance can be decreased by approximately 10% by adding a few square centimeters of copper area to the lands connected to the pins of the LDO. Use additional copper layers or planes to reduce the thermal resistance. Again, connecting the other layers to the GND and NC pins of the ADP3333 is best, but not necessary. When connecting the ground pad to other layers, use multiple vias. ADP3333 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 5 1 5.15 4.90 4.65 4 PIN 1 0.65 BSC 0.95 0.85 0.75 1.10 MAX 0.15 0.00 0.38 0.22 COPLANARITY 0.10 0.23 0.08 8° 0° 0.80 0.60 0.40 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 23. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters ORDERING GUIDE Model ADP3333ARM-1.5-RL ADP3333ARM-1.5-RL7 ADP3333ARM-1.8-RL ADP3333ARM-1.8-RL7 ADP3333ARM-2.5-RL ADP3333ARM-2.5-RL7 ADP3333ARM-2.77-RL ADP3333ARM-2.77-R7 ADP3333ARM-3-REEL ADP3333ARM-3-REEL7 ADP3333ARM-3.15-RL ADP3333ARM-3.15-R7 ADP3333ARM-3.3-RL ADP3333ARM-3.3-RL7 ADP3333ARM-5-REEL ADP3333ARM-5-REEL7 ADP3333ARMZ-1.5-R71 ADP3333ARMZ-1.5-RL1 ADP3333ARMZ-1.8-RL1 ADP3333ARMZ-1.8RL71 ADP3333ARMZ-2.5-RL1 ADP3333ARMZ-2.5-R71 ADP3333ARMZ-2.77R71 ADP3333ARMZ-3-R71 ADP3333ARMZ-3.15R71 ADP3333ARMZ-3.3-R71 ADP3333ARMZ-3.3-RL1 ADP3333ARMZ-5-R71 ADP3333ARMZ-5-RL1 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Output Voltage (V) 1.5 1.5 1.8 1.8 2.5 2.5 2.77 2.77 3 3 3.15 3.15 3.3 3.3 5 5 1.5 1.5 1.8 1.8 2.5 2.5 2.77 3.0 3.15 3.3 3.3 5.0 5.0 Z = RoHS Compliant Part. Rev. B | Page 11 of 12 Package Description 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP Package Option RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 Branding LKA LKA LKB LKB LKC LKC LKD LKD LKE LKE LKF LKF LKG LKG LKH LKH L1X L1X L1U L1U L1V L1V L1Y L1W L1Z L20 L20 L21 L21 ADP3333 NOTES ©2001–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02615-0-4/09(B) Rev. B | Page 12 of 12