Am7947C Subscriber Line Interface Circuit DISTINCTIVE CHARACTERISTICS Ideal for China National applications Low standby power –39.8 V to –58 V battery operation On-hook transmission Tip Open state for ground-start lines Two-wire impedance set by single external impedance Programmable constant-current feed Programmable loop-detect threshold Current gain = 200 Polarity reversal option On-chip Thermal Management (TMG) feature On-chip ring and test relay driver and relay snubber circuits BLOCK DIAGRAM TMG Test Relay Driver TESTOUT RINGOUT Ring Relay Driver A(TIP) C1 C2 HPA Input Decoder and Control C3 C4 Two-Wire Interface DET HPB B(RING) Signal Transmission VTX Off-Hook Detector E0 RSN RD Power-Feed Controller DA DB RDC CAS Ring-Trip Detector VBAT BGND VCC VEE AGND/DGND Publication# 080366 Issue Date: May 2001 Rev: B ORDERING INFORMATION Standard Products Legerity standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below. Am7947C J C TEMPERATURE RANGE C = Commercial (0°C to 70°C)* PACKAGE TYPE J = 32-pin Plastic Leaded Chip Carrier (PL 032) DEVICE NUMBER/DESCRIPTION Am7947C Subscriber Line Interface Circuit Valid Combinations Valid Combinations JC Am7947C PC DC Valid Combinations list configurations planned to be supported in volume for this device. Consult the local Legerity sales office to confirm availability of specific valid combinations, to check on newly released combinations, and to obtain additional data on Legerity’s standard military grade products. Note: * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterization and periodic sampling of production units. 2 Am7947C Data Sheet CONNECTION DIAGRAMS Top View NC VCC NC BGND B(RING) A(TIP) DB 32-Pin PLCC 4 3 2 1 32 31 30 RINGOUT 6 28 DA NC 7 27 RD TMG 8 26 HPB VBAT 9 25 NC C3 10 24 HPA C4 11 23 VTX NC 12 22 VEE TESTOUT 13 21 RSN 16 17 18 19 20 AGND/DGND 15 CAS E0 14 RDC TP C1 29 C2 5 DET TP Notes: 1. Pin 1 is marked for orientation. 2. TP is a thermal conduction pin tied to substrate. 3. NC = No Connect SLIC Products 3 PIN DESCRIPTIONS 4 Pin Names Type Description AGND/DGND Gnd A(TIP) Output BGND Gnd B(RING) Output C4–C1 Input CAS Capacitor DA Input Ring-trip negative. Negative input to ring-trip comparator. DB Input Ring-trip positive. Positive input to ring-trip comparator. DET Output E0 Input DET enable. A logic High enables DET. A logic Low disables DET. HPA Capacitor High-pass filter capacitor. A(TIP) side of high-pass filter capacitor. HPB Capacitor High-pass filter capacitor. B(RING) side of high-pass filter capacitor. NC — RD Resistor Detect resistor. Detector threshold set and filter pin. RDC Resistor DC feed resistor. Connection point for the DC feed current programming network. The other end of the network connects to the receiver summing node (RSN). The sign of VRDC is negative for normal polarity and positive for reverse polarity. RINGOUT Output RSN Input TESTOUT Output TMG Thermal Thermal management. External resistor connects between this pin and VBAT to offload power dissipation from SLIC. Functions during normal polarity, Active state. TP Thermal Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to VBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation. VBAT Battery Battery supply and connection to substrate. VCC Power +5 V power supply. VEE Power –5 V power supply. VTX Output Transmit audio. This output is a unity gain version of the A(TIP) and B(RING) metallic voltage. VTX also sources the two-wire input impedance programming network. Analog and Digital ground. Output of A(TIP) power amplifier. Battery (power) ground. Output of B(RING) power amplifier. Decoder. SLIC control pins. C4 is MSB and C1 is LSB. TTL compatible. Anti-saturation pin for capacitor to filter reference voltage when operating in anti-saturation region. Switchhook detector. When enabled, a logic Low indicates that selected condition is detected. The detect condition is selected by the logic inputs (C3–C1 and E0). The output is open-collector with a built-in 15 kΩ pull-up resistor. No connect This pin is not internally connected. Ring relay driver. Open collector driver with emitter internally connected to BGND. Receive summing node. The metallic current (AC and DC) between A(TIP) and B(RING) is equal to 200 times the current into this pin. The networks that program receive gain, two-wire impedance, and feed resistance all connect to this node. Test relay driver. Open collector driver with emitter internally connected to AGND. Am7947C Data Sheet ABSOLUTE MAXIMUM RATINGS OPERATING RANGES Storage temperature ......................... –55°C to +150°C Commercial (C) Devices VCC with respect to AGND/DGND ........ –0.4 V to +7 V Ambient temperature .............................0°C to +70°C* VEE with respect to AGND/DGND......... +0.4 V to –7 V VCC .....................................................4.75 V to 5.25 V VBAT with respect to AGND/DGND: VEE ..................................................–4.75 V to –5.25 V Continuous..................................... +0.4 V to –70 V VBAT ...................................................–38.9 V to –58 V 10 ms ............................................. +0.4 V to –75 V AGND/DGND .......................................................... 0 V BGND with respect to AGND/DGND........ +3 V to –3 V BGND with respect to AGND/DGND........................ –100 mV to +100 mV A(TIP) or B(RING) to BGND: Continuous ....................................... –70 V to +1 V 10 ms (f = 0.1 Hz) ............................. –70 V to +5 V 1 µs (f = 0.1 Hz) ................................ –80 V to +8 V 250 ns (f = 0.1 Hz) .......................... –90 V to +12 V Current from A(TIP) or B(RING) ....................... ±150 mA RINGOUT/TESTOUT current ............................50 mA Load resistance on VTX to ground .............. 10 kΩ min Operating Ranges define those limits between which device functionality is guaranteed. * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterization and periodic sampling of production units. RINGOUT/TESTOUT voltage ............... BGND to +7 V RINGOUT/TESTOUT transient ........... BGND to +10 V DA and DB inputs Voltage on ring-trip inputs .....................VBAT to 0 V Current into ring-trip inputs ............................ ±10 mA C4–C1 and E0 Input voltage .........................–0.4 V to VCC + 0.4 V Maximum power dissipation, continuous, TA = 70°C, No heat sink (See note): In 32-pin PLCC package................................1.7 W Thermal Data ................................................................. θJA In 32-pin PLCC package....................... 43°C/W typ Note: Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165°C. The device should never be exposed to this temperature, and operation above 145°C junction temperature may degrade device reliability. Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. SLIC Products 5 ELECTRICAL CHARACTERISTICS Description Test Conditions (See Note 1) Min Typ Max Unit Note dB 1, 4, 7 Ω 4 mV — 4 Vpk 2a Vrms 2b dB 5 dB — 4 Transmission Performance 2-wire return loss 200 Hz to 3.4 kHz 26 Analog output (VTX) impedance 3 Analog (VTX) output offset voltage 0°C to +70°C –40°C to +85°C –40 –45 Overload level, 2-wire and 4-wire Active state 2.5 Overload level On hook, RLAC = 600 Ω 0.9 THD (Total Harmonic Distortion) 0 dBm +7 dBm THD, on hook 0 dBm, RL = 600 Ω +40 +45 –64 –55 –50 –40 –35.5 Longitudinal Capability (See Test Circuit D) Longitudinal to metallic L-T, L-4 200 Hz to 3.4 kHz 0°C to +70°C –40°C to +85°C 52 50 70 Longitudinal signal generation 4-L 200 Hz to 800 Hz normal polarity 40 Longitudinal current per pin Active state OHT state 20 10 Longitudinal impedance at A or B 0 to 100 Hz 25 35 Ω/pin C-message weighted noise RL = 600 Ω +7 +14 dBrnC Psophometric weighted noise RL = 600 Ω –83 –76 dBmp 35 17.5 mArms Idle Channel Noise 4 Insertion Loss (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B) Gain accuracy over temperature 0 dBm, 1 kHz 0°C to +70°C –40°C to +85°C –0.15 –0.20 +0.15 +0.20 Gain accuracy over frequency 300 Hz to 3400 Hz 0°C to +70°C –40°C to +85°C –0.1 –0.15 +0.1 +0.15 +3 dBm to –55 dBm 0°C to +70°C –40°C to +85°C –0.1 –0.15 +0.1 +0.15 4 4 On-hook, OHT state –1.0 +1.0 4 3 4 Gain tracking relative to 0 dBm Gain accuracy — 4 dB 5 4 Balance Return Signal (4- to 4-Wire) Gain accuracy over temperature Ref: 0 dBm, 1 kHz 0°C to +70°C –40°C to +85°C –0.15 –0.20 +0.15 +0.20 Gain accuracy over frequency 300 Hz to 3400 Hz 0°C to +70°C –40°C to +85°C –0.1 –0.15 +0.1 +0.15 +3 dBm to –55 dBm 0°C to +70°C –40°C to +85°C –0.1 –0.15 +0.1 +0.15 Gain tracking relative to 0 dBm Group delay 6 0 dBm, 1 kHz 4 Am7947C Data Sheet dB 3 4 3, 4 4 µs 4, 7 ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max 27.7 27.4 30.5 30.5 33.3 33.3 Unit Note Line Characteristics IL, Short loops, Active or OHT RLDC = 600 Ω IL, Long loops, Active or OHT RLDC = 1900 Ω, BAT = 39.8 V 15 IL, Long loops, Active or OHT RLDC = 1900 Ω, BAT = 48.0 V 18 IL, Accuracy, Standby state IL 0°C to +70°C –40°C to +85°C V BAT – 3 V = ------------------------------R L + 1800 TA = 25°C RL = 600 Ω IL, Loop current, Tip Open state RL = 0 Ω B to GND B to VBAT +6 V IL, Loop current, Open Circuit state RL = 0 Ω ILLIM Active, A and B to GND VA, Active, ground-start signaling A to –48 V = 7 Ω, B to GND = 100 Ω 18.6 mA 0.7IL IL 13 18.7 0 30 30 VAB, Open circuit voltage — 4 100 –7.5 –5 –39 –40.9 1.3IL 100 µA mA mA 100 µA 130 mA 4 V Power Supply Rejection Ration (VRIPPLE = 100 mVrms), Active Normal State VCC 50 Hz to 3.4 kHz 30 40 VEE 50 Hz to 3.4 kHz 28 35 VBAT 50 Hz to 3.4 kHz 28 50 Effective internal resistance CAS pin to GND 85 170 255 On hook, Open Circuit state 25 100 On hook, Standby state 45 85 120 180 dB 5 5, 8 kΩ 4 Power Dissipation On hook, OHT state On hook, Active state RTMG = Open RTMG = 2 kΩ 180 195 270 300 Off hook, Standby state RL = 600 Ω 860 1300 Off hook, OHT state RTMG = Open, RL = 300 Ω 1280 1690 Off hook, Active state RTMG = 2 kΩ, RL = 300 Ω 830 1200 mW Supply Currents, Battery = –58 V ICC, on-hook VCC supply current Open Circuit state OHT state Standby state Active state, BAT = –48 V 1.7 4.9 2.2 6.3 2.5 7.5 3.0 8.5 IEE, on-hook VEE supply current Open Circuit state OHT state Standby state Active state, BAT = –48 V 0.7 2.0 0.77 2.1 2.0 3.5 2.0 5.0 IBAT, on-hook VBAT supply current Open Circuit state OHT state Standby state Active state, BAT = –48 V 0.18 0.19 0.45 4.2 1.0 4.7 1.5 5.7 mA RFI Rejection RFI rejection 100 kHz to 30 MHz (See Figure F) 1.0 SLIC Products mVrms 4 7 ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max Unit Note Logic Inputs (C4–C1 and E0) VIH, Input High voltage 2.0 V VIL, Input Low voltage IIH, Input High current IIL, Input Low current –75 C4–C1 and E0 40 –400 µA Logic Output (DET) VOL, Output Low voltage IOUT = 0.3 mA, 15 kΩ to VCC VOH, Output High voltage IOUT = –0.1 mA, 15 kΩ to VCC 0.4 2.4 V Ring-Trip Detector Input (DA, DB) Bias current Offset voltage –500 –50 Source resistance = 2 MΩ –50 0 RD = 33 kΩ, IT = 375/RD –12 nA +50 mV 12 % +0.5 V 100 µA Loop Detector IT, Loop-detect threshold tolerance Relay Driver Output (RINGOUT) On voltage IOL = 35 mA +0.3 Off leakage VOH = +5 V Zener breakover IZ = 100 µA Zener on voltage IZ = 30 mA 10 On voltage IOL = 35 mA +0.5 Off leakage VOH = +5 V Zener breakover IZ = 100 µA Zener on voltage IZ = 30 mA 6 7.2 V Test Driver Output (TESTOUT) 6 +0.75 V 100 µA 7.2 V 10 RELAY DRIVER SCHEMATICS TESTOUT RINGOUT BGND 8 AGND Am7947C Data Sheet 6 SWITCHING CHARACTERISTICS Symbol Parameter tshdd E0 Low to DET Low tshdo E0 Low to DET High Test Conditions Switchhoook Detect State (See Figure E) Temperature Ranges 0°C to +70°C –40°C to 85°C Min Typ Max 1.1 1.6 3.8 4.0 Unit Note µs 4 SWITCHING WAVEFORMS E0 to DET E0 DET tshdo tshdd Note: All delays measured at 1.4 V level. Notes: 1. Unless otherwise noted, test conditions are BAT = –48 V, VCC = +5 V, VEE = –5 V, RL = 600 Ω, RDC1 = RDC2 = 8.2 kΩ, RD = 33 kΩ, no fuse resistors, CHP = 0.33 µF, CDC = 0.33 µF, CCAS = 0.33 µF, D1 = 1N400x, two-wire AC input impedance is a 600 Ω resistance synthesized by the programming network shown below. VTX RT1 = 60 kΩ CT1 = 150 pF RT2 = 60 kΩ RSN RRX = 60 kΩ VRX 2. a. Overload level is defined when THD = 1%. b. Overload level is defined when THD = 1.5% 3. Balance return signal is the signal generated at VTX by VRX. This specification assumes the two-wire AC load impedance matches the programmed impedance. 4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 5. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization. 6. Tested with 0 Ω source impedance. 2 MΩ is specified for system design only. 7. Group delay can be greatly reduced by using a ZT network such as that shown in Note 1 above. The network reduces the group delay to less than 2 µs. The effect of group delay on the linecard performance may be compensated for by synthesizing complex impedance with the QSLAC™ or DSLAC™ device. 8. This parameter degrades when the SLIC is in the battery-dependent anti-sat region. See the DC Feed Characteristics section on page 11 for a description of battery-dependent anti-sat region. SLIC Products 9 Table 1. State C3 C2 C1 SLIC Decoding Two-Wire Status DET Output 0 0 0 0 Open Circuit Ring trip 1 0 0 1 Ringing Ring trip 2 0 1 0 Active Loop detector 3 0 1 1 On-hook TX (OHT) Loop detector 4 1 0 0 Tip Open Loop detector 5 1 0 1 Standby Loop detector 6 1 1 0 Active Polarity Reversal Loop detector 7 1 1 1 OHT Polarity Reversal Loop detector Note: C4 logic High enables the TESTOUT relay driver. Table 2. User-Programmable Components Z T = 200 ( Z2WIN – 2R F ) ZT is connected between the VTX and RSN pins. The fuse resistors are RF, and Z2WIN is the desired 2-wire AC input impedance. When computing ZT, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account. ZL 200 • Z T Z RX = ------------ • -------------------------------------------------G 42L Z T + 200 ( Z L + 2RF ) ZRX is connected from VRX to RSN. ZT is defined above, and G42L is the desired receive gain. 500 R DC1 + R DC2 = --------------I LOOP RDC1, RDC2, and CDC form the network connected to the RDC pin. RDC1 and RDC2 are approximately equal. ILOOP is the desired loop current in the constant-current region. R DC1 + R DC2 C DC = 1.5 ms • --------------------------------RDC1 • R DC2 375 R D = --------- , IT 0.5 ms C D = ---------------RD RD and CD form the network connected from RD to –5 V and IT is the threshold current between on hook and off hook. 1 C CAS = -----------------------------5 3.4 • 10 πf c CCAS is the regulator filter capacitor and fc is the desired filter cut-off frequency. 500 I OHT = --------------------------------R DC1 + R DC2 OHT loop current (constant-current region). Thermal Management Equations (Normal Active and Tip Open States) RTMG is connected from TMG to VBAT and is used to limit power dissipation within the SLIC in Normal Active and Tip Open states only. V BAT – 6 V R TMG ≥ ----------------------------ILOOP 2 Power dissipated in the thermal management resistor, RTMG, during Active and Tip Open states. ( V BAT – 6 V – ( I L • R L ) ) P RTMG = ---------------------------------------------------------------R TMG 2 P SLIC = VBAT • I L – P RTMG – R L ( I L ) + 0.12 W 10 Power dissipated in the SLIC while in Active and Tip Open states. Am7947C Data Sheet DC FEED CHARACTERISTICS 45 4 5 3 40 2 35 30 VAB (V) 1 25 20 15 Vbat 38V Vbat 40V Vbat 42V Vbat 44V Vbat 46V Vbat 48V 2000 Ohms 600 Ohms Idet 10 5 0 0 5 10 15 20 25 30 IL (mA) RDC = 16,400 Ω RD = 33 kΩ Notes: 1. Constant-current region: 500I L = ---------R DC 2. Anti-sat turn-on: VAB = 0.69 |VBAT| + 5.8, VAB = 33.4, |VBAT| ≤ 40.0 V |VBAT| > 40.0 V 3. Open Circuit voltage: VAB = 0.69 |VBAT| + 8.47, VAB = 40.9, |VBAT| ≤ 47.0 V |VBAT| > 47.0 V 4. Anti-sat (IL > IDET): R DC a. VAB = 0.69 V BAT + 9.967 – I L ----------- , 120 4a ≤ 4b R DC b. VAB = 45.9 – I L ----------- , 40 4a > 4b RDC 5. Anti-sat region (IL < IDET): a. VAB = 0.69 V BAT + 8.47 – I L ----------- , 120 R DC b. V AB = 40.9 – I L ----------- , 40 5a ≤ 5b 5a > 5b 6. Loop-detect threshold (IDET): I DET = 375 --------RD 7. Anti-sat transition region, off-hook to on-hook. 8. Anti-sat transition region, on-hook to off-hook. a. VA–VB (VAB) Voltage vs. Loop Current (Typical) SLIC Products 11 DC FEED CHARACTERISTICS (continued) RDC = 22.72 kΩ VBAT = 48 V RD = 35.4 kΩ b. Loop Current vs. Load Resistance (Typical) A a RL SLIC RSN IL RDC1 b RDC2 B RDC Feed current programmed by RDC1 and RDC2 c. Feed Programming Figure 1. DC Feed Characteristics 12 Am7947C Data Sheet CDC TEST CIRCUITS VTX A(TIP) VTX A(TIP) RL RT 2 SLIC VAB VL SLIC VAB AGND RL 2 RL RT AGND RRX RRX B(RING) RSN B(RING) RSN IL2-4 = 20 log (VTX / VAB) IL4-2 = 20 log (VAB / VRX) VRX BRS = 20 log (VTX / VRX) A. Two- to Four-Wire Insertion Loss 1 ωC B. Four- to Two-Wire Insertion Loss and Balance Return Signal ZD << RL RL 2 C S1 VL SLIC VAB VL A(TIP) VTX A(TIP) RT1 RT VM VS S2 B(RING) SLIC R AGND RL 2 VTX RRX AGND R ZIN RSN VRX S2 Open, S1 Closed L-T Long. Bal. = 20 log (VAB / VL) RT2 B(RING) RSN Note: ZD is the desired impedance (e.g., the characteristic impedance of the line). L-4 Long. Bal. = 20 log (VTX / VL) S2 Closed, S1 Open CT1 RRX RL = –20 log (2 VM / VS) 4-L Long. Sig. Gen. = 20 log (VL / VRX) D. Two-Wire Return Loss Test Circuit C. Longitudinal Balance SLIC Products 13 TEST CIRCUITS (continued) VCC 6.2 kΩ A(TIP) DET 15 pF RL = 600 Ω E1 B(RING) E. Loop-Detector Switching L1 200 Ω C1 RF1 50 Ω A(TIP) CAX 33 nF RF2 50 Ω 200 Ω B(RING) HF GEN 50 Ω L2 C2 CBX 33 nF VTX SLIC under test 1.5 Vrms 80% Amplitude Modulated 100 kHz to 30 MHz F. RFI Test Circuit 14 Am7947C Data Sheet TEST CIRCUITS (continued) –5 V +5 V VCC VEE DA DB RD RD VTX VTX 2.2 nF A(TIP) A(TIP) RT HPA RRX CHP RSN VRX HPB B(RING) B(RING) RDC2 2.2 nF RDC RINGOUT RDC1 CDC TESTOUT AGND/ DGND BGND VBAT BAT D1 BATTERY GROUND E0 C4 C3 C2 ANALOG GROUND C1 TMG RTMG DET CAS DIGITAL GROUND CCAS G. Am7947C Test Circuit SLIC Products 15 Physical Dimensions for PL 032 Dwg rev AH; 08/00 16 Am7947C Data Sheet REVISION SUMMARY Revision A to B • Minor changes were made to the data sheet style and format to conform to Legerity standards. • Deleted the Ceramic DIP and Plastic DIP packages and references to them. • The physical dimension (PL032) was added to the Physical Dimensions section. SLIC Products 17 Notes: www.legerity.com 18 Am7947C Data Sheet Legerity provides silicon solutions that enhance the performance, speeds time-to-market, and lowers the system cost of our customers' products. By combining process, design, systems architecture, and a complete set of software and hardware support tools with unparalleled factory and worldwide field applications support, Legerity ensures its customers enjoy a smoother design experience. It is this commitment to our customers that places Legerity in a class by itself. SLIC Products 19 The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in Legerity's Standard Terms and Conditions of Sale, Legerity assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. Legerity's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of Legerity's product could create a situation where personal injury, death, or severe property or environmental damage may occur. Legerity reserves the right to discontinue or make changes to its products at any time without notice. © 2001 Legerity, Inc. All rights reserved. Trademarks Legerity, the Legerity logo and combinations thereof, DSLAC and QSLAC are trademarks of Legerity, Inc. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. 20 Am7947C Data Sheet Americas Mailing: P.O. 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