Am79534/Am79535
Subscriber Line Interface Circuit
DISTINCTIVE CHARACTERISTICS
■ Programmable constant-current feed
■ Ground-key detect
■ Line-feed characteristics independent of
battery variations
■ Two-wire impedance set by single external
impedance
■ Programmable loop-detect threshold
■ Polarity reversal feature
■ On-chip switching regulator for low-power
dissipation
■ Tip Open state for ground-start lines
■ Pin for external ground-key noise-filter
capacitor available
■ On-hook transmission
■ Test relay driver optional
BLOCK DIAGRAM
Ring Relay Driver
RINGOUT
Test Relay Driver
TESTOUT
A(TIP)
Ground-Key
Detector
HPA
Input Decoder
and Control
Two-Wire
Interface
HPB
C1
C2
C3
C4
E1
E0
DET
GKFIL
VTX
RSN
Signal Transmission
Off-Hook Detector
B(RING)
DA
DB
VREG
L
VBAT
BGND
RD
RDC
Power-Feed
Controller
Ring-Trip Detector
Switching Regulator
CHS
QBAT
CHCLK
VCC
VEE
Notes:
1. Am79534—E0 and E1 inputs; ring and test relay drivers sourced internally to BGND.
AGND
16854C-01
2. Am79535—E0 and E1 inputs; ring relay driver sourced internally to BGND; ground-key filter pin.
3. Current gain (K1) = 1000 for all parts.
Publication# 16854 Rev: D Amendment: /0
Issue Date: October 1999
ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed
by a combination of the elements below.
Am7953X
J
C
OPERATING CONDITIONS
C = Commercial (0°C to 70°C)*
PACKAGE TYPE
J = 32-Pin Plastic-Leaded Chip Carrier (PL 032)
PERFORMANCE GRADE
Blank = Standard Specification
–1 = Performance Grading
–2 = Performance Grading
DEVICE NUMBER/DESCRIPTION
Am7953X
Subscriber Line Interface Circuit
Valid Combinations
Valid Combinations
Am7953X
–1
DC
–2
JC
Valid Combinations list configurations planned to be supported
in volume for this device. Consult the local AMD sales office to
confirm availability of specific valid combinations, to check on
newly released combinations, and to obtain additional data on
AMD’s standard military grade products.
Note:
* Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of production units.
2
Am7953X Data Sheet
CONNECTION DIAGRAMS
Top View
RINGOUT
VCC
VREG
BGND
B(RING)
A(TIP)
DB
Am79534
4
3
2
1
32
31
30
TESTOUT
6
28
DA
L
7
27
RD
VBAT
8
26
HPB
QBAT
9
25
HPA
CHS
10
24
VTX
CHCLK
11
23
VEE
C4
12
22
RSN
E1
13
21
AGND
17
18
19
RINGOUT
VCC
VREG
BGND
B(RING)
A(TIP)
DB
Am79535
20
DGND
16
RDC
15
C1
14
C3
RSVD
C2
29
DET
5
E0
RSVD
4
3
2
1
32
31
30
DA
L
7
27
RD
VBAT
8
26
HPB
QBAT
9
25
HPA
CHS
10
24
VTX
CHCLK
11
23
VEE
RSVD
12
22
RSN
E1
13
21
AGND
Notes:
1. Pin 1 is marked for orientation.
14
15
16
17
18
19
20
DGND
28
RDC
6
C1
GKFIL
C3
TP
C2
29
DET
5
E0
TP
2. TP is a thermal conduction pin tied to substrate (QBAT).
3. RSVD = Reserved. Do not connect to these pins.
SLIC Products
3
PIN DESCRIPTIONS
4
Pin Names
Type
Description
AGND
Gnd
A(TIP)
Output
BGND
Gnd
B(RING)
Output
C3–C1
Input
Decoder. TTL compatible. C3 is MSB and C1 is LSB.
C4
Input
Test relay driver command (Am79534). TTL compatible. A logic Low enables the driver.
CHCLK
Input
Chopper clock. Input to switching regulator (TTL compatible). Frequency = 256 kHz (nominal).
CHS
Input
Chopper stabilization. Connection for external stabilization components.
DA
Input
Ring-trip negative. Negative input to ring-trip comparator.
DB
Input
Ring-trip positive. Positive input to ring-trip comparator.
DET
Output
DGND
Gnd
Digital ground.
E0
Input
Read enable. A logic High enables DET. A logic Low disables DET.
E1
Input
Ground-key enable. E1 = High connects the ground-key detector to DET, and E1 = Low connects
the off-hook or ring-trip detector to DET.
GKFIL
Capacitor
Ground-key filter capacitor connection ( Am79535). An external capacitor for filtering out
high-frequency noise from the ground-key loop can be connected to this pin. An internal 36 kΩ, –
20%, +40% resistor is provided to form an RC filter with the external capacitor. In versions that
have a GKFIL pin, 3.3 nF minimum capacitance must be connected from the GKFIL pin to ground.
HPA
Capacitor
High-pass filter capacitor; A(TIP) side of high-pass filter capacitor.
HPB
Capacitor
High-pass filter capacitor; B(RING) side of high-pass filter capacitor.
L
Output
Switching regulator power transistor. Connection point for filter inductor and anode of catch diode.
This pin has up to 60 V of pulse waveform on it and must be isolated from sensitive circuits. Keep
the diode connections short because of the high currents and high di/dt.
QBAT
Battery
Quiet battery. Filtered battery supply for the signal processing circuits.
RD
Resistor
Detect resistor. Threshold modification and filter point for the off-hook detector.
RDC
Resistor
DC feed resistor. Connection point for the DC feed-current programming network which also
connects to the Receiver Summing Node (RSN). VRDC is negative for normal polarity and
positive for reverse polarity.
RINGOUT
Output
Analog (quiet) ground.
Output of A(TIP) power amplifier.
Battery (power) ground.
Output of B(RING) power amplifier.
Detector. A logic Low indicates that the selected detector is tripped. The detector is selected by
the logic inputs (C3–C1, E0, and E1). The output is open-collector with a built-in 15 kΩ pull-up
resistor.
Ring relay driver; sourcing from BGND with internal diode to QBAT.
Receive summing node. The metallic current ( AC and DC) between A(TIP) and B(RING) is equal
to 1000 times the current into this pin. The networks that program receive gain, two-wire
impedance, and feed current all connect to this node. This node is extremely sensitive. Route the
256 kHz chopper clock and switch lines away from the RSN node.
RSN
Input
TESTOUT
Output
TP
Thermal
Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT). Leave as
open circuit or connected to QBAT. In both cases, the TP pins can connect to an area of copper
on the board to enhance heat dissipation.
VBAT
Battery
Battery supply through an external protection diode.
VCC
Power
+5 V power supply.
VEE
Input
–5 V power supply.
VREG
Input
Regulated voltage. Provides negative power supply for power amplifiers and connection point for
inductor, filter capacitor, and chopper stabilization.
VTX
Output
Transmit audio. This output is a unity gain version of the A(TIP) and B(RING) metallic voltage. VTX
also sources the two-wire input impedance-programming network connects here.
Test relay driver (Am79534); sourcing from BGND with internal diode to QBAT.
Am7953X Data Sheet
ABSOLUTE MAXIMUM RATINGS
In 32-pin PLCC package . . . . . . . . . . . . . 1.74 W
Storage temperature . . . . . . . . . . . . –55°C to +150°C
VCC with respect to AGND/DGND . . .–0.4 V to +7.0 V
VEE with respect to AGND/DGND . . .+0.4 V to –7.0 V
VBAT with respect to AGND/DGND . . +0.4 V to –70 V
Note: Rise time of VBAT (dv/dt) must be limited to 27 V/µs or
less when QBAT bypass = 0.33 µF.
BGND with respect to
AGND/DGND. . . . . . . . . . . . . . . .+1.0 V to –3.0 V
A(TIP) or B(RING) to BGND:
Continuous . . . . . . . . . . . . . . . . . –70 V to +1.0 V
10 ms (f = 0.1 Hz) . . . . . . . . . . . . –70 V to +5.0 V
1 µs (f = 0.1 Hz). . . . . . . . . . . . . . .–90 V to +10 V
250 ns (f = 0.1 Hz) . . . . . . . . . . . .–120 V to +15 V
Note: Thermal limiting circuitry on chip will shut down the
circuit at a junction temperature of about 165°C. The device
should never be exposed to this temperature. Operation
above 145°C junction temperature may degrade device
reliability. See the SLIC Packaging Considerations for more
information.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to Absolute Maximum
Ratings for extended periods may affect device reliability.
OPERATING RANGES
Commercial (C) Devices
Ambient temperature . . . . . . . . . . . . . . 0°C to +70°C*
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75 V to 5.25 V
Current from A(TIP) or B(RING). . . . . . . . . . ± 150 mA
VEE . . . . . . . . . . . . . . . . . . . . . . . . –4.75 V to –5.25 V
Voltage on RINGOUT . . . BGND to 70 V above QBAT
VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . –40 V to –58 V
Voltage on TESTOUT . . . BGND to 70 V above QBAT
AGND/DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V
Current through relay drivers . . . . . . . . . . . . . . 60 mA
Voltage on ring-trip inputs (DA and DB) . . .VBAT to 0 V
BGND with respect to
AGND/DGND . . . . . . . . . . . –100 mV to +100 mV
Current into ring-trip inputs . . . . . . . . . . . . . . ± 10 mA
Load resistance on VTX to ground . . . . . . . 10 kΩ min
Peak current into regulator switch (L pin) . . . 150 mA
Operating Ranges define those limits between which the
functionality of the device is guaranteed.
Switcher transient peak off voltage on L pin . . +1.0 V
C4–C1, E1, CHCLK to
AGND/DGND. . . . . . . . . . –0.4 V to (VCC + 0.4 V)
Maximum power dissipation (see note) . . . TA = 70°C
* Functionality of the device from 0°C to +70°C is guaranteed
by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of
production units.
SLIC Products
5
ELECTRICAL CHARACTERISTICS
Description
Test Conditions (See Note 1)
Min
Analog (VTX) output impedance
Analog (VTX) output offset
Longitudinal impedance at A or B
Overload level
Z2WIN = 600 Ω to 900 Ω
Max
3
0°C to +70°C
–1*
–35
–30
+35
+30
–1
–40
–35
+40
+35
–40°C to +85°C
Analog (RSN) input impedance
Typ
1
300 Hz to 3.4 kHz
20
35
4-wire
2-wire
–3.1
+3.1
Unit
Note
Ω
4
mV
Ω
4
4
4
Vpk
2
dB
4, 10
Transmission Performance, 2-Wire Impedance
2-wire return loss
(See Test Circuit D)
300 Hz to 500 Hz
500 Hz to 2.5 kHz
2.5 kHz to 3.4 kHz
26
26
20
Longitudinal Balance (2-Wire and 4-Wire, See Test Circuit C)
RL = 600 Ω
Longitudinal to metallic L-T, L-4
300 Hz to 3.4 kHz
Longitudinal to metallic L-T, L-4
200 Hz to 1 kHz:
Normal polarity
0°C to +70°C
Normal polarity
–40°C to +85°C
Reverse polarity
–1*
48
52
–2*
63
–2
–2
58
54
–2*
58
–2
–2
54
54
–1*
40
42
4
dB
1 kHz to 3.4 kHz:
Normal polarity
0°C to +70°C
Normal polarity
–40°C to +85°C
Reverse polarity
Longitudinal signal generation 4-L
300 Hz to 800 Hz
300 Hz to 800 Hz
Longitudinal current capability per wire Active state
OHT state
4
25
18
mArms
4
Insertion Loss (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B)
Gain accuracy
Variation with frequency
0 dBm, 1 kHz
0°C to +70°C
0 dBm, 1 kHz
–40°C to +85°C
0 dBm, 1 kHz
0°C to +70°C
0 dBm, 1 kHz
–40°C to +85°C
–0.15
+0.15
–0.20
+0.20
–1*
–0.1
+0.1
–1
–0.15
+0.15
–0.1
–0.15
+0.1
+0.15
4
–0.1
–0.15
+0.1
+0.15
4
300 Hz to 3.4 kHz
(relative to 1 kHz):
0°C to +70°C
–40°C to +85°C
Gain tracking
4
dB
4
+7 dBm to –55 dBm:
0°C to +70°C
–40°C to +85°C
Note:
* P.G. = Performance Grade (–2 performance parameters are equivalent to –1 performance parameters, except where indicated).
6
Am7953X Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Balance Return Signal (4- to 4-Wire, See Test Circuit B)
Gain accuracy
Variation with frequency
0 dBm, 1 kHz
0°C to +70°C
0 dBm, 1 kHz
–40°C to +85°C
0 dBm, 1 kHz
0°C to +70°C
0 dBm, 1 kHz
–40°C to +85°C
–0.15
+0.15
–0.20
+0.20
–1*
–0.1
+0.1
–1
–0.15
+0.15
–0.1
–0.15
+0.1
+0.15
4
–0.1
–0.15
+0.1
+0.15
4
4
300 Hz to 3.4 kHz
(relative to 1 kHz):
0°C to +70°C
–40°C to +85°C
Gain tracking
dB
4
+7 dBm to –55 dBm:
0°C to +70°C
–40°C to +85°C
Group delay
4
f = 1 kHz
µs
5.3
4
Total Harmonic Distortion (2- to 4-Wire or 4- to 2-Wire, See Test Circuits A and B)
Total harmonic distortion
0 dBm, 300 Hz to 3.4 kHz
+9 dBm, 300 Hz to 3.4 kHz
–64
–55
–50
–40
–1*
+7
+7
+7
+15
+12
+15
+15
+12
+15
dB
Idle Channel Noise
C-message weighted noise
Psophometric weighted noise
2-wire:
2-wire:
2-wire:
0°C to +70°C
0°C to +70°C
–40°C to +85°C
4-wire
4-wire
4-wire
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–1*
+7
+7
+7
2-wire
2-wire
2-wire
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–1*
–83
–83
–83
–75
–78
–75
4-wire
4-wire
4-wire
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–1*
–83
–83
–83
–75
–78
–75
4
dBrnC
4
7
dBmp
4
7
4
Single Frequency Out-of-Band Noise (See Test Circuit E)
Metallic
4 kHz to 9 kHz
9 kHz to 1 MHz
256 kHz and harmonics
–76
–76
–57
Longitudinal
1 kHz to 15 kHz
Above 15 kHz
256 kHz and harmonics
–70
–85
–57
dBm
4, 5, 9
4, 5, 9
4, 5
4
4, 5, 9
4, 5
DC Feed Currents (See Figure 1) BAT = –48 V
Active state loop-current accuracy
ILOOP (nominal) = 40 mA
–7.5
OHT state
RL = 600 Ω
Tip Open state
RL = 600 Ω
1.0
Open Circuit state
RL = 0 Ω
1.0
Fault current limit, ILLIM (IAX + IBX)
A and B shorted to GND
130
18
SLIC Products
+7.5
20
%
22
mA
7
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
–1*
35
35
120
80
–1*
135
135
250
200
–1*
200
200
400
300
Unit
Note
Power Dissipation BAT = –48 V, Normal Polarity
On-hook Open Circuit state
On-hook OHT state
On-hook Active state
Off-hook OHT state
RL = 600 Ω
500
750
Off-hook Active state
RL = 600 Ω
650
1000
VCC on-hook supply current
Open Circuit state
OHT state
Active state
3.0
6.0
7.5
4.5
10.0
12.0
VEE on-hook supply current
Open Circuit state
OHT state
Active state
1.0
2.2
2.7
2.3
3.5
6.0
Open Circuit state
OHT state
Active state
0.4
3.0
4.0
1.0
5.0
6.0
mW
Supply Currents
VBAT on-hook supply current
mA
Power Supply Rejection Ratio (VRIPPLE = 50 mVrms)
VCC
50 Hz to 3.4 kHz
–1*
25
30
45
45
–1
22
25
35
35
–1*
20
25
40
40
–1
10
10
25
25
–1*
27
30
45
45
–1
20
25
40
40
3.4 kHz to 50 kHz
VEE
50 Hz to 3.4 kHz
3.4 kHz to 50 kHz
VBAT
50 Hz to 3.4 kHz
3.4 kHz to 50 kHz
dB
6, 7
Off-Hook Detector
Current threshold accuracy
IDET = 365/RD nominal
–20
+20
%
10.0
kΩ
Ground-Key Detector Thresholds, Active State, BAT = –48 V (See Test Circuit F)
Ground-key resistance threshold
B(RING) to GND
Ground-key current threshold
B(RING) to GND
Midpoint to GND
2.0
5.0
9
mA
–5
–0.05
µA
–50
0
8
Ring-Trip Detector Input
Bias current
Offset voltage
8
Source resistance 0 to 2 MΩ
Am7953X Data Sheet
+50
mV
11
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Logic Inputs (C4–C1, E0, E1, and CHCLK)
Input High voltage
2.0
Input Low voltage
0.8
Input High current
All inputs except E1
Input E1
Input Low current
–75
–75
40
45
–0.4
V
µA
mA
Logic Output (DET)
Output Low voltage
IOUT = 0.8 mA
Output High voltage
IOUT = –0.1 mA
0.4
2.4
V
Relay Driver Outputs (RINGOUT, TESTOUT)
On voltage
50 mA source
BGND – 2
BGND –
0.95
Off leakage
V
0.5
Clamp voltage
50 mA sink
100
QBAT – 2
µA
V
RELAY DRIVER SCHEMATICS
Am79534
Am79534/Am79535
BGND
BGND
RINGOUT
TESTOUT
QBAT
QBAT
SLIC Products
16854C-03
9
SWITCHING CHARACTERISTICS
Am79534/Am79535
Symbol
tgkde
Parameter
Test Conditions
E1 Low to DET High (E0 = 1)
E1 Low to DET Low (E0 = 1)
Ground-key Detect state
RL open, RG connected
(See Figure H)
Temperature
Range
Min
Typ
Max
0°C to +70°C
–40°C to +85°C
3.8
4.0
0°C to +70°C
–40°C to +85°C
1.1
1.6
0°C to +70°C
–40°C to +85°C
1.1
1.6
tgkdd
E0 High to DET Low (E1 = 0)
tgkd0
E0 Low to DET High (E1 = 0)
0°C to +70°C
–40°C to +85°C
3.8
4.0
tshde
E1 High to DET Low (E0 = 1)
0°C to +70°C
–40°C to +85°C
1.2
1.7
0°C to +70°C
–40°C to +85°C
3.8
4.0
0°C to +70°C
–40°C to +85°C
1.1
1.6
0°C to +70°C
–40°C to +85°C
3.8
4.0
E1 High to DET High (E0 = 1)
tshdd
E0 High to DET Low (E1 = 1)
tshd0
E0 Low to DET High (E1 = 1)
10
Switchhook Detect state
RL = 600 Ω, RG open
(See Figure G)
Am7953X Data Sheet
Unit
Note
µs
4
SWITCHING WAVEFORMS
Am79534/Am79535
E1 to DET
E1
DET
tgkde
tshde
tgkde
tshde
E0 to DET
E1
E0
DET
tshdd
Note:
All delays measured at 1.4 V level.
tshd0
tgkdd
tgkd0
16854C-02
Notes:
1. Unless otherwise noted, test conditions are BAT = –48 V, VCC = +5 V, VEE = –5 V, RL = 600 Ω, CHP = 0.22 µF,
RDC1 = RDC2 = 31.25 kΩ, CDC = 0.1 µF, RD = 51.1 kΩ, no fuse resistors, two-wire AC output impedance, programming
impedance (ZT) = 600 kΩ resistive, receive input summing impedance (ZRX) = 300 kΩ resistive. (See Table 2 for component
formulas.)
2. Overload level is defined when THD = 1%.
3. Balance return signal is the signal generated at VTX by VRX. This specification assumes the two-wire AC load impedance
matches the impedance programmed by ZT.
4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. These tests are performed with a longitudinal impedance of 90 Ω and metallic impedance of 300 Ω for frequencies below
12 kHz and 135 Ω for frequencies greater than 12 kHz. These tests are extremely sensitive to circuit board layout.
6. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
7. When the SLIC is in the Anti-sat 2 operating region, this parameter is degraded. The exact degradation depends on system
design. The Anti-sat 2 region occurs at high loop resistances when |VBAT| – |VAX – VBX| is less than approximately 11 V.
8. “Midpoint” is defined as the connection point between two 300 Ω series resistors connected between A(TIP) and B(RING).
9. Fundamental and harmonics from 256 kHz switch-regulator chopper are not included.
10. Assumes the following ZT network:
300 kΩ
300 kΩ
VTX
RSN
30 pF
SLIC Products
11
11. Tested with 0 Ω source impedance. 2 MΩ is specified for system design purposes only.
12. Group delay can be reduced considerably by using a ZT network such as that shown in Note 10 above. The network reduces
the group delay to less than 2 µs. The effect of group delay on linecard performance may be compensated for by using
QSLAC™ or DSLAC™ devices.
Table 1. SLIC Decoding
DET Output (E0 = 1*)
State
C3 C2 C1
Two-Wire Status
E1 = 0
E1 = 1
0
0
0
1
Open Circuit
Ring trip
Ring trip
1
0
0
1
Ringing
Ring trip
Ring trip
2
0
1
0
Active
Loop detector
Ground key
3
0
1
1
On-hook TX (OHT)
Loop detector
Ground key
4
1
0
0
Tip Open
Loop detector
—
5
1
0
1
Reserved
Loop detector
—
6
1
1
0
Active Polarity Reversal
Loop detector
Ground key
7
1
1
1
OHT Polarity Reversal
Loop detector
Ground key
Note:
* For the Am79534 and Am79535, a logic Low on E0 disables the DET output into the open-collector state.
12
Am7953X Data Sheet
Table 2.
User-Programmable Components
ZT = 1000 ( Z2WIN – 2R F )
Where ZT is connected between the VTX and RSN pins. The
fuse resistors are RF, and Z2WIN is the desired 2-wire AC input
impedance. When computing ZT, the internal current amplifier
pole and any external stray capacitance between VTX and
RSN must be taken into account.
ZL
1000 • Z T
ZRX = ------------ • ----------------------------------------------------G 42L Z T + 1000 ( Z L + 2RF )
Where ZRX is connected from VRX to the RSN pin, ZT is
defined above, and G42L is the desired receive gain.
2500
RDC1 + R DC2 = -------------IFEED
Where RDC1, RDC2, and CDC form the network connected to
the RDC pin. RDC1 and RDC2 are approximately equal.
RDC1 + R DC2
CDC = 1.5 ms • --------------------------------R DC1 • R DC2
365
RD = --------- ,
IT
0.5 ms
CD = ---------------RD
Where RD and CD form the network connected from RD to –5 V
and IT is the threshold current between on hook and off hook.
SLIC Products
13
DC FEED CHARACTERISTICS
5
3
2
4
VBAT = –50 V
VBAT = –47.3 V
2
1
Active state
OHT state
RDC = 62.5 kΩ
Notes:
1. Constant-current region:
Active state:
2500
IL = -----------R DC
OHT state:
1 2500
IL = --- • -----------2 R DC
2. Anti-sat turn-on (Active state):
Anti-sat –1:
V AB = 29.95 V
Anti-sat –2:
V AB = 1.082 V BAT – 15.149
3. Open Circuit voltage (Active state):
V AB = 0.9 V BAT – 4.995,
V BAT < 56.9 V
V BAT ≥ 56.9 V
V AB = 46.25 V,
4. Anti-sat –1 region:
R DC
V AB = 46.25 – I L ------------150.6
5. Anti-sat –2 region:
R DC
V AB = 0.9 V BAT – 4.995 – IL -----------1128
a. VA–VB (VAB) Voltage vs. Loop Current (Typical)
14
Am7953X Data Sheet
DC FEED CHARACTERISTICS (continued)
RDC = 62.5 kΩ
VBAT = –47.3 V
b. Loop Current vs. Load Resistance (Typical)
A
RSN
a
RL
IL
RDC1
SLIC
b
RDC2
CDC
RDC
B
Feed current programmed by RDC1 and RDC2
c. Feed Programming
Figure 1.
DC Feed Characteristics
SLIC Products
15
TEST CIRCUITS
A(TIP)
A(TIP)
VTX
RL
VTX
SLIC
2
SLIC
AGND
VL
AGND
RT
VAB
RL
RL
RT
VAB
RRX
RRX
2
RSN
RSN
B(RING)
VRX
B(RING)
IL2-4 = –20 log (VTX / VAB)
IL4-2 = –20 log (VAB / VRX)
BRS = 20 log (VTX / VRX)
A. Two- to Four-Wire Insertion Loss
1
ωC
B. Four- to Two-Wire Insertion Loss and Balance Return Signal
900 Ω
<< RL
A(TIP)
A(TIP)
RL
2
S1
VTX
VTX
R
SLIC
C
SLIC
IDC
AGND
VL
RT
VAB
VL
S2
RL
2
VS
AGND
VM
RRX
R
RSN
B(RING)
RT
RSN
ZIN
VRX
B(RING)
S2 Open, S1 Closed:
L-T Long. Bal. = 20 log (VAB / VL)
L-4 Long. Bal. = 20 log (VTX / VL)
S2 Closed, S1 Open:
Note:
ZD is the desired impedance (e.g., the
characteristic impedance of the line).
RL = –20 log (2 VM / VS)
4-L Long. Sig. Gen. = 20 log (VL / VRX)
C. Longitudinal Balance
16
D. Two-Wire Return Loss Test Circuit
Am7953X Data Sheet
RRX
TEST CIRCUITS (continued)
68 Ω
C
RL
A(TIP)
A(TIP)
SM
56 Ω
RL
IDC
SLIC
B(RING)
SE
RE
B(RING)
1
ωC
<< 90 Ω
68 Ω
C
Current Feed or Ground Key
E. Single-Frequency Noise
F. Ground-Key Detection
VCC
6.2 kΩ
A(TIP)
A(TIP)
DET
15 pF
RL = 600 Ω
RG = 2 kΩ
E0
B(RING)
B(RING)
E1
H. Ground-Key Switching
G. Loop-Detector Switching
SLIC Products
17
PHYSICAL DIMENSION
PL032
.447
.453
.485
.495
.009
.015
.585
.595
.042
.056
.125
.140
Pin 1 I.D.
.080
.095
.547
.553
SEATING
PLANE
.400
REF.
.490
.530
.013
.021
.050 REF.
.026
.032
TOP VIEW
SIDE VIEW
16-038FPO-5
PL 032
DA79
6-28-94 ae
REVISION SUMMARY
Revision B to Revision C
•
Minor changes to the data sheet style and format were made to conform to AMD standards.
•
Connection Diagrams—Changed pin 29 from TP to RSVD in the Am79534 diagram.
Revision C to Revision D
•
In Table 1, SLIC Decoding, the Open Circuit state of 001 was changed to 000.
•
In Pin Description table, inserted/changed TP pin description to: “Thermal pin. Connection for heat dissipation.
Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the TP
pins can connect to an area of copper on the board to enhance heat dissipation.”
•
Minor changes to the data sheet style and format were made to conform to AMD standards.
Revision D to Revision E
•
The physical dimension (PL032) was added to the Physical Dimension section.
•
Deleted the Ceramic DIP and Plastic DIP parts (Am79530 and Am79531) and references to them.
•
Updated Pin Desciption to correct inconsistencies.
18
Am7953X Data Sheet
The contents of this document are provided in connection with Advanced Micro Devices, Inc. ("AMD") products. AMD makes no representations
or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in AMD’s Standard Terms and Conditions of Sale, AMD assumes no
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AMD’s products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the
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situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make
changes to its products at any time without notice.
© 1999 Advanced Micro Devices, Inc.
All rights reserved.
Trademarks
AMD, the AMD logo and combinations thereof are trademarks of Advanced Micro Devices, Inc.
Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
SLIC Products
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