Am7946 Subscriber Line Interface Circuit DISTINCTIVE CHARACTERISTICS Ideal for long loop applications On-hook transmission –40 V to –58 V battery operation On-hook transmission Internal VEE regulator Low standby power On-chip Thermal Management (TMG) feature Scaled line voltage (VAB) output Logic selectable for 2.2 V metering or long loop feed Two-wire impedance set by scaled external impedance Programmable constant-current feed Programmable loop-detect threshold Current gain = 500 Ground-key detector Tip Open state for ground-start lines Polarity reversal option available Three on-chip relay drivers and snubber circuits (32-PLCC only) BLOCK DIAGRAM TMG DA DB A(TIP) RINGOUT Ring Relay Driver RYOUT2 RYE HPA Ring-Trip Detector Two-Wire Interface HPB Relay Driver Ground-Key Detector Off-hook Detector Input Decoder and Control D1 D2 C1 C2 C3 E1 DET RD B(RING) VBAT BGND Signal Transmission VTX RSN Power-Feed Controller RSG RDC CAS VDC OVH VCC VNEG AGND/DGND Publication# 080154 Rev: D Issue Date: October 1999 Amendment: /0 ORDERING INFORMATION Standard Products Legerity standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below. Am7946 –1 J C TEMPERATURE RANGE C = Commercial (0°C to 70°C)* PACKAGE TYPE J = 32-pin Plastic Leaded Chip Carrier (PL 032) PERFORMANCE GRADE OPTION –1 = 52 dB Longitudinal Balance, Polarity Reversal –2 = 63 dB Longitudinal Balance, Polarity Reversal –3 = 52 dB Longitudinal Balance, No Polarity Reversal –4 = 63 dB Longitudinal Balance, No Polarity Reversal DEVICE NUMBER/DESCRIPTION Am7946 Subscriber Line Interface Circuit Valid Combinations –1 –2 Am7946 –3 –4 JC Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local Leger ity sales office to confir m availability of specific valid combinations, to check on newly released combinations, and to obtain additional data on Legerity’s standard military– grade products. Note: * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterization and periodic sampling of production units. 2 Am7946 Data Sheet CONNECTION DIAGRAMS Top View VCC NC BGND B(RING) A(TIP) 4 3 2 1 32 31 30 DB RINGOUT 32-Pin PLCC 6 28 RD RYOUT2 7 27 HPB TMG 8 26 HPA VBAT 9 25 VTX D1 10 24 VNEG E1 11 23 RSN C3 12 22 AGND/DGND C2 13 21 RDC 16 17 18 19 20 VDC 15 OVH 14 CAS RYE RSG DA D2 29 C1 5 DET RYOUT1 Notes: 1. Pin 1 is marked for orientation. 2. NC = No Connect SLIC Products 3 PIN DESCRIPTIONS 4 Pin Names Type Description AGND/DGND Gnd A(TIP) Output BGND Gnd B(RING) Output Output of B(RING) power amplifier. C3–C1 Inputs Decoder. SLIC control pins. C3 is MSB and C1 is LSB. TTL compatible. CAS Capacitor D2–D1 Input Relay Driver Control. D2–D1 control the relay drivers RYOUT1 and RYOUT2. A logic Low on D1 activates the RYOUT1 relay driver. A logic Low on D2 activates the RYOUT2 relay driver. TTL compatible. DA Input Ring-Trip Negative. Negative input to ring-trip comparator. DB Input Ring-Trip Positive. Positive input to ring-trip comparator. DET Output Switchhook Detector. When enabled, a logic Low indicates that a selected condition is detected. The detect condition is selected by the logic inputs (C3–C1 and E1). The output is open collector with a built-in 15 kΩ pull-up resistor. E1 Input Ground-Key enable. A logic High selects the off-hook detector. A logic Low selects the ground-key detector. TTL compatible. HPA Capacitor High-pass filter capacitor. A(TIP) side of the high-pass filter capacitor. HPB Capacitor High-pass filter capacitor. B(RING) side of the high-pass filter capacitor. OVH Input RD Resistor Detect resistor. Detector threshold set and filter pin. RDC Resistor DC feed resistor. Connection point for the DC feed current programming network. The other end of the network connects to the receiver summing node (RSN). The sign of VRDC is negative for normal polarity and positive for reverse polarity. RINGOUT Output Ring relay driver. Open collector driver with emitter internally connected to BGND. This is activated in the ringing state. RSG Input Saturation guard. A resistor from this pin to ground allows the saturation cut in voltage to be increased while maintaining AC transmission overhead voltage. RSN Input Receive summing node. The metallic current (both AC and DC) between A(TIP) and B(RING) is equal to 500 times the current into this pin. The networks which program receive gain, two-wire impedance, and feed resistance all connect to this node. RYE Output Common emitter of RYOUT1/2. Emitter output of RYOUT1 and RYOUT2. Normally connected to relay ground. RYOUT1, RYOUT2 Output (Option) Relay/Switch driver. Open collector driver with emitter internally connected to RYE. TMG — Thermal management. An external resistor connects between this pin and VBAT to offload power dissipation from the Am7946 SLIC. Functions during Normal Polarity and Reverse Polarity states. VBAT Battery Battery supply and connection to substrate. VCC Power +5 V power supply. VDC Output Scaled VAB output. VDC = |(VAB / 20)|. Range of 0 V to 2.5 V. This output is filtered by CHP. VNEG Power –4.75 V to VBAT negative supply. This pin is the return for the internal VEE regulator. VTX Output Transmit audio. The voltage at this output is equal to the metallic voltage across A(TIP) and B(RING). VTX also sources the two-wire input impedance programming network. Analog and digital ground. Output of A(TIP) power amplifier. Battery (power) ground. Anti-Saturation pin for capacitor to filter reference voltage when operating in antisaturation region. Overhead voltage control. A logic High enables nonmetering overhead. A logic Low enables 2.2 V metering DC overhead. TTL compatible. Am7946 Data Sheet ABSOLUTE MAXIMUM RATINGS OPERATING RANGES Storage temperature ......................... –55°C to +150°C Commercial (C) Device VCC with respect to AGND/DGND ..... –0.4 V to +7.0 V Ambient temperature .............................0°C to +70°C* VNEG with respect to AGND/DGND ...... +0.4 V to VBAT VCC ................................................ +4.75 V to +5.25 V VBAT with respect to AGND/DGND: VNEG ................................................... –4.75 V to VBAT Continuous..................................... +0.4 V to –80 V 10 ms ............................................. +0.4 V to –85 V BGND with respect to AGND/DGND........ +3 V to –3 V A(TIP) or B(RING) to BGND: VBAT ......................................................–40 V to –58 V AGND/DGND .......................................................... 0 V BGND with respect to AGND/DGND....................... –100 mV to +100 mV Continuous ....................................... –70 V to +1 V 10 ms (f = 0.1 Hz) ............................ –70 V to +5 V 1 µs (f = 0.1 Hz) ............................... –80 V to +8 V 250 ns (f = 0.1 Hz) ......................... –90 V to +12 V Load resistance on VTX to ground .............. 20 kΩ min Current from A(TIP) or B(RING) ....................... ±150 mA * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterization and periodic sampling of production units. RINGOUT or RYOUT1 or RYOUT2 current.......75 mA RINGOUT voltage ................................. BGND to +7 V The Operating Ranges define those limits between which the functionality of the device is guaranteed. RINGOUT transient............................. BGND to +10 V RYE voltage ..........................................BGND to VBAT RYOUT1 or RYOUT2 voltage .................. RYE to +7 V RYOUT1 or RYOUT2 transient .............. RYE to +10 V DA and DB inputs Voltage on ring-trip inputs ..................... VBAT to 0 V Current into ring-trip inputs ............................ ±10 mA C3–C1, D2–D1, E1, OVH Input voltage .........................–0.4 V to VCC + 0.4 V Maximum power dissipation, continuous, TA = 85°C, No heat sink (See note): In 32-pin PLCC package..............................1.33 W Thermal Data ................................................................. θJA In 32-pin PLCC package....................... 45°C/W typ Note: Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165°C. The device should never see this temperature and operation above 145°C junction temperature may degrade device reliability. See th e S LIC Pack aging Co nsiderati ons for more information. Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. SLIC Products 5 ELECTRICAL CHARACTERISTICS Description Test Conditions (See Note 1) VVTX, Analog output offset voltage 0°C to +70°C –40°C to +85°C Min Typ –35 –40 Overload level, 2-wire Active state, OVH = High 2.5 Overload level, 2-wire Active state, OVH = Low 6.0 Overload level On hook, RLAC = 600 Ω, OVH = High 1.06 Total Harmonic Distortion (THD) 0 dBm +7 dBm THD, On hook 0 dBm, RLAC = 600 Ω –64 –55 Max Unit Note +35 +40 mV — 4 Vpk 2a Vrms 2b –50 –40 dB –36 5 Longitudinal Performance (See Test Circuit C) Longitudinal to metallic L-T, L-4 balance 200 Hz to 1 kHz: –1, –3* 52 Normal polarity Reverse polarity Normal polarity, –40°C to +85°C –2, –4 –2 –2, –4 63 58 58 1 kHz to 3.4 kHz: –1, –3* 52 Normal polarity Reverse polarity Normal polarity, –40°C to +85°C –2, –4 –2 –2, –4 58 54 54 4 dB 4 Longitudinal signal generation 4-L 200 Hz to 800 Hz normal polarity 40 Longitudinal current per pin (A or B) Active or OHT state 27 Longitudinal impedance at A or B 0 to 100 Hz 35 mArms 10 35 Ω/pin Idle Channel Noise C-message weighted noise RLDC = 600 Ω RLDC = 600 Ω +25°C to +85°C –40°C to +25°C +7 +10 +12 dBrnC — 4 Psophometric weighted noise RLDC = 600 Ω RLDC = 600 Ω +25°C to +85°C –40°C to +25°C –83 –80 –78 dBmp — 4 Insertion Loss and Balance Return Signal (See Test Circuits A and B) Gain accuracy 2- to 4-wire, 4- to 4-wire 0 dBm, 1 kHz, nonmetering 0 dBm, 1 kHz, 2.2 V metering On hook, OHT –6.22 –6.12 –6.37 –6.02 –5.92 –6.02 –5.82 –5.72 –5.67 Gain accuracy 4- to 2-wire 0 dBm, 1 kHz, nonmetering 0 dBm, 1 kHz, 2.2 V metering On hook, OHT –0.20 –0.20 –0.35 0 0 0 +0.20 +0.20 +0.35 Gain accuracy over frequency 300 to 3400 Hz relative to 1 kHz 0°C to +70°C –40°C to +85°C –0.10 –0.15 +0.10 +0.15 Gain tracking Relative to 0 dBm +3 dBm to –55 dBm 0°C to +70°C –40°C to +85°C –0.10 –0.15 +0.10 +0.15 4 4 Gain tracking, on hook, OHT Relative to 0 dBm 0 dBm to –37 dBm 0°C to +70°C –40°C to +85°C –0.10 –0.15 –0.35 +0.10 +0.15 +0.35 4 4 4 +3 dBm to 0 dBm Group delay 0 dBm, 1 kHz 3 Note: * Performance Grade 6 Am7946 Data Sheet 4 dB µs 4 4 4, 6 ELECTRICAL CHARACTERISTICS (continued) Line Characteristics IL, Loop-current accuracy IL in constant-current region IL, Long loops, Active state RLDC = 1840 Ω, VBAT = –50 V, OVH = Low 20.5 RLDC = 2030 Ω, VBAT = –50 V, OVH = High 20.5 IL, Accuracy, Standby state V BAT – 3 V I L = -------------------------------R L + 400 0.8IL IL 1.085IL IL 1.2IL mA TA = 25°C Constant-current region ILLIM 0.915IL 16 Active, A and B to ground OHT, A and B to ground 22 39 100 50 130 4 IL, Open Circuit state RL = 0 Ω 100 IA, pin A leakage, Tip Open state RL = 0 Ω 100 IB, pin B current, Tip Open state B to ground B to VBAT + 6 V VA, Standby state, ground-start signaling A to –48 V = 7 kΩ, B to ground = 100 Ω –7.5 VAB, Open Circuit voltage BAT = –50 V 42.75 26 15 µA mA –5 4 V 44.5 8 Power Supply Rejection Ratio (VRIPPLE = 100 mVrms), Active Normal State VCC 50 Hz to 3.4 kHz 30 40 VNEG 50 Hz to 3.4 kHz 30 50 VBAT 50 Hz to 3.4 kHz 28 55 Effective internal resistance CAS pin to ground 85 170 255 30 70 dB 5 kΩ 4 Power Dissipation On hook, Open Circuit state On hook, Standby state 60 85 On hook, OHT state 120 180 180 270 860 1300 RL = 300 Ω, RTMG = 2.5 kΩ 550 800 ICC, On-hook VCC supply current Open Circuit state Standby state OHT state Active normal state 2.7 3.3 4.9 6.3 3.8 4.4 7.5 8.5 INEG, On-hook VNEG supply current Open Circuit state Standby state OHT state Active normal state 0 0 0.70 0.70 0.1 0.1 1.1 1.1 IBAT, On-hook VBAT supply current Open Circuit state Standby state OHT state Active normal state 0.35 1.0 1.9 3.0 1.0 1.5 4.7 5.7 On hook, Active state RTMG = 2.5 kΩ Off hook, Standby state Off hook, Active state mW Supply Currents, Battery = –58 V mA RFI Rejection RFI rejection 100 kHz to 30 MHz, (See Figure F) SLIC Products 1.0 mVrms 4 7 ELECTRICAL CHARACTERISTICS (continued) Logic Inputs (C3–C1, D2–D1, E1, OVH) VIH, Input High voltage VIL, Input Low voltage 2.0 IIH, Input High current IIL, Input Low current –75 –400 0.8 Logic Output (DET) VOL, Output Low voltage IOUT = 10 mA VOL, Output Low voltage VOH, Output High voltage IOUT = 0.8 mA IOUT = –0.1 mA Source resistance = 2 MΩ IT, Loop-detect threshold RD = 35.4 kΩ, Active state RD = 35.4 kΩ, Standby state –50 –50 0 +50 mV 330/RD 380/RD 375/RD 430/RD 420/RD 480/RD mA 5 10 2 Ground-key current threshold B to ground Relay Driver Output (RYOUT1, RYOUT2, and RINGOUT) VOH = +5 V IZ = 100 µA Zener On voltage (each output) IZ = 30 mA V –500 Ground-Key Detector Thresholds Ground-key resistive threshold B to ground IOH, Off leakage (each output) Zener breakover (each output) 0.40 2.4 Offset voltage Loop Detector IOL = 30 mA IOL = 40 mA µA 1.0 Ring-Trip Detector Input (DA, DB) Bias current VOL, On voltage (each output) VOL, On voltage (each output) 40 V nA 10 +0.25 +0.35 6.6 7.9 11 6 kΩ mA +0.4 +0.6 V 100 µA 4 V RELAY DRIVER SCHEMATICS RYOUT2 RYOUT1 RINGOUT RYE BGND 8 BGND Am7946 Data Sheet BGND Notes: 1. Unless otherwise noted, test conditions are BAT = –52 V, VCC = +5 V, VNEG = –5 V, RL = 600 Ω, RDC1 = RDC2 = 28.4 kΩ, RD = 35.4 kΩ, RSG = 0 Ω to GND, RTMG = 2.5 kΩ, no fuse resistors, CHP = 0.22 µF, CDC = 0.1 µF, CCAS = 0.1 µF, D1 = 1N400x, two-wire AC input impedance is a 600 Ω resistance synthesized by the programming network shown below. VTX RT1 = 75 kΩ RT2 = 75 kΩ CT1 = 125 pF ~ RSN RRX = 150 kΩ VRX 2. a. Overload level is defined when THD = 1%. b. Overload level is defined when THD = 1.5%. 3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire AC load impedance matches the programmed impedance. 4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 5. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization. 6. Tested with 0 Ω source impedance. 2 MΩ is specified for system design only. 7. Group delay can be greatly reduced by using a ZT network such as that shown in Note 1 above. The network reduces the group delay to less than 2 µs and increases 2WRL. The effect of group delay on linecard performance also may be compensated for by synthesizing complex impedance with the QSLAC™ or DSLAC™ device. 8. If |BAT| drops below 50 V, the VAB voltage tracks the battery to preserve transmission capability. Open-circuit VAB can be modified using RSG. Table 1. SLIC Decoding (DET) Output State C3 C2 C1 Two-Wire Status E1 = 1 E1 = 0 0 0 0 0 Open Circuit Ring trip Ring trip 1 0 0 1 Ringing Ring trip Ring trip 2 0 1 0 Active Loop detector Ground key 3 0 1 1 On-hook TX (OHT) Loop detector Ground key 4 1 0 0 Tip Open Loop detector Ground key 5 1 0 1 Standby Loop detector Ground key 6 1 1 0 Active Polarity Reversal Loop detector Ground key 7 1 1 1 OHT Polarity Reversal Loop detector Ground key Note: Only –1 and –2 performance grade devices support polarity reversal. SLIC Products 9 Table 2. User-Programmable Components Z T = ( 250 ( Z2WIN – 2R F ) ) ZT is connected between the VTX and RSN pins. The fuse resistors are RF and Z2WIN is the desired 2-wire AC input impedance. When computing Z T, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account. 500Z T ZL - • ------------------------------------------------Z RX = ---------G 42L Z T + 250 ( Z L + 2R F ) ZRX is connected from VRX to RSN. ZT is defined above, and G42L is the desired receive gain. RDC1, RDC2, and CDC form the network connected to the RDC pin. RDC1 and RDC2 are approximately equal. IL is the desired loop current in the constant-current region. 1250 R DC1 + R DC2 = -----------IL R DC1 + R DC2 C DC = 1.5 ms • -------------------------------R DC1 R DC2 RD and CD form the network connected from RD to GND and IT is the threshold current between on hook and off hook. 375 0.5 ms R D = ---------, C D = ----------------IT RD CCAS is the filter regulator filter capacitor and fc is the desired filter cutoff frequency. 1 C CAS = ----------------------------5 3.4 • 10 π f c Thermal Management Equations (Normal Active, Polarity Reverse Active, and Tip Open States) RTMG is connected from TMG to VBAT and is used to limit power dissipation within the SLIC in Active and Tip Open states only. V BAT – 6 V R TMG ≥ ------------------------------IL Power dissipated in the resistor, RTMG, during Active and Tip Open states. 2 P RTMG ( V BAT – 6 V – I L • R L ) = ---------------------------------------------------------------R TMG P SLIC = V BAT • I L – P RTMG – R L ( I L ) 2 + 0.12W 10 Power dissipated in the SLIC while in Active and Tip Open states. Am7946 Data Sheet DC FEED CHARACTERISTICS 60 3 50 2 40 VAB (volts) 30 1 20 10 0 10 20 30 IL (mA) RDC = RDC1 + RDC2 = 56.8 kΩ Notes: 1. V BAT < 48 V , OVH = 1 1250 VAB 1 = ------------ • R L R DC 1250 VAB 1 = ------------ • R L RDC R DC VAB 2 = 0.818 • V BAT + 5.356 – I L • ----------369 VAB 3 = 0.818 • V BAT 2. V BAT < 52 V , OVH = 0 R DC + 2.740 – I L • ----------359 R DC VAB 2 = 0.818 • V BAT + 5.356 – I L • ----------369 R DC VAB 3 = 0.818 • V BAT + 2.740 – I L • ----------359 V BAT ≥ 48 V, OVH = 1 1250 VAB 1 = ------------ • R L RDC VAB 2 = 0.818 • V BAT æ 35500 ö 18587 + ç RSG + -----------------------------÷ è V BAT – 48ø R DC – 2.276 – I L • ----------- + ----------------------------------------------------------------------------------------369 æ 35500 ö 1777 + 0.131 • ç R SG + -----------------------------÷ è V BAT – 48ø VAB 3 = 0.818 • V BAT æ 35466 ö 18587 + ç RSG + -----------------------------÷ è V BAT – 48ø R DC – 4.894 – I L • ----------- + ----------------------------------------------------------------------------------------359 æ 35466 ö 1777 + 0.131 • ç R SG + -----------------------------÷ è V BAT – 48ø a. Load Line (Typical) SLIC Products 11 DC FEED CHARACTERISTICS (continued) 3. V BAT ≥ 52 V, OVH = 0 1250 VAB 1 = ------------ • R L where R L = R LOAD + R FUSE RDC VAB 2 = 0.904 • V BAT æ 174000 ö 18587 + ç R SG + -----------------------------÷ è V BAT – 48ø RDC – 11.031 – I L • ---------- + ----------------------------------------------------------------------------------------369 æ 174000 ö 1777 + 0.131 • ç RSG + -----------------------------÷ è V BAT – 48ø VAB 3 = 0.904 • V BAT æ 174000 -ö 18587 + ç R SG + ---------------------------÷ è V BAT – 48ø RDC – 13.649 – I L • ----------- + ----------------------------------------------------------------------------------------359 æ 174000 -ö 1777 + 0.131 • ç RSG + ---------------------------÷ è V BAT – 48ø A RSN a RL SLIC IL RDC2 b CDC B RDC1 RDC Feed current programmed by RDC1 and RDC2 b. Feed Programming Figure 1. DC Feed Characteristics 12 Am7946 Data Sheet TEST CIRCUITS A(TIP) VTX RL 2 SLIC VAB VL AGND RL RT RRX 2 B(RING) RSN IL2-4 = 20 log (VTX / VAB) A. Two- to Four-Wire Insertion Loss A(TIP) VTX SLIC VAB RL AGND RT RRX B(RING) RSN VRX IL4-2 = 20 log (VAB / VRX) BRS = 20 log (VTX / VRX) B. Four- to Two-Wire Insertion Loss and Balance Return Signal 1 ωC RL S1 VTX A(TIP) << RL C SLIC 2 VL VL VAB AGND RT RL S2 2 B(RING) RSN S2 Open, S1 Closed L-T Long. Bal. = 20 log (VAB / VL) RRX VRX S2 Closed, S1 Open 4-L Long. Sig. Gen. = 20 log (VL / VRX) L-4 Long. Bal. = 20 log (VTX / VL) C. Longitudinal Balance SLIC Products 13 TEST CIRCUITS (continued) ZD A(TIP) R VTX RT1 SLIC VS VM R AGND ZIN CT1 RT2 B(RING) RSN ZD: The desired impedance; e.g., the characteristic impedance of the line RRX Return loss = –20 log (2 VM / VS) D. Two-Wire Return Loss Test Circuit A(TIP) B(RING) RG E. Ground-Key Switching L1 C1 200 Ω RF1 50 Ω A RF2 200 Ω HF GEN 1.5 Vrms 80% Amplitude Modulated 100 kHz to 30 MHz 14 CAX 33 nF 50 Ω B 50 Ω L2 C2 CBX 33 nF VTX SLIC under test F. RFI Test Circuit Am7946 Data Sheet TEST CIRCUITS (continued) +5 V DA DB CD VTX VTX A(TIP) HPA CHP RT RSN HPB B(RING) B(RING) 2.2 nF RRX VRX RDC1 RDC2 RDC RINGOUT RYOUT1 RYOUT2 RYE BGND VNEG –5 V VBAT D1 TMG 0.1 µF RD RD 2.2 nF A(TIP) BAT VCC RTMG VDC CDC AGND/ DGND D1 D2 E1 C3 C2 C1 DET OVH RSG CAS BATTERY GROUND ANALOG GROUND CCAS DIGITAL GROUND G. Am7946 Test Circuit SLIC Products 15 PHYSICAL DIMENSION PL032 .447 .453 .485 .495 .009 .015 .585 .595 .042 .056 .125 .140 Pin 1 I.D. .080 .095 .547 .553 SEATING PLANE .400 REF. .490 .530 .013 .021 .050 REF. .026 .032 TOP VIEW SIDE VIEW 16-038FPO-5 PL 032 DA79 6-28-94 ae REVISION SUMMARY Revision A to B • Minor changes were made to the data sheet style and format to conform to Legerity standards. Revision B to Revision C • In Table 2, User-Programmable Components, added “Polarity Reverse Active” to the “Thermal Management...” header. • Minor changes were made to the data sheet style and format to conform to Legerity standards. Revision C to Revision D • The physical dimension (PL032) was added to the Physical Dimension section. • Updated the Pin Description table to correct inconsistencies. 16 Am7946 Data Sheet Notes: www.legerity.com Legerity provides silicon solutions that enhance the performance, speeds time-to-market, and lowers the system cost of our customers' products. By combining process, design, systems architecture, and a complete set of software and hardware support tools with unparalleled factory and worldwide field applications support, Legerity ensures its customers enjoy a smoother design experience. It is this commitment to our customers that places Legerity in a class by itself. The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in Legerity's Standard Terms and Conditions of Sale, Legerity assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. Legerity's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of Legerity's product could create a situation where personal injury, death, or severe property or environmental damage may occur. Legerity reserves the right to discontinue or make changes to its products at any time without notice. © 1999 Legerity, Inc. All rights reserved. Trademarks Legerity, the Legerity logo and combinations thereof, QSLAC and DSLAC are trademarks of Legerity, Inc. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. P.O. 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