ICs for Audio Common Use AN12942B Audio signal processing IC for notebook PC Overview AN12942B is an one-chip IC for the stereo speakers which can output 1 W by 8 Ω, headphone amplifiers, line amplifiers, and electronic volumes. The AGC circuit is built-in to prevent the resonance or the vibration by the speaker’s energy and the clipping distortion what is called "broken up sound". Also the AN12942B is built-in power saving on/off function automatically detecting input signal to save the power of speaker amplifier. Features • Speaker amplifier 1 W × 2-channel: 8 Ω, VCC = 5 V • Built-in AGC circuit Prevention of the resonance or the vibration due to the speaker and the clipping distortion by AGC at excessive input signal (with AGC on/off switch). • Built-in automatic power saving function. It detects input signals and switches on/off (with the on/off switch for the auto power saving). • Built-in headphone amplifier and line amplifier Applications • Notebook PC Package • Dual surface implementing package (HSOP056-P-0300A) Type • Silicon monolithic bipolar IC Publication date: June 2003 SDC00047AEB 1 AN12942B Out-L-ch. (Line) −9.17 dBV 1 µF Out-R-ch. (Line) 1 µF −9.17 dBV 1 µF Line mute STBY 1 MΩ Switch B VCC 0.47 µF Beep in Switch A 1.1 times 29 28 1.1 times 30 27 GND 26 Line mute 31 32 Standby 25 33 24 34 1 µF HP power save HP mute 220 k + 100 µF 1 µF 10 µF 0.47 µF 0.47 µF 1 µF EVR 41 GND 42 VCC SP save on/off 330 kΩ −2 dBV 8Ω L-ch. out −2 dBV Switch B-2 Switch B-1 Switch A-3 Switch A-2 Switch A-1 19 Offset cancel Power save VREF 18 PRI Charge 17 VCC 16 GND 15 Offset cancel Save CTL 14 13 AGC Offset cancel AGC Control 11 Offset cancel 10 GND 9 Det. Mute 8 Mute Save CTL 14 dB 14 dB 5 4 Power save 54 3 55 2 14 dB VCC_SP 0. 1 µF 10 µF 0. 47 µF 0. 47 µF 0. 47 µF 2 200 pF 100 kΩ 1 µF 0.47 µF AGC on1/on2/off 0. 47 µF 7 SP GND 6 52 53 EVRCTL 10 µF 12 Signal det. 50 SP GND 51 BVREF 20 47 GND 48 56 10 µF −10 dBV EVR 46 49 In-R-ch. (Line,HP) 21 V (SP) 43 REF −13 dBV −3 dB 44 −13 dBV −3 dB 45 Signal automatic detection function on/off VCC 0.47 µF 22 36 37 GND 38 6 dB −4 dBV 39 −4 dBV 40 6 dB 100 µF In-L-ch. (Line,HP) 23 + 35 1 µF −10 dBV 0.47 µF 20 kΩ Application circuit example 14 dB VCC_SP −2 dBV 8Ω R-ch. out −2 dBV 10 µF 1 Supply voltage 5 V SDC00047AEB 2 AN12942B Pin Descriptions Pin No. Pin name Type VCC Description 1 VCC_SP 2 SP_OUT_R+ Output Speaker amplifier R-channel positive phase output (+) 3 SP_OUT_R+ Output Speaker amplifier R-channel positive phase output (+) 4 SP_OUT_R− Output Speaker amplifier R-channel negative phase output (−) 5 SP_OUT_R− Output Speaker amplifier R-channel negative phase output (−) 6 GND_SP GND GND_SP R-channel 7 DETECT_CAP Input Demodulation pin for signal automatic detection 8 AGC_LV 9 GND GND GND 10 AGC_CAP Input AGC demodulation pin 11 DETECT_IN Input Signal input for signal automatic detection 12 DAMP_OUT Output 13 OFFSET_HPR Input Offset cancel pin for headphone R-channel 14 OFFSET_HPL Input Offset cancel pin for headphone L-channel 15 GND GND GND 16 VCC VCC VCC 17 PRI_V Input PRI-charge level pin 18 VREF_IN Input VREF 19 EVR_CTL 20 BVREF 21 Switch A-1 Output Switch A-1 22 Switch A-2 Output Switch A-2 23 Switch A-3 Output Switch A-3 24 Switch B-1 Output Switch B-1 25 Switch B-2 Output Switch B-2 26 GND GND GND 27 INPUT_R Input R-channel input 28 INPUT_L Input L-channel input 29 LINEOUT_L Output Line L-channel output 30 LINEOUT_R Output Line R-channel output 31 LINE_MUTE TTL input Line mute on/off control 32 STANDBY TTL input Standby on/off control 33 Switch B TTL input Switch B 34 BEEP_IN Input TTL input TTL input Input VCC_SP R-channel AGC-on level control Signal automatic detection mix amplifier output EVR control for speaker and headphone Bias in Input for beep signal SDC00047AEB 3 AN12942B Pin Descriptions (continued) Pin No. Pin name Type Description 35 Switch A TTL input Switch A 36 HP_SAVE TTL input Headphone power save control 37 HP_MUTE TTL input Headphone mute on/off control 38 GND 39 HP_OUT_L Output Headphone amplifier L-channel output 40 HP_OUT_R Output Headphone amplifier R-channel output 41 VCC VCC VCC 42 GND GND GND 43 VREF_SP Input VREF_SP 44 SP_IN_R Input Speaker amplifier R-channel input 45 SP_IN_L Input Speaker amplifier L-channel input 46 OFFSET_SPR Input Offset cancel pin for speaker R-channel 47 OFFSET_SPL Input Offset cancel pin for speaker L-channel 48 GND GND GND 49 DETECT_ON TTL input Signal automatic detection on/off control 50 SP_SAVE TTL input Speaker power save control 51 GND_SP GND 52 SP_OUT_L− Output Speaker amplifier L-channel negative phase output (−) 53 SP_OUT_L− Output Speaker amplifier L-channel negative phase output (−) 54 SP_OUT_L+ Output Speaker amplifier L-channel positive phase output (+) 55 SP_OUT_L+ Output Speaker amplifier L-channel positive phase output (+) 56 VCC_SP GND VCC GND GND_SP L-channel VCC_SP L-channel SDC00047AEB 4 AN12942B Absolute Maximum Ratings A No. Parameter Symbol Rating VCC 5.75 VCC_SP 5.75 Unit Note V *1 1 Supply voltage 2 Supply current ICC A 3 Power dissipation PD 517 mW *2 4 Storage temperature Tstg −55 ∼ +150 ºC *3 5 Operating ambient temperature Topr −20 ∼ +75 ºC *3 Unit Note Note) *1: The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2: When using this IC, referring to the technical data in page 17, observe the power dissipation characteristic curve. Be sure to use the IC so that the power dissipation of the IC without heat sink will not exceed 517 mW at Ta = 75ºC. *3: Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25ºC. Operating Supply Voltage Range Parameter Operating supply voltage range Symbol Range VCC 4.50 ∼ 5.50 VCC_SP 4.50 ∼ 5.50 V * Note) *: The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. SDC00047AEB 5 AN12942B Electrical Characteristics at VCC = 5.0 V, VCC_SP = 5.0 V Note) Ta = 25°C±2°C unless otherwise specified. B No. Parameter Symbol Test circuits Conditions Limits Unit Note 70 µA 20.0 27.0 mA 9.3 18.6 mA 21.0 28.0 mA 35 70 µA 14.0 19.0 mA 10 50 µA 0.1 50 µA Min Typ Max 35 Circuit current 1 Circuit current 1A at non-signal (VCC_SP) IT1A 1 2 Circuit current 2A at non-signal (VCC) IT2A 1 3 Circuit current 1B at non-signal (VCC_SP) IT1B 1 4 Circuit current 2B at non-signal (VCC) IT2B 1 5 Circuit current 1C at non-signal (VCC_SP) IT1C 1 6 Circuit current 2C at non-signal (VCC) IT2C 1 7 Standby current 1 at non-signal (VCC_SP) IST1 1 8 Standby current 2 at non-signal (VCC) IST2 1 VCC = 5.00 V, at non-signal, at automatic distinction: on VCC = 5.00 V, at non-signal, SP and HP power save: off, at automatic distinction VCC = 5.00 V, at non-signal, at automatic distinction: off, SP and HP power save: on VCC = 5.00 V, at standby mode Speaker amplifier (RL = 8 Ω): Speaker_input (pin 44, pin 45) → Speaker_output (pin 2 to pin 5, pin 52 to pin 55) 9 Output level L-channel VSPL 1 10 Output level R-channel VSPR 1 11 Output distortion L-channel THSL 1 12 Output distortion R-channel THSR 1 13 Maximum output electric power L-channel VMAXSL 1 14 Maximum output electric power R-channel VMAXSR 1 15 Output noise L-channel VNSL 1 16 Output noise R-channel VNSR 1 17 Channel balance CHBS 1 18 Cross talk in L-channel CTLSLR 1 19 Cross talk in R-channel CTLSRL 1 VIN = −13.0 dBV, f = 1 kHz, RL = 8 Ω 2.0 4.0 6.0 dBV 2.0 4.0 6.0 dBV VIN = −13.0 dBV, f = 1 kHz, RL = 8 Ω, to THD fifth 0.04 0.5 % 0.04 0.5 % 0.7 0.88 W 0.7 0.88 W −76 −67 dBV −76 −67 dBV −1 0 1 dB 70 76 dB 70 76 dB VIN = 1 kHz, THD = 1%, RL = 8 Ω, Rg = 1 kΩ, RL = 8 Ω, A curve filter VIN = −13.0 dBV, f = 1 kHz, RL = 8 Ω VIN = −13.0 dBV, f = 1 kHz, RL = 8 Ω, A curve filter Headphone amplifier (RL = 32 Ω): L-channel, R-channel_input (pin 28, pin 27) → Headphone_output (pin 39, pin 40) 20 Output level L-channel VHPL 1 21 Output level R-channel VHPR 1 22 Channel balance CHBH 1 VIN = −10.0 dBV, RL = 32 Ω Vol = 3.3 V (max), f = 1 kHz VIN = −10.0 dBV, RL = 32 Ω Vol = 3.3 V (max), f = 1 kHz R-ch./L-ch. difference SDC00047AEB −5.0 −4.0 −3.0 dBV −5.0 −4.0 −3.0 dBV −1.0 0.0 1.0 dB 6 AN12942B Electrical Characteristics at VCC = 5.0 V, VCC_SP = 5.0 V (continued) Note) Ta = 25°C±2°C unless otherwise specified. B No. Parameter Symbol Test circuits Conditions Limits Min Typ Max Unit Note Headphone Amplifier (RL = 32 Ω) (continued): L-channel, R-channel_input (pin 28, pin 27) → Headphone_output (pin 39, pin 40) 23 Output distortion L-channel THHL 1 24 Output distortion R-channel THHR 1 25 Maximum input level L-channel VMAHIL 1 26 Maximum input level R-channel VMAHIR 1 27 Maximum output level L-channel VMAHOL 1 28 Maximum output level R-channel VMAHOR 1 29 Output noise L-channel VNHL 1 30 Output noise R-channel VNHR 1 31 Cross talk in L-channel CTLHLR 1 32 Cross talk in R-channel CTLHRL 1 33 Mute attenuation quantity L-channel VMUHL 1 34 Mute attenuation quantity R-channel VMUHR 1 35 Beep output level L-channel BEHL 1 36 Beep output level R-channel BEHR 1 0.03 0.1 % 0.03 0.1 % THD = 1%, RL = 10 kΩ Vol = 1.65 V (typ), f = 1 kHz 0.0 6.0 dBV 0.0 6.0 dBV THD = 1%, RL = 10 kΩ Vol = 3.3 V (max), f = 1 kHz 0.0 2.8 dBV 0.0 2.8 dBV −94 −79 dBV −94 −79 dBV 60 70 dB 60 70 dB 70 90 dB 70 90 dB 0.28 0.58 VPP 0.28 0.58 VPP −32.5 −30.0 −27.5 dBV −32.5 −30.0 −27.5 dBV VOUT = −14 dBV, RL = 32 Ω Vol = 3.3 V (max), f = 1 kHz Rg = 1 kΩ, A curve filter VIN = −10 dBV, RL = 32 Ω f = 10 kHz, A curve filter VIN = −10 dBV, RL = 32 Ω f = 1 kHz, A curve filter VIN = 3.3 VPP, RL = 32 Ω 1 cycle = 1ms Volume part: L-channel, R-channel_input (pin 28, pin 27) → Headphone_output (pin 39, pin 40) 37 Medium voltage gain L-channel VOLL 1 38 Medium voltage gain R-channel VOLR 1 39 Channel balance at the time of the medium gain VCHB 1 40 Volume maximum attenuation quantity L-channel VOLNL 1 41 Volume maximum attenuation quantity R-channel VOLNR 1 VIN = −20 dBV, f = 1 kHz, Vol = 1.65 V (typ) VIN = −20 dBV, f = 1 kHz, Vol = 1.65 V (typ) R-ch./L-ch. Difference VIN = −10 dBV, f = 1 kHz, Vol = 0.0 V (min), A curve filter −2.0 0.0 2.0 dB 70 90 dB 70 90 dB −10.0 −9.2 −8.4 dBV −10.0 −9.2 −8.4 dBV −0.8 0.8 dB Line amplifier part : L-channel, R-channel_input (pin 28, pin 27) → Headphone_output (pin 29, pin 30) 42 Output level L-channel VHLL 1 43 Output level R-channel VHLR 1 44 Channel balance CHBL 1 45 Output distortion L-channel THLL 1 46 Output distortion R-channel THLR 1 47 Maximum output level L-channel VMALL5 1 48 Maximum output level R-channel VMALR5 1 VIN = −10.0 dBV, RL = 10 kΩ, f = 1 kHz VIN = −10.0 dBV, RL = 10 kΩ, f = 1 kHz, R-ch./L-ch. difference 0.0 VIN = −10.0 dBV, RL = 10 kΩ, f = 1 kHz, 0.003 0.03 % 0.003 0.03 % THD = 1%, RL = 10 kΩ f = 1 kHz 0.0 4.0 dBV 0.0 4.0 dBV SDC00047AEB 7 AN12942B Electrical Characteristics at VCC = 5.0 V, VCC_SP = 5.0 V (continued) Note) Ta = 25°C±2°C unless otherwise specified. B No. Parameter Symbol Test circuits Conditions Limits Min Typ Max Unit Note Line amplifier part (continued) : L-channel, R-channel_input (pin 28, pin 27) → Headphone_output (pin 29, pin 30) 49 Output noise L-channel VNLL 1 50 Output noise R-channel VNLR 1 51 Cross talk in L-channel CTLLLR 1 52 Cross talk in R-channel CTLLRL 1 53 Mute attenuation quantity L-channel VMUHL 1 54 Mute attenuation quantity R-channel VMUHR 1 Rg = 1 kΩ, A curve filter VIN = −10 dBV, RL = 10 kΩ f = 10 kHz, A curve filter VIN = −10 dBV, RL = 10 kΩ f = 1 kHz, A curve filter −105 −87 dBV −105 −87 dBV 60 84 dB 60 84 dB 70 87 dB 70 87 dB 4.5 6.0 7.5 dBV 4.5 6.0 7.5 dBV 5.5 7.0 8.5 dBV 5.5 7.0 8.5 dBV Speaker AGC part : Speaker_input (pin 44, pin 45) → Speaker_output (pin 2 to pin 5, pin 52 to pin 55) 55 Speaker amplifier output level L-channel AGC-on1 VAGSPL 1 56 Speaker amplifier output level R-channel AGC-on1 VAGSPR 1 57 Speaker amplifier output level L-channel AGC-on2 VAGSP1L 1 58 Speaker amplifier output level R-channel AGC-on2 VAGSP1R 1 VIN = −3.0 dBV, f = 1 kHz, RL = 8 Ω Automatic signal detection part : L-channel, R-channel_input (pin 28, pin 27) → Signal detection preamplifier output (pin 12) 59 Preamplifier output voltage level L-channel entry VSDTL 1 60 Preamplifier output voltage level R-channel entry VSDTR 1 61 Signal detection limit entry voltage level L-channel VSDTTHL 1 62 Signal detection limit entry voltage level R-channel VSDTTHR 1 VIN = −33 dBV, f = 1 kHz Vol = 1.65 V (typ) VIN = 1 kHz Vol = 1.65 V (typ) −13 −10 −7 dBV −13 −10 −7 dBV −63 −58 −53 dBV −63 −58 −53 dBV Switch switching-over voltage level 63 Headphone mute on HMUON 1 GND 0.8 V 64 Headphone mute off HMUOF 1 2.0 5.5 V 65 Headphone power save on HPSON 1 GND 0.8 V 66 Headphone power save off HPSOF 1 2.0 5.5 V 67 Speaker power save on SPSON 1 GND 0.8 V 68 Speaker power save off SPSOF 1 2.0 5.5 V 69 Standby on STON 1 GND 0.8 V 70 Standby off STOF 1 2.0 5.5 V 71 Line mute on LMUON 1 GND 0.8 V 72 Line mute off LMUOF 1 2.0 5.5 V SDC00047AEB 8 AN12942B Electrical Characteristics at VCC = 5.0 V, VCC_SP = 5.0 V (continued) Note) Ta = 25°C±2°C unless otherwise specified. B No. Parameter Symbol Test circuits Limits Conditions Min Typ Max Unit Note Switch switching-over voltage level (continued) 73 Signal automatic detection feature off ATOF 1 GND 0.8 V 74 Signal automatic detection feature on ATON 1 2.0 5.5 V 75 Speaker-AGC off AGOF 1 GND 0.5 V 76 Speaker-AGC on2 AGON1 1 Open V 77 Speaker-AGC on1 AGON 1 2.5 5.5 V 78 Switch A Off CMUOF 1 GND 0.8 V 79 Switch A On CMUON 1 2.0 5.5 V 80 Switch B Off DMUOF 1 GND 0.8 V 81 Switch B On DMUON 1 2.0 5.5 V Control Terminal, The Mode Table Note) The holding range of control voltage is shown in B No. 63 to B No. 81 of Electrical Characteristics. Pin No. Description Voltage Low High Remarks 37 Headphone mute on/off Mute on Mute off 36 Headphone power save on/off Save on (HP off) Save off (HP on) 49 The signal automatic detection feature on/off Automatic distinction: off Automatic distinction: on 32 Standby on/off STB on STB off 50 Speaker power save on/off Save on (SP off) Save off (SP on) 35 Switch A Off On 33 Switch B Off On 31 Line mute on/off Mute on Mute off Pin No. 8 Description At the time of time of AGC: on, it changes on level. It has priority over power saving by pin 50 more than an automatic detection. Voltage Low Open High AGC: off AGC: on2 AGC: on1 SDC00047AEB 9 AN12942B Control Terminal, The Leakage Current Table at VCC = 5.0 V, VCC_SP = 5.0 V • Design reference value Pin No. Description Leakage current IiL-max IiH-max Input impedance 33 Switch B +2µA +80µA The low holding range: High impedance The high holding range: About 80 kΩ 35 Switch A +2µA +80µA The low holding range: High impedance The high holding range: About 80 kΩ 37 Headphone mute on/off −20µA +30µA About 170 kΩ 8 At the time of AGC = on, it changes on level. −20µA +50µA About 125 kΩ In the case of less than the voltage of the input voltage limitation circuit Pin No. Description Leakage current IiL-max IiH-max Input impedance In the case beyond the voltage of the input voltage limitation circuit Leakage current IiL-max IiH-max Input impedance 31 Line mute on/off +1µA +1µA High impedance +100µA 25 kΩ typ. 32 Standby on/off +1µA +1µA High impedance +50µA 45 kΩ typ. 36 Headphone power save on/off −1µA +1µA High impedance +40µA +200µA 16 kΩ typ. 49 Signal automatic detection feature on/off +1µA +1µA High impedance +20µA 85 kΩ typ. 50 Speaker power save on/off −1µA +1µA High impedance +5µA +200µA 15 kΩ typ. • The sourcing current of the pin is indicated with “+”. • The range that a control voltage is held in low level : Pin 33, pin 35, pin 37, pin 31, pin 32, pin 36, pin 49, pin 50 : 0 V ∼ 0.8 V Pin 8 : 0 V ∼ 0.5 V • The range that a control voltage is held in high level : Pin 33, pin 35, pin 37, pin 31, pin 32, pin 36, pin 49, pin 50 : 2.0 V ∼ 5.5 V Pin 8 : 2.5 V ∼ 5.5 V • Pin 31, pin 32,pin 36,pin 49 and pin 50 builds in an input voltage limitation circuit. • In the case beyond the voltage of the input voltage limitation circuit, leakage current depends on inside resistance. • When resistance is connected to a pin, current decreases by the sum total of resistance and internal resistance. Note) The characteristics listed above are reference values based on the IC design and are not guaranteed. SDC00047AEB 10 AN12942B Technical Data • Circuit diagrams of the input/output part and pin function descriptions Note) The characteristics listed below are reference values based on the IC design and are not guaranteed. Pin No. 1, 56 52, 53, 54, 55, 2, 3, 4, 5 Waveform and voltage Inner circuit Power supply pins specifically designed for speaker amplifiers. • Pin 1 for R-channel. • Pin 56 for L-channel. Because the big electric current flows, it is desirable to separate from the VCC line to the other power supply pins on the board pattern. DC: 5.0 V Speaker output Pin 52, pin 53 Pin 2, pin 3 Positive phase VCC_SP (5.0 V) Pin 52, pin 53, pin 2, pin 3 18k Pin 54, pin 55 Pin 4, pin 5 Negative phase 3.6k Pin 54, pin 55, pin 4, pin 5 Output pins of speaker amplifiers. It becomes BTL output. • Pin 54, pin 55 for L-channel positive phase output • Pin 52, pin 53 for L-channel negative phase output The output • Pin 2, pin 3 for R-channel positive impedance: Equal phase output to or less than 1 Ω • Pin 4, pin 5 for R-channel negative phase output To reduce voltage loss caused by the wire resistance in maximum output, it makes output 2 terminals. When the speaker amplifiers save power, DC voltage is also kept. GND_SP DC : 0.0 V 31 31 Description VCC_SP DC: 2.20 V AC: 4 dBV 51, 6 Impedance Line mute control It is GND pin for the speaker amplifier. • Pin 6 is for R-channel. • Pin 51 is for L-channel. Because the big electric current flows, it is desirable to separate from the GND line to the other GND pin on the board pattern. Also, it isn't connected with the substrate potential in the IC. The base entry (With the resistance) 25 k It controls on/off of the mute function of In the range which the line output. entry limiter does not depend on, it is high impedance. SDC00047AEB 11 AN12942B Technical Data (continued) • Circuit diagrams of the input/output part and pin function descriptions (continued) Note) The characteristics listed below are reference values based on the IC design and are not guaranteed. Pin No. Waveform and voltage 100 7 9, 15, 26, 38, 42, 48 Description Signal less time: Constant current source Signal's there being: The output impedance: About 200 Ω It connects a condenser for the peak detection. It is the circuit which detects a peak after rectifying the audio signal of the audio signal automatic detection circuit in both waves. By changing a capacity value, the time which the power saving depends on in case of the switchover which is without signal with signal's there being can be changed. VREG (4.5 V) Audio automatic detection detection pin: 7 Impedance Inner circuit Signal nothing DC: 0.0 V Signal’s there being DC: 2.0 V 40k It is the GND pins of the signal system. It is connected with the substrate potential of the IC. Pin 15, pin 42 connect with the lead frame of the IC. The entry impedance: About 200 kΩ It is the standard voltage pin to fix the DC bias of the speaker output. It connects a condenser to remove a ripple. GND DC: 0.0 V VCC_SP (5.0 V) VREF (SP) 43 DC: 2.20 V 43 400k 400k VREG (4.5 V) Line out 29, 30 AC: −9.17 dBV DC : 2.25 V 9.6k 17.4k Pin 29, Pin 30 The output impedance: Equal It is the output pin of the line amplifier. to or less than about 10 Ω SDC00047AEB 12 AN12942B Technical Data (continued) • Circuit diagrams of the input/output part and pin function descriptions (continued) Note) The characteristics listed below are reference values based on the IC design and are not guaranteed. Pin No. 49 Waveform and voltage Signal automatic detection function on/off control pin DC: Speaker amplifier entry 44, 45 Impedance Inner circuit VREG (4.5 V) 8k 220k 80k The entry impedance: The high impedance 49 44k Description We change an audio signal automatic detection function in on/off. In case of automatic detection off, it controls power saving by speaker with the manual with the power saving on/off pin. • High: Function on • Low: Function off 8k Pin 45, pin 44 It is the voice input pins of the speaker amplifier. To make offset voltage in power saving on/off changing by the The entry speaker amplifier little, it combines impedance: About capacity. 18 kΩ ( It makes POP noise small ). Pin 44: R-channel speaker entry Pin 45: L-channel speaker entry 18k VREF (2.25 V) DC: 2.25 V AC: −10 dBV VREG (4.5 V) BVREF The entry impedance: The high impedance 20 DC: V 21, 22, 23, Switch A-1 Switch A-2 Switch A-3 24, 25 Switch B-1 Switch B-2 DC: V 33 35 Switch B Switch A 20 VREG (4.5 V) Pin 21, pin 22, pin 23, pin 24, pin 25 20 The output impedance: Equal It is the output pin of BVREF. to or less than about 10 Ω 80k Pin 33, pin 35 DC: 0 V (at Open) It is the input pin of BVREF. 250k We change a noise removal function in The entry on/off. impedance: About • High: Function on 80 kΩ • Low: Function off SDC00047AEB 13 AN12942B Technical Data (continued) • Circuit diagrams of the input/output part and pin function descriptions (continued) Note) The characteristics listed below are reference values based on the IC design and are not guaranteed. Pin No. Waveform and voltage Impedance Inner circuit Description VCC (5.0 V) Pri_charge level pin 160k 17 The entry impedance: It is the voltage pin for DC bias pri_charge. About 100 kΩ 17 DC: 3 V 240k VREG (4.5 V) Pin 28, pin 27 Audio signal input 27, 28 DC: 2.25 V AC: −10 dBV 22.5k 13.2k 22.5k 31.8k It enters a main audio signal. The entry impedance: • Pin 27: R-channel entry About 22.5 kΩ • Pin 28: L-channel entry VREF (2.25 V) VREF (2.25 V) 16, 41 VCC DC: 5.0 V 32 Standby on/off changing SW 32 Open DC voltage DC: 0.00 V 80k 240k It is the power supply (VCC) pin to supply the regulator circuit to create the inner power supply VREG with the voltage. It is separating from VCC_SP of pin 1, pin 56 fully inside. It is desirable to separate as far as it finishes coming out about the P board pattern, too. It changes whether or not it makes this IC an operation condition or whether or not it makes it a standby. The entry impedance: • Low: Standby About 80 kΩ • High: The operation condition In that the power changes a connected condition to the standby, the circuit electric current can be almost made 0. SDC00047AEB 14 AN12942B Technical Data (continued) • Circuit diagrams of the input/output part and pin function descriptions (continued) Note) The characteristics listed below are reference values based on the IC design and are not guaranteed. Pin No. Waveform and voltage Inner circuit 34 Impedance 180 Beep entry It is the entry pin to enter beep signal. The same signal is entered both by The entry impedance: About L-channel and R-channel with the audio 180 kΩ signal mix amplifier of the following paragraph. 34 DC: 2.25 V AC: 3.3 VPP Description 6.75k 18k VREF (2.25 V) VCC (5 V) VREF 18 With the pin to fix the bias voltage (the operation point) of the system which the The entry inner power supply (VREG) works, it impedance: About becomes 1/2 VREG (V). To remove noise, 200 kΩ it connects a condenser with the interval of GND. 440k 18 DC: 2.25 V 360k VREG (4.5 V) 12 The signal detection system preamplifier output pin 12 The output It is the output pin of the signal detection impedance: About system preamplifier. 10 Ω DC: 2.25 V AC: −10 dBV Signal input for signal automatic detection 11 It is the signal input pin for signal The entry automatic detection. It is possible to impedance: About adjust in the direction lowers a gain by 20 kΩ adding external resistance. 11 DC: 2.25 V AC: −10 dBV 20k VREF (2.25 V) SDC00047AEB 15 AN12942B Technical Data (continued) • Circuit diagrams of the input/output part and pin function descriptions (continued) Note) The characteristics listed below are reference values based on the IC design and are not guaranteed. Pin No. Waveform and voltage Inner circuit Impedance Description 80k 19 19 EVR control for SP and HP DC: V The entry impedance: The high impedance It is the pin which controls EVR for speaker amplifier and Headphone amplifier. The holding range with control voltage is 0 V to 3.3 V. The entry impedance: Unsettled It is the detection circuit to detect the signal level of the AGC circuit of the speaker output for the clip prevention. It connects a condenser for the detection. VREG (4.5 V) 10 AGC detection pin 90 10 DC: 0 V ∼ 1 V 80k VREG (4.5 V) 8 AGC on1/on2/off control pin DC: 216k 240k 48k 40k 96k 120k 8 It is the pin which controls the operation of the AGC circuit of the speaker output for the clip prevention in on/off. The entry At the time of off , the AGC circuit does impedance: About not work. 76 kΩ • "High" : AGC-on1 • "Open" : AGC-on2 • "Low" : AGC-off VREG (4 V) 13, 14, 46, 47 Offset cancellation C pin DC : 2.25 V Pin 13, pin 14, pin 46, pin 47 80k It is the condenser connection pin of the The entry offset cancellation circuit to remove the impedance: About DC offset. As the principle, it composes high pass filter by entry impedance “R” 80 kΩ and connection condenser “C”. SDC00047AEB 16 AN12942B Technical Data (continued) • Circuit diagrams of the input/output part and pin function descriptions (continued) Note) The characteristics listed below are reference values based on the IC design and are not guaranteed. Pin No. 50 Waveform and voltage SP amplifier power saving on/off control pin DC: 36 HP amplifier power saving on/off control pin DC: Inner circuit Impedance Description The entry impedance: The high impedance It is the pin which controls power saving by the speaker amplifier. At the time of on in addition to the control in case of automatic distinction function off, too, power saving on by pin 50 have priority over. The entry impedance: The high impedance It is the pin which controls power saving by the headphone amplifier. VCC (5 V) VREG (4.5 V) 180k 80k 50 48k VCC (5 V) VREG (4.5 V) 200k 16k 36 70k VREG (4.5 V) 37 HP amplifier mute on/off control terminal DC : 2.0 V 220k 200k 80k 130k 37 The input impedance: Equal It controls on/off of the mute function of to or less than the headphone output. about 170 kΩ 160k VREG (4.5 V) 39, 40 Output terminal for the HP amplifier DC : 2.20 V AC : −4 dBV Pin 39, pin 40 The output impedance: Equal to or less than about 1 Ω SDC00047AEB It is an output pin for the headphone amplifier. The signal which was adjusted in the volume in EVR can be output by the low impedance. 17 AN12942B Technical Data (continued) • Power dissipation of package HSOP056-P-0300A PD Ta 5.000 4.280 Power dissipation PD (W) 4.000 3.000 Mounted on standard board Nonsoldering radiation plate (50 × 50 × 0.8 mm3) Rth(j-a) = 79.5°C/W 2.000 Mounted on four layers of standard board Soldering radiation plate (50 × 50 × 0.8 mm3) Rth(j-a) = 29.2°C/W 1.572 1.000 0.000 0.862 Independent IC without a heat sink Rth(j-a) = 144.9°C/W 0 25 50 75 100 125 150 Ambient temperature Ta (°C) Note) The characteristics listed above are reference values based on the IC design and are not guaranteed. SDC00047AEB 18 AN12942B SP output level (pin 52-pin 55, pin 2-pin 5) (dBV) y Main characteristics 1) Speaker amplifier Speaker I/O characteristics – 8 Ω 20 10 0 VCC = 5 V VCC_SP = 5 V L-in, R-in → L-out, R-out EVR = 3.3 V AGC: Off SP input (pin 45, pin 44) 24 kΩ-ATT HPF: 400 Hz LPF: 20 kHz −10 −20 −30 −40 −30 −20 −10 0 SP output (pin 52-pin 55, pin 2-pin 5) distortion THD (%) Technical Data (continued) Speaker I/O characteristics – 8 Ω 10 1 VCC = 5 V VCC_SP = 5 V L-in, R-in → L-out, R-out freq = 1 kHz EVR = 3.3 V AGC: Off SP input (pin 45, pin 44) 24 kΩ-ATT HPF: 400 Hz LPF: 20 kHz 0.1 0.01 −40 −30 Input level (L-ch., R-ch. → pin 28, pin 27) (dBV) 10 8 6 VCC = 5 V VCC_SP = 5 V L-in, R-in → L-out, R-out VIN = −10 dBV EVR = 3.3 V AGC: Off SP input (pin 45, pin 44) 24 kΩ-ATT 2 0 0.01 0.1 1 10 100 SP output (pin 52-pin 55, pin 2-pin 5) distortion THD (%) SP output level (pin 52-pin 55, pin 2-pin 5) (dBV) Speaker output frequency characteristics – 8 Ω 4 10 1 0.1 0.01 0.01 0.1 SP output cross talk (R-ch. → L-ch.) (dB) SP output cross talk (L-ch. → R-ch.) (dB) 60 70 1 10 10 100 Speaker output frequency characteristics – 8 Ω 40 0.1 1 Input frequency (L-ch., R-ch. → pin28, pin27) (kHz) VCC = 5 V VCC_SP = 5 V VIN = −10 dBV EVR = 3.3 V AGC: Off SP input (pin 44) 24 kΩ-ATT LPF: 80 kHz 80 0.01 0 VCC = 5 V VCC_SP = 5 V L-in, R-in → L-out, R-out VIN = −10 dBV EVR = 3.3 V AGC: Off SP input (pin 45, pin 44) 24 kΩ-ATT Speaker output frequency characteristics – 8 Ω 50 −10 Speaker output frequency characteristics – 8 Ω Input frequency (L-ch., R-ch. → pin 28, pin 27) (kHz) 40 −20 Input level (L-ch., R-ch. → pin 28, pin 27) (dBV) 100 Input frequency (L-ch.-pin 28) (kHz) 50 VCC = 5 V VCC_SP = 5 V VIN = −10 dBV EVR = 3.3 V AGC: Off SP input (pin 45) 24 kΩ-ATT LPF: 80 kHz 60 70 80 0.01 0.1 1 10 100 Input frequency (R-ch.-pin 27) (kHz) SDC00047AEB 19 AN12942B Technical Data (continued) 10 0 −10 Headphone amplifier I/O distortion characteristics - EVR = max VCC = 5 V VCC_SP = 5 V L-in, R-in → L-out, R-out freq = 1 kHz RL = 32 Ω EVR = 3 V −20 −30 −40 −50 −60 −50 −40 −30 −20 −10 0 10 HP amplifier output (Pin 39, Pin 40) distortion THD (%) HP amplifier output (Pin 39, Pin 40) level (dBV) y Main characteristics 2) Headphone amplifier Headphone amplifier I/O characteristics - EVR = max 10 1 0.1 0.01 0.001 −50 VCC = 5 V VCC_SP = 5 V L-in, R-in → L-out, R-out VIN = −10 dBV RL = 32 Ω EVR = 3 V −10 −20 0.01 0.1 1 10 100 HP amplifier output (Pin 39, Pin 40) distortion THD (%) HP amplifier output (Pin 39, Pin 40) level (dBV) Headphone amplifier frequency characteristics - EVR = max 0 −40 −30 −20 −10 0 10 Input level (Pin 28, Pin 27) (dBV) Input level (Pin 28, Pin 27) (dBV) 10 VCC = 5 V VCC_SP = 5 V L-in, R-in → L-out, R-out freq = 1 kHz RL = 32 Ω EVR = 3 V Input frequency (Pin 28, Pin 27) (kHz) Headphone amplifier frequency characteristics - EVR = max 10 VCC = 5 V VCC_SP = 5 V L-in, R-in → L-out, R-out VIN = −10dBV 1 RL = 32 Ω EVR = 3 V 0.1 0.01 0.001 0.01 0.1 1 10 100 Input frquency (Pin 28, Pin 27) (kHz) SDC00047AEB 20 AN12942B Technical Data (continued) Headphone amplifier I/O distortion characteristics - EVR = typ 10 VCC = 5 V VCC_SP = 5 V 0 L-in, R-in → L-out, R-out freq = 1 kHz RL = 32 Ω −10 EVR = 1.5 V −20 −30 −40 −50 −60 −50 −40 −30 −20 −10 0 10 HP amplifier output (Pin 39, Pin 40) distortion THD (%) HP amplifier output (Pin 39, Pin 40) level (dBV) y Main characteristics (continued) 2) Headphone amplifier (continued) Headphone amplifier I/O characteristics - EVR = typ 10 VCC = 5 V VCC_SP = 5 V L-in, R-in → L-out, R-out freq = 1 kHz RL = 32 Ω EVR = 1.5 V 1 0.1 0.01 0.001 −50 −40 Input level (Pin 28, Pin 27) (dBV) 0 −10 −20 −30 −40 −50 −60 VCC = 5 V VCC_SP = 5 V L-in, R-in → L-out, R-out VIN = −10 dBV freq = 1 kHz RL = 32 Ω −80 −90 −100 0 0.5 1 1.5 2 −20 −10 0 10 2.5 3 EVR attenuate distortion characteristics – Headphone output HP amplifier output (Pin 39, Pin 40) distortion THD (%) HP amplifier output (Pin 39, Pin 40) level (dBV) EVR attenuate level characteristics – Headphone output −70 −30 Input level (Pin 28, Pin 27) (dBV) EVR-CTL (Pin 19) (V) 10 VCC = 5 V VCC_SP = 5 V L-in, R-in → L-out, R-out VIN = −10 dBV freq = 1 kHz RL = 32 Ω 1 0.1 0.01 0 0.5 1 1.5 2 2.5 3 EVR-CTL (Pin 19) (V) SDC00047AEB 21 AN12942B Application Notes 1. Linear amplifier circuit block Following block diagrams is line amplifier circuit. Line input L-channel Line input R-channel −3 dB 13.1k 28 +3.83 dB Line output 29 L-channel 31.9k −3 dB 13.1k 27 +3.83 dB 31.9k Line mute Line output 30 R-channel 31 Line mute control Headphone amplifier input terminal (Input impedance = 45 kΩ) 1) The gain of the linear amplifier system is +0.83 dB. 2) To become a connection of the standing in the row, the entry impedance of pin 28, pin 27 becomes 22.5 kΩ. It stores up that these pins also serve as the headphone entry (the impedance = 45 kΩ). 3) It is possible to adjust to the direction which lowers a gain in adding resistance to pin 28, pin 27. But, the gain of the headphone system, too, changes at the same time. Pin 28 Pin 27 13.1k +3.83 dB R 31.9k If external resistance is “R” Gain = 20 log 31.9 kΩ R + 13.1 kΩ + 31.9 kΩ 4) By the mute control by pin 31, the line can be output in the mute. 5) For the pop sound measure at the time of power on, delay from the standby cancellation by pin 32 and cancel a linear mute. (Refer to sheet no.2 for circuit constant.) Design reference value Parameter Design reference value The input/output gain +0.83 dB Input impedance 22.5 kΩ Note Note) *: It done the change being of ±10% because there is a change of the inner resistance. Equal to or less than 10 Ω Note) *: But, it limits into the sound band range of equal to or less than 50 kHz. Maximum input level 1.6 dBV Note) *: The time of the warp (to 5th of THD) of 1% of output. Maximum output level 3.0 dBV Note) *: The time of the warp (to 5th of THD) of 1% of output. Output impedance Ability of the output drive Equal to or more than 10 kΩ of loads SDC00047AEB 22 AN12942B Application Notes (continued) 2. Headphone amplifier circuit block Following block diagrams is headphone amplifier circuit. Headphone input 28 L-channel Headphone input R-channel 27 −6 dB 22.5k 45k −6 dB 45k +6 dB (at EVR = Max) EVR + 22.5k + +6 dB +6 dB +6 dB EVR HP mute Beep input 34 Beep HP EVR 39 Headphone output R-channel 37 Headphone mute control HP save 6.75k 40 Headphone output L-channel 36 Headphone power save control 19 EVR control Headphone amplifier input pin (Input impedance = 45 kΩ) 1) The gain of the headphone amplifier system is +6.0 dB when EVR is maximum. 2) To become a connection of the standing in the row, the entry impedance of pin 28, pin 27 becomes 22.5 kΩ. It stores up that these pin also serve as the headphone entry (the impedance = 45 kΩ). 3) It is possible to adjust to the direction which lowers a gain in adding resistance to pin 28, pin 27. But, the gain of the line system, too, changes at the same time. Pin 28 22.5k Pin 27 45k R If external resistance is “R” Gain = 20 log 22.5 kΩ R + 45 kΩ 4) By the mute control by pin 37, the headphone can be output in the mute. 5) By the EVR control of pin 19, the gain of the headphone output can be variably done. 6) The entry of the beep circuit of pin 34 is a virtual grounding entry. Therefore, the external resistance is necessary. 7) For the pop sound measure at the time of power on, delay from the standby cancellation by pin 32 and cancel a headphone save mute. (Refer to sheet no.2 for circuit constant.) 8) When high impedance load is likely to be connected to headphone amplifier output, insert a resistor of 1 Ω to 4.7 kΩ so as to lower shock noise at power on or standby on/off. Pin 39 Pin 40 1k ~ 4.7k SDC00047AEB 23 AN12942B Application Notes (continued) 2. Headphone amplifier circuit block (continued) • Beep signal I/O 6.75k R1 − IN1 34 Comparator + R2 VREF Input amplifier Headphone amplifier IN2 IN3 R3 Speaker amplifier Since input amplifier is of a reverse amplifier system, any input to pin 34 through a resistor from some circuits would not cause any drop of input impedance. Gain of in 1 6.75 kΩ Gain = 20 log R1 Gain of in 2 6.75 kΩ Gain = 20 log R2 Threshold level of comparator is 0.1 Vrms to 0.4 Vrms. Therefore, keep output of input amplifier equal to or more than 0.4 Vrms. Equal to or more than 0.4 Vrms ensures that a certain level of beep sound is output to the speaker. Beep I/O level characteristics : Speaker load - 8 Ω Beep frequency level characteristics : Speaker load - 8 Ω 2 SP output level (R-ch., L-ch.) (Vrms) SP output level (R-ch., L-ch.) (Vrms) 10 1 0.1 VCC = 5 V VCC_SP = 5 V Beep → L-out, R-out freq = 1 kHz Input resistance = 15 kΩ Square wave EVR = 3 V(max) AGC : Off Autimatic detection on 0.01 0.001 0.1 1 10 1.5 VCC = 5 V VCC_SP = 5 V Beep → L-out, R-out VIN = 1.5 Vrms Input resistance = 15 kΩ Square wave EVR = 3 V(max) AGC : Off Autimatic detection on 1 0.1 1 10 100 Beep input frequency (Pin 34) (kHz) Beep input level (Pin 34) (Vrms) Design reference value Parameter Design reference value Note The input/output gain +6.0 dB Note) *: At EVR is maximum. Input impedance 22.5 kΩ Note) *: It done the change being of ±10% because there is a change of the inner resistance. Equal to or less than 1 Ω Note) *: But, it limits into the sound band range of equal to or less than 50 kHz. Maximum input level 3.0 dBV Note) *: The time of the warp (to 5th of THD) of 1% of output. Maximum output level 2.4 dBV Note) *: The time of the warp (to 5th of THD) of 1% of output. Output impedance Ability of the output drive Equal to or more than 32 Ω of loads SDC00047AEB 24 AN12942B Application Notes (continued) 3. Speaker amplifier circuit block Following block diagrams is speaker amplifier circuit. −3 dB SP input L-ch. 45 AGC 18k +14 dB Offset cancel Mute 54 SP output L-ch.+ +14 dB 47 55 SP output L-ch.+ 53 SP output L-ch.− 52 SP output L-ch.− + Det. 10 −3 dB SP input R-ch. 44 AGC 18k Offset cancel +14 dB Mute 2 SP output R-ch.+ 3 SP output R-ch.+ 4 SP output R-ch.− 46 5 SP output R-ch.− +14 dB Save 50 SP save 1) The gain of the speaker amplifier system is +17.0 dB. 2) The entry impedance of pin 45, pin 44 becomes 18 kΩ. 3) It is possible to adjust to the direction which lowers a gain in adding resistance to pin 28, pin 27. Pin 44 Pin 45 R 18k Gain at insert a resistance Gain = 20 log 18 kΩ R + 18 kΩ + 17 dB 4) By the power save control by pin 50, the speaker can be output in the save mute. 5) For the pop sound measure at the time of power on, delay from the standby cancellation by pin 32 and cancel a speaker save mute. Design reference value Parameter The input/output gain Input impedance Output impedance Maximum output level Ability of the output drive Design reference value Note +17.0 dB 18 kΩ Equal to or less than 1 Ω 1 W : at 8 Ω of loads Note) *: It done the change being of ±10% because there is a change of the inner resistance. Note) *: But, it limits into the sound band range of equal to or less than 50 kHz. Note) *: The time of the warp (to 5th of THD) of 10% of output. Equal to or more than 8 Ω of loads SDC00047AEB 25 AN12942B Application Notes (continued) • The output wave at the time of AGC operation It is the following output wave form chart at the AGC operation time. AGC−off SP out R-ch.+ Pin2 ~ Pin3 AGC−on1 x VCC = 5 V x VCC_SP = 5 V x VIN = 1 Vrms x f = 1 kHz x SP R-ch. input (Pin 44) x SP out R-ch. load 8 Ω x Output : 1.34 W SP out R-ch.+ Pin2 ~ Pin3 x VCC = 5 V x VCC_SP = 5 V x VIN = 1 Vrms x f = 1 kHz x SP R-ch. input (Pin 44) x SP out R-ch. load 8 Ω x Output : 0.54 W SP out L-ch.− Pin4 ~ Pin5 SP out L-ch.− Pin4 ~ Pin5 AGC−on2 SP out R-ch.+ Pin2 ~ Pin3 x VCC = 5 V x VCC_SP = 5 V x VIN = 1 Vrms x f = 1 kHz x SP R-ch. input (Pin 44) x SP out R-ch. load 8 Ω x Output : 0.28 W SP out L-ch.− Pin4 ~ Pin5 Example: Output waveform of sound signal input AGC on AGC off SDC00047AEB 26 AN12942B Application Notes (continued) 4. Automatic power save of speaker amplifier function When input signal becomes zero or very small, a speaker amplifier is automatically power save off. 28 EVR 27 EVR OFFSET CANCEL OFFSET CANCEL Signal Det. 20 kΩ 12 R 11 VREF C 7 CDET In the case that a detection circuit operation error to noise, insert “R” and “C” between pin 12 and pin 11 to prevent operation error. fC = 1 2πRC However, that insertion of “R” causes input signal to attenuate. Gain = 20 log 20 kΩ R + 20 kΩ Setting L-channel, R-channel input of −58 dBV (Vol = 1.65 V) as detection threshold, insertion of “R” would drive detection threshold value up for the above gain.. CDET of pin 7 is capacitor to determine detection time. Det.capacity vs detection time (Input signal off → Speaker automatic power save on) 200 2 150 1.5 Detection time (sec) Detection time (µsec) Det.capacity vs detection time (Signal input → Speaker automatic power save off) 100 0.5 50 0 0.01 1 0.1 1 0 0.01 0.1 1 Det. capacity (Pin 7) (µF) Det. capacity (Pin 7) (µF) Automatic off (Detection time until audio output) Measurement conditions • VCC, VCC_SP = 5 V • Signal input → Time difference until speaker output • Measure time difference from signal input (sine wave) at no signal status until speaker output. • Speaker output (load 8 Ω) = −4 dBV, f = 1 kHz SDC00047AEB Automatic power save on (No sound → Time until power save) Measurement conditions • VCC, VCC_SP = 5 V • Input signal off → Time difference until speaker power save • Measure time difference from switching speaker signal (sine wave) output to no input until speaker power save. • Speaker output (load 8 Ω) = −4 dBV, f = 1 kHz 27 AN12942B Application Notes (continued) 5. Mute switch of signal line circuit CD/DVD player audio signal output and etc. Switch A 35 21 Reference voltage 20 input for mute Pin21 to pin25 When mute is on mode,output reference voltage input via buffer amplifier. Output impedance is equal to or less than 10 Ω. When mute is off mode, it become high impedance. 22 23 24 25 Switch B 33 Note) * : Refer to sheet no.12 for circuit of inner IC SDC00047AEB 28 AN12942B Outside figure (Unit: mm) • HSOP056-P-0300A (Lead-free package) Area of no resin flash 14.00 ± 0.10 (6.90) (5.45) 29 (3.70) 6.10 ± 0.10 8.10 ± 0.20 (1.00) (2.25) 56 0.50 0.10 M 0.10 (1.00) (0.25) 28 0.10 ± 0.10 1 1.20 max. 0º to 8º 0.50 ± 0.10 Seating plane SDC00047AEB Seating plane 29 AN12942B Usage Notes • Avoid the power line short and the ground short of the terminals. • Especially positive phase speaker output pins (pin 2, pin 3, pin 54 and pin 55) and negative phase speaker output pins (pin 4, pin 5, pin 52 and pin 53) have the possibility of break-down caused by the power line short and the ground short. Be sure to avoid power line short, ground short and load short. SDC00047AEB 30 Request for your special attention and precautions in using the technical information and semiconductors described in this material (1) An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. (2) The technical information described in this material is limited to showing representative characteristics and applied circuits examples of the products. It neither warrants non-infringement of intellectual property right or any other rights owned by our company or a third party, nor grants any license. (3) We are not liable for the infringement of rights owned by a third party arising out of the use of the product or technologies as described in this material. (4) The products described in this material are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instruments and household appliances). Consult our sales staff in advance for information on the following applications: • Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. • Any applications other than the standard applications intended. (5) The products and product specifications described in this material are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (6) When designing your equipment, comply with the guaranteed values, in particular those of maximum rating, the range of operating power supply voltage, and heat radiation characteristics. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (7) When using products for which damp-proof packing is required, observe the conditions (including shelf life and amount of time let standing of unsealed items) agreed upon when specification sheets are individually exchanged. (8) This material may be not reprinted or reproduced whether wholly or partially, without the prior written permission of Matsushita Electric Industrial Co., Ltd. 2002 JUL