APL431L Low Voltage Adjustable Precision Shunt Regulator Features General Description • • The APL431L is a 3-terminal low voltage adjustable precision reference with specified thermal stability over applicable commercial temperature ranges. Output voltage may be set to any value between Vref (1. 24 V) and 20 V with two external resistors (see Figure 2). When used with an photocoupler, the APL431L is an ideal voltage reference in isolated feedback circuits for 3V to 12V switching-mode power supplies. This device has a typical output impedance of 0.1Ω. Active output circuitry provides a very sharp turn-on characteristic, making the APL431L excellent replacements for zener diodes in many applications, including on-board regulation and adjustable power supplies. Precise Reference Voltage to 1.24V Guaranteed 0.5% or 1% Reference Voltage Tolerance • • • Adjustable Output Voltage, VO = VREF to 20V • Low Operational Cathode Current, 80µA Sink Current Capability, 80uA to 100mA Quick Turn-on Typical • • 0.1Ω Typical Output Impedance SOT-23-3, SOT-23-5, TO-92 and SOT-89 Packages • Lead Free Available (RoHS Compliant) 1 Applications ANODE NC NC 3 5 4 2 1 REF CATHODE 3 REF ANO DE CATHO DE SOT-23-3 (Top View) • • • 2 SOT-23-5 (Top View) Linear Regulators 3 C ATHO D E 2 AN OD E 1 R EF Adjustable Power Supply Switching Power Supply 1 REF Symbol TO-92 (Top View) 3 ANODE CATHODE SOT-89 (Top View) Functional Diagram REF Anode 2 Cathode C athode + REF _ V ref Anode ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 1 www.anpec.com.tw APL431L Ordering and Marking Information E le c . G rad e A : 0 .5 % R e fe re nc e V oltage T oleran c e B : 1 % R efe re nce V oltage T oleranc e P ac k a ge C od e A : S O T -23 -3 B : S O T -23 -5 D : S O T -89 E : T O -9 2 Y :C hip F orm T e m p. R a nge C : 0 to 70 ° C I : -40 to 85 ° C H and ling C od e P B : P las tic B a g T B : T ape & B o x T R : T a pe & R ee l Le ad F re e C ode L : L e a d F re e D e vic e B la n k : O rig in a l D evic e A P L 43 1 L Le ad F re e C ode H and ling C od e T e m p. R a nge P ac k a ge C od e E le c . G rad e A P L 431 L A /B : 43 1L A P L 431 L D : A P L 431 L X XX XX A P L 431 L E : X XX XX APL 43 1L X XX XX X XX XX - D ate C od e - D a te C od e Notes： ANPEC lead-free products contain molding compounds/die attach materials and 100% matte in plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature. Absolute Maximum Ratings Symbol VKA IK IREF θJA TJ TSTG TSOL Parameter Cathode voltage Continuous cathode current range Reference current range Rating 20 100 3 Thermal Resistance from Junction to Ambient in Free Air SOT-23-3 SOT-23-5 SOT-89 TO-92 Operating Junction Temperature Range Storage Temperature Range Lead temperature range, Ts (Soldering, 10sec) Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 2 416 357 250 250 -40 to 150 -65 to 150 260 Unit V mA mA °C/W °C °C °C www.anpec.com.tw APL431L Electrical Characteristics Symbol Parameter TA= 25°C ( unless otherwise noted) APL431L Min. Typ. Max. APL431LA 1.234 1.240 1.246 VKA=VREF, IK=10mA TA =25°C, (Fig. 1) APL431LB 1.228 1.240 1.252 APL431LA 1.222 1.240 1.258 TA =full range(see Note1), (Fig.1) APL431LB 1.215 1.240 1.265 TA =full range (see Note1) 5 15 VKA=VREF, IK=10mA (Fig. 1) Test Conditions VREF Reference voltage VDEF VDEF Temp Deviation Ratio of Change in VREF IK=10mA, VKA=16V to VREF (Fig. ∆VREF / ∆VKA to Change in Cathods 2) Votage IREF Reference Input Current IK=10mA,R1 =10kΩ,R2 =∞ (Fig. 2) TK=full range (see Note 1), IREF(DEV) IREF Temp Deviation R1=10kΩ, R2=∞, IK=10mA, (Fig. 2) VK=6V IK(off) off-state cathode current VREF=0V, (Fig. 3) VK=16V VKA=VREF , IK=1mA to 100mA, Dynamic Output ZKA Impedance f ≤1kHz (Fig. 1) Minimum Operating IK(MIN) VKA=VREF (Fig. 1) Current Unit V mV -0.2 -1.0 mV/V 0.15 0.5 µA 0.05 0.3 µA 0.01 0.01 0.1 0.5 µA 0.1 0.4 Ω 80 100 µA Notes : 1.Full temperature range is 0°C to 70°C for APL431LXXC,and -40°C to 85°C for APL431LXXl. Test Figures VIN Vo VIN Vo IK(off) IK VREF Figure 1. Test Circuit for VKA=VREF , VO=VKA=VREF Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 Figure 2. Test Circuit for V >V Figure 3. Test Circuit for IK(off) 3 , www.anpec.com.tw APL431L Test Figures (Cont.) VIN Application Schematic Vo Precision Voltage Reference IK R1 IREF R2 VREF V IN RB Vo R1 VREF 0.1 µ F R2 Figure 2. Test Circuit for VKA>VREF, VO= VKA= VREF× (1+R1/R2) + IREF × R1 Precision High-Current Series Regulator V IN Vo RB R1 V R EF 0.1 µ F R2 Notes for Application Circuits: 1) To improve the stability of output voltage, a 0.1µF capacitor between cathode and anode of APL431L is strongly recommended. 2)Set VOUT according to the following equation: VOUT = VREF(1+R1/R2)+lREF R1 3)Choose the value for RB as follows: A)The maximum limit for RB should be such that the cathode current(lK) is greater than the mini mum operating current (80µA) at VIN(MIN). B)The minimum limit for RB should be such that the cathode current (lK) does not exceed 100mA under all load conditions, and the instantaneous turnon value for lk does not exceed 150mA. Both of the following conditions must. be met: VIN(MAX) RB,Min≥ 150mA (to limit instantaneous turn-on lK) RB,Min≥ VIN(MAX)-VOUT lOUT(MIN)+100mA (to limit lK under normal operating conditions) Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 4 www.anpec.com.tw APL431L Typical Characteristics Cathode Current vs. Cathode Voltage Cathode Current vs. Cathode Voltage 100 250 VKA=VREF TA=25°C VKA=VREF TA=25°C 150 Cathode Current (mA) Cathode Current (µA) 200 100 50 0 -50 -100 -150 50 0 -50 -200 -250 -1 -0.5 0 0.5 1 -100 -1.5 1.5 -0.5 0 0.5 1 1.5 Cathode Voltage (V) Cathode Voltage (V) Referemce Voltage vs. Junction Temperature Reference Input Current vs. Junction Temperature 0.18 1.26 Reference Input Current (µA) IKA=10mA Reference Voltage (V) -1 1.25 1.24 1.23 1.22 IKA=10mA R1=10kΩ, R2=∞ 0.16 0.14 0.12 0.10 0.08 -50 -25 0 25 50 75 100 125 150 -50 Junction Temperature (°C) Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 -25 0 25 50 75 100 125 150 Junction Temperature (°C) 5 www.anpec.com.tw APL431L Typical Characteristics Off State Cathode Current vs. Junction Temperature ∆VREF/∆VKA vs. Junction Temperature 0.5 Off State Cathode Current (µA) Ratio of Delta Reference Voltage to Delta Cathode Voltage (-mV/V) 0 IKA=10mA -0.1 ∆VKA=VREF to 20V -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 VREF =0V VKA =16V 0.4 0.3 0.2 0.1 VKA =6V 0 -1 -50 -25 0 25 50 75 100 125 -50 150 Junction Temperature (°C) -25 0 25 50 75 125 150 Junction Temperature (°C) IKA =1mA 3V 100 IKA =0.1mA TA =25°C 3V TA =25°C Input Input 0 0 1V 1V Output 0 Output 0 0µS Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 5 µS 0 µS 6 5µS www.anpec.com.tw APL431L Typical Characteristics Gain vs. Phase Shift vs. Frequency 50 40 100 30 150 20 200 250 10 10 Zka (Ω) IKA=10mA TA =25°C 50 Gain (dB) 100 0 Phase Shift (degree) 60 Zka vs. Frequency IKA=10mA VKA=VREF TA =25°C 1 0.1 300 0 350 -10 10 100 1000 10000 100000 0.01 10 1000000 100 1000 10000 100000 1000000 Frequency (Hz) Frequency (Hz) Stability Boundary Conditions 100 90 Unstable 80 VKA =2.5V 70 Ik (mA) TA =25°C VKA =VREF VKA =3.3V 60 50 40 Stable 30 20 10 0 0.0001 0.001 0.01 0.1 1 Load Capacitance (µF) Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 7 www.anpec.com.tw APL431L Package Information SOT-23 D B 3 E H 2 1 e A L A1 D im A A1 B C D E e H L C M illim e t e rs M in . 1 .0 0 0 .0 0 0 .3 5 0 .1 0 2 .7 0 1 .4 0 In c h e s M ax. 1 .3 0 0 .1 0 0 .5 1 0 .2 5 3 .1 0 1 .8 0 M in . 0 .0 3 9 0 .0 0 0 0 .0 1 4 0 .0 0 4 0 .1 0 6 0 .0 5 5 3 .0 0 0 .0 9 4 0 .0 1 5 1 .9 0 /2 .1 B S C 2 .4 0 0 .3 7 Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 M ax. 0 .0 5 1 0 .0 0 4 0 .0 2 0 0 .0 1 0 0 .1 2 2 0 .0 7 1 0 .0 7 5 /0 .0 8 3 B S C 8 0 .11 8 www.anpec.com.tw APL431L Package Information SOT-23-5 e1 5 4 E1 1 E 3 2 e b D A2 A a A1 Dim A A1 A2 b D E E1 e e1 L L1 L2 N α L2 L M illimeters M in. 0.95 0.05 0.90 0.30 2.8 2.6 1.5 Inches M ax. 1.45 0.15 1.30 0.50 3.00 3.00 1.70 M in. 0.037 0.002 0.035 0.011 0.110 0.102 0.059 0.55 0.014 0.7 0.020 0.20 BSC 0.5 Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 0.022 0.008 BSC 5 0° M ax. 0.057 0.006 0.051 0.019 0.118 0.118 0.067 0.037BSC 0.074BSC 0.95BSC 1.90BSC 0.35 L1 0.028 5 10° 9 0° 10° www.anpec.com.tw APL431L Package Information TO-92 3 J e e1 2 D 1 L1 b2 S b S Q A E L SEATING PLANE Millimeters Min. Max. 4.318 5.334 Min. 0.170 Max. 0.210 0.406 0.559 0.016 0.022 0.406 0.559 0.016 0.022 φ D E 4.445 5.207 0.175 0.205 3.175 4.191 0.125 0.165 e 2.413 2.667 0.095 0.105 e1 1.143 1.397 0.045 0.055 J 3.429 0.135 L 12.70 0.500 Dim A φ b φ b2 L1 Inches 1.27 Q 2.921 S 2.032 Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 0.050 0 . 115 2.667 10 0.080 0.105 www.anpec.com.tw APL431L Package Information SOT-89 (Reference EIAJ ED-7500A Reg stration SC-62) D D1 a E H 1 2 3 L C B1 B e e1 A a D im A B B1 C D D1 e e1 E H L α M illim eters M in. 1.40 0.40 0.35 0.35 4.40 1.35 Inches M ax. 1.60 0.56 0.48 0.44 4.60 1.83 M in. 0.055 0.016 0.014 0.014 0.173 0.053 1.50 B SC 3.00 B SC 2.29 3.75 0.80 Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 M ax. 0.063 0.022 0.019 0.017 0.181 0.072 0.059 BSC 0.118 B SC 2.60 4.25 1.20 10° 11 0.090 0.148 0.031 0.102 0.167 0.047 10° www.anpec.com.tw APL431L Physical Specifications Terminal Material Lead Solderability Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. Reflow Condition (IR/Convection or VPR Reflow) tp TP Critical Zone T L to T P Temperature Ram p-up TL tL Tsm ax Tsm in Ram p-down ts Preheat 25 t 25 °C to Peak Tim e Classificatin Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Large Body Small Body Average ramp-up rate 3°C/second max. (TL to TP) Preheat - Temperature Min (Tsmin) 100°C - Temperature Mix (Tsmax) 150°C - Time (min to max)(ts) 60-120 seconds Tsmax to TL - Ramp-up Rate Tsmax to TL - Temperature(TL) 183°C - Time (tL) 60-150 seconds Peak Temperature(Tp) 225 +0/-5°C 240 +0/-5°C Time within 5°C of actual Peak 10-30 seconds 10-30 seconds Temperature(tp) Ramp-down Rate 6°C/second max. 6 minutes max. Time 25°C to Peak Temperature Pb-Free Assembly Large Body Small Body 3°C/second max. 150°C 200°C 60-180 seconds 3°C/second max 217°C 60-150 seconds 245 +0/-5°C 250 +0/-5°C 10-30 seconds 20-40 seconds 6°C/second max. 8 minutes max. Note: All temperatures refer to topside of the package. Measured on the body surface. Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 12 www.anpec.com.tw APL431L Reliability Test Program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245°C, 5 SEC 1000 Hrs Bias @125°C 168 Hrs, 100%RH, 121°C -65°C~150°C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1tr > 100mA Carrier Tape & Reel Dimensions t D P Po E P1 Bo F W Ko Ao D1 T2 J C A B T1 Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 13 www.anpec.com.tw APL431L Carrier Tape & Reel Dimensions Application SOT-89 A B J T1 T2 70 ± 2 C 13.5 ± 0.15 178 ±1 F 3 ± 0.15 14 ± 2 D D1 Po 1.5± 0.1 5.5 ± 0.05 1.5± 0.1 Application SOT-23 8 ± 0.1 1.75± 0.1 P1 Ao Bo Ko t 4.0 ± 0.1 2.0 ± 0.1 4.8 ± 0.1 4.5± 0.1 J T1 T2 P E 1.4 W 8.0+ 0.3 - 0.3 4.0 1.75 1.80± 0.1 0.3±0.013 B C 178±1 60 ± 1.0 12.0 F D D1 Po P1 Ao Bo Ko t φ0.1MIN 4.0 2.0 ± 0.05 3.1 3.0 1.3 0.2±0.03 C J T1 T2 W P E 8.4 ± 2 1.5 ± 0.3 8.0 ± 0.3 4 ± 0.1 1.75± 0.1 P1 Ao Bo Ko t A 178 ±1 SOT-23-5 E A 3.5 ± 0.05 1.5 +0.1 Application P 1.3 ± 0.3 W 12 + 0.3 12 - 0.1 B 2.5 ± 0.15 9.0 ± 0.5 72 ± 1.0 13.0 + 0.2 2.5 ± 0.15 F D 3.5 ± 0.05 1.5± 0.1 D1 Po 1.5± 0.1 4.0 ± 0.1 2.0 ± 0.1 3.15 ± 0.1 3.2± 0.1 1.4± 0.1 0.2±0.033 Carrier Tape & Reel Dimensions H2 H2A H2 H2 D2 A H3 H4 H W1 H1 W W2 L L1 D F1F2 T2 T T1 D1 P1 P P2 Application TO-92 A D 3.18~12 4.0±0.2 H3 H4 D1 W 0.36~0.68 17.5~19 H H1 H2 H2A 16±0.5 9±0.5 0.5 MAX 0.5 MAX L1 F1,F2 2.5+0.2 -0.1 P P1 P2 T T1 2.5 MIN 12.7±0.2 6.35±0.4 0.36~0.53 9.0 MAX L 27.0 MAX 20.0 MAX 11.0 MAX T2 D2 W1 W2 5.0~7.0 0.5 MAX 50.8±0.5 0.55 MAX 1.42 MAX (mm) Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 14 www.anpec.com.tw APL431L Cover Tape Dimensions Application SOT- 23 SOT-23-5 SOT- 89 TO-92 Carrier Width 8 8 12 17.5~19 Cover Tape Width 5.3 5.3 9.3 5.0~7.0 Devices Per Reel 3000 3000 1000 2000 Customer Service Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 15 www.anpec.com.tw