APL5312 Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator Features General Description • Wide Operating Voltage: 2.3V~6V • Low Dropout Voltage: 290mV @ 3V/300mA • Fixed Output Voltages: 1.5V~3.5V The APL5312 is a ultra low noise, low dropout linear regulator, which operate from 2.3V to 6V input voltage and deliver up to 300mA. Typical dropout voltage is only 290mV at 300mA loading. Designed for use in RF applications, the high PSRR 74dB and low noise 36µVRMS makes it an ideal choice. with step 100mV, 2.85V • Guaranteed 300mA Output Current • High PSRR: 74dB before 10KHz • Low Output Noise: 36µVRMS at 100Hz Design with an internal P-channel MOSET pass element, the APL5312 maintain a low supply current, independent of the load current and dropout voltage. Other features include thermal-shutdown protection and current limit protection to ensure specified output current and controlled short-circuit current. The APL5312 regulator come in a miniature SOT23-5 and SC70-5 package. to 100KHz • Current Limit Protection • Controlled Short Circuit Current: 50mA • Over Temperature Protection • Stable with 1µF Capacitor for Any Load • Excellent Load/Line Transient • SOT23-5 and SC70-5 Packages • Lead Free Available (RoHS Compliant) Pin Configuration SOT23-5/ SC70-5 Applications • Cellular Phones • Portable and Battery-Powered Equipment • Wireless LANs • GPS V IN 1 GND 2 SHDN 3 5 V OUT 4 BP APL5312 ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 1 www.anpec.com.tw APL5312 Ordering and Marking Information Package Code B : SOT23-5 S5 : SC70-5 Operating Ambient Temp. Range I : -40 to 85 °C Handling Code TR : Tape & Reel Voltage Code 15 : 1.5V 30 : 3.0V Lead Free Code L : Lead Free Device Blank : Original Device APL5312 Lead Free Code Handling Code Temp. Range Package Code Voltage Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature. SOT23-5 packages Product Name Marking Product Name Marking Product Name Marking Product Name Marking APL5312-15/B 339X APL5312-16/B 33AX APL5312-17/B 33BX APL5312-18/B 33CX APL5312-19/B 33DX APL5312-20/B 33EX APL5312-21/B 33FX APL5312-22/B 33GX APL5312-23/B 33HX APL5312-24/B 33IX APL5312-25/B 33JX APL5312-26/B 33KX APL5312-27/B 33LX APL5312-28/B 33MX APL5312-29/B 33NX APL5312-30/B 33OX APL5312-31/B 33PX APL5312-32/B 33QX APL5312-33/B 33RX APL5312-34/B 33SX APL5312-35/B 33TX APL5312-285/B 33αX SC70-5 packages Product Name Marking Product Name Marking APL5312-15/S5 339 APL5312-16/S5 33A APL5312-19/S5 33D APL5312-20/S5 33E APL5312-23/S5 33H APL5312-24/S5 33I APL5312-27/S5 33L APL5312-28/S5 33M APL5312-31/S5 33P APL5312-32/S5 33Q APL5312-35/S5 33T APL5312-285/S 33α 5 Product Name Marking Product Name Marking APL5312-17/S5 33B APL5312-18/S5 33C APL5312-21/S5 33F APL5312-22/S5 33G APL5312-25/S5 33J APL5312-26/S5 33K APL5312-29/S5 33N APL5312-30/S5 33O APL5312-33/S5 33R APL5312-34/S5 33S Pin Description PIN No. 1 2 3 4 5 Name VIN GND SHDN BP VOUT I/O I I I O Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 Description Voltage supply input pin GND pin Shutdown control pin, low = off, high = normal Bypass signal pin in fixed output type device Regulator output pin 2 www.anpec.com.tw APL5312 Block Diagram VIN SHDN Thermal Shutdown & Current Limit Shutdown BP VREF _ MOS Driver + VOUT GND Absolute Maximum Ratings Symbol VIN, VOUT Parameter Rating Unit 6.5 V 6.5 V 240 325 ° C /W 410 310 mW 0 to 125 ° C -65 to +150 ° C 260 ° C Input Voltage or Out Voltage SHDN/BP VOUT Shutdown Control Pin/Bypass Signal Pin RTH,JA PD TJ TSTG TL Thermal Resistance-Junction to Ambient (Note) SOT23-5 SC70-5 Power Dissipation, TA = 25° C (Note) SOT23-5 SC70-5 Operating Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10 second) Note: When mounted on a (Copper foil area 50%, 45x45x1.6tmm) glass epoxy board. Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 3 www.anpec.com.tw APL5312 Electrical Characteristics Unless otherwise noted these specifications apply over full temperature, VIN = VOUT+1V, CIN = COUT = 1µ F, TA = -40 to 85 °C .Typical values refer to TA = 25°C. Symbol VIN VOUT ILIMIT IQ IOUT Parameter Test Condition Input Voltage APL5312 Min. Typ. Max. Unit 2.3 6 V -2 2 % Output Voltage Range 1.5 3.5 V Circuit Current Limit 450 500 550 mA IOUT = 0mA 120 160 IOUT = 300mA 120 160 Output Voltage Accuracy Quiescent Current VIN = 5V Load Current 300 µA mA REGLINE Line Regulation VOUT+0.5V<VIN<6V, IOUT = 10mA 0.1 0.3 % REGLOAD Load Regulation VIN = VOUT+1V, 0mA<IOUT<300mA 0.8 1.5 % VOUT =1.5V, IOUT = 300mA 520 680 VOUT = 2V, IOUT = 300mA 430 560 VOUT = 3V, IOUT = 300mA 290 380 f = 1kHz, CBP=10nF, IOUT=10mA f = 10kHz, CBP=10nF, IOUT = 10mA f = 100KHz, CBP = 10nF, IOUT = 10mA 73 VDROP PSRR ISHORT en VSHDN ISHDN IQSHDN TEXIT OTS TC COUT Dropout Voltage (Note) Ripple Rejection Short Current Noise 74 dB 55 VOUT = 0V f = 100Hz to 100kHz, CBP = 10nF, IOUT = 10mA 50 mA 36 µVRMS High Threshold Voltage 1.6 VIN+0.3 Low Threshold Voltage -0.3 0.4 Shutdown Input Bias Current VSHDN = VIN SHDN = Low, Shutdown Supply Current VIN = VOUT+1V Shutdown Exit Delay VOUT = 90%, RLOAD = 50Ω Over Temperature Shutdown Over Temperature Shutdown Hysteresis Output Voltage Temperature TJ = -40~125° C Coefficient Output Capacitor ESR mV V 0.1 1 µA 0.1 1 µA 100 µS 160 ° C 20 ° C 100 ppm/ ° C 1 µF 0.025 1 Ω Note: Dropout voltage definition: VIN-V OUT when V OUT is 2% below the value of VOUT for VIN= VOUT +1V. Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 4 www.anpec.com.tw APL5312 Typical Application Circuit V IN V OUT SHDN BP C OUT C IN 1µ F GND 1 µF C BP 10 nF Typical Characteristics Quiescent Current vs. Output Current Quiescent Current vs. Ambient Temperature 180 120 Quiescent Current (uA) Quiescent Current (uA) 125 115 110 105 100 -40 160 140 V IN=5.5V 120 V IN =4.5V 100 80 60 -15 10 35 60 85 0 Ambient Temperature (°C) Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 50 100 150 200 250 300 Output Current (mA) 5 www.anpec.com.tw APL5312 Typical Characteristics (Cont.) Dropout Voltage vs.Output Current 200 400 180 350 V OUT=2.5V 160 140 Droput Voltage (mv) Quiescent Current (uA) Quiescent Current vs. Input Voltage IOUT=0mA 120 100 80 60 40 300 250 TA=85°C 200 150 TA=25°C 100 50 20 0 0 0 1 2 3 4 5 0 6 Input Voltage (V) 50 100 150 200 250 300 Output Current (mA) Load Transient Dropout Voltage vs. Output Current 600 Dropout Voltage (mV) 500 V OUT(50mv/div) V OUT=1.5V 400 300 V OUT=2.2V 200 100 IOUT(1~300mA) Tr=1µS V OUT=3.3V 0 0 50 100 150 200 250 300 Output Current (mA) Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 Time (0.1ms/div) 6 www.anpec.com.tw APL5312 Typical Characteristics (Cont.) Line Transient Exiting Shutdown Waveform IOUT=100mA CBP=10nF V IN =4.5V~5.5V SHDN(1V/div) V OUT(1V/div) V OUT(50mv/div) IOUT=10mA Time (0.1ms/div) Time (50us/div) Entering Shutdown Delay Shutdown Exit Delay 140 Shutdown Exit Delay (uS) IOUT=100mA CBP=10nF SHDN(1V/div) V OUT(1V/div) 120 100 CBP=10nF 80 60 40 20 0 1.5 Time (0.1ms/div) Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 1.8 2.1 2.4 2.7 3 3.3 Output Voltage (V) 7 www.anpec.com.tw APL5312 Typical Characteristics (Cont.) PSRR vs. Frequency Current Limit vs. Input Volatge 560 T -20 IOUT=10mA 540 -30 Current Limit (mA) PSRR (dB) -40 -50 V IN =5V -60 -70 V IN=4.5V -80 TA=25 °C 520 500 480 TA=85 °C 460 440 -90 420 -100 400 -110 20 100 1k 10k 4 100k 200k 4.5 Frequency (Hz) Maximum Power Dissipation (mW) Output Noise (µVRMS) 140 120 100 80 60 IOUT=100mA IOUT=10mA 20 0 10 100 Rev. A.1 - Sep., 2005 450 400 350 300 SOT23-5 250 200 SC70-5 150 100 50 0 0 BP Capacitance (nF) Copyright ANPEC Electronics Corp. 6 Maximun Power Dissipation vs. Ambient Temperature 160 1 5.5 Input Voltage (V) Output Noise vs. BP Capacitance 40 5 25 50 75 100 125 Ambient Temperature (°C) 8 www.anpec.com.tw APL5312 Typical Characteristics (Cont.) Region of Stable COUT ESR vs. Load Current 100 COUT ESR (Ω) 10 Instable 1 V OUT=2.5V CIN =COUT=1uF,Y5V 0.1 Stable Instable 0.01 0 50 100 150 200 250 300 Output Current (mA) Application Information Output Voltage Selection vs. Load Current). The APL5312 are supplied with factory-set output voltages from 1.5V to 3.5V. Bypass Capacitor Use a 10nF bypass capacitor at BP for low-output voltage noise. The leakage current going into the BP pin should be less than 10nA. Increasing the capacitance slightly decreases the output noise. Value above 0.1µF and below 1nF are not recommended (see the Figure Output Noise vs. BP Capacitance). Capacitor Selection and Regulation Stability The APL5312 uses at least a 1µF capacitor on the input. This capacitor can use Aluminum, Tantalum or Ceramic capacitors. Input capacitor with large value and low ESR provides better PSRR and line-transient response. The output capacitor also can use Aluminum, Tantalum or Ceramic capacitor, and its proper values is at least 1µF, ESR must be above 25mΩ. Large output capacitor values can reduce noise and improve load-transient response, stability, and PSRR. With X5R and Y5V dielectrics, 1µF is sufficient at all operating temperatures. The selection of output capacitor’s is important because it with COUT form a zero to provide the sufficient phase margin (see the Figure COUT ESR Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 Noise, PSRR, and Load-Transient Response The APL5312 is designed to deliver ultra-low noise and high PSRR, as well as low dropout and low quiescent currents in battery–powered systems. When operating from sources other than batteries, improve PSRR and transient response can be achieved by increasing input and output capacitors, and bypass capacitor to from the passive filtering 9 www.anpec.com.tw APL5312 Application Information (Cont.) Noise, PSRR, and Load-Transient Response (Cont.) protection. Thermal protection is designed to protect the IC in the event of fault conditions. techniques (see the Figure Output Noise vs. BP Operating Region and Power Dissipation Capacitance). The thermal resistance of the case and circuit board, ambient and junction air temperature, and the rate of air flow all control the APL5312’s maximum power dissipation. The power dissipation across the device is P = I OUT (VIN-VOUT). The maximum power dissipation is: Shutdown The APL5312 has an active high enable function. Force SHDN high (>1.6V) enables the VOUT, SHDN low (<0.4V) disables the VOUT. Enter the shutdown mode, it also causes the output voltage to discharge through a 500Ω resistance to ground. In shutdown mode, the quiescent current can reduce to 0.1uA. The SHDN pin cannot be floating, a floating SHDN pin may cause an indeterminate state on the output. If it is no use, connect to V IN for normal operation. PMAX = (TJ - TA) / (θJC + θCA ) θJA = θJC + θCA where T J - TA is the temperature difference between the junction and ambient air. θJC is the thermal resistance of the package, θCA is the thermal resistance through the printed circuit board, copper traces, and other materials to the surrounding air, θJA = is the thermal resistance between Junction and ambient air. For continual operation, do not exceed the absolute maximum junction Temperature rating of TJ = 125°C. Input-Output (Dropout) Voltage The minimum input-output voltage differential (dropout) determines the lowest usable supply voltage. The dropout voltage is a function of drain-to-source on resistance multiplied by the load current. Current Limit APL5312 includes a current-limit circuitry for linear regulator. The current limit protection, which sense the current flows the P-channel MOSFET, and controls the output voltage. The point where limiting occurs is IOUT = 500mA . The output can be shorted to ground for an indefinite amount of time without damaging to the part. For example: The SOT23-5 package has maximum power dissipation 300mW at TA= 55°C, relatively 225mW at SC70-5 package (see the Figure Maximum Power Dissipation vs. Ambient Temperature). VIN = 5V, IOUT = 250mA, VOUT = 3.3V, PD = (5-3.3)V x 150mA = 255mW Thermal Protection According the power dissipation issue, we should adapt the SOT23-5 package. It could reduce the thermal resistance to maintain the IC longer life. Thermal protection limits total power dissipation in the APL5312. When the junction temperature exceeds TJ = +160°C, the thermal sensor generate a logic signal to turn off the pass element and let IC to cool. The GND pin provides an electrical connection to ground and channeling heat away. The printed circuit board (PCB) forms a heat sink and dissipates most of the heat into ambient air. When the IC’s junction temperature cools by 20°C, the thermal sensor will turn the pass element on again, resulting in a pulsed output during continuous thermal Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 10 www.anpec.com.tw APL5312 Packaging Information SOT-23-5 e1 5 4 E1 1 E 3 2 e b D A2 A a A1 Dim A A1 A2 b D E E1 e e1 L L1 L2 a L Millimeters Min. 0.95 0.05 0.90 0.35 2.8 2.6 1.5 Inches Max. 1.45 0.15 1.30 0.55 3.00 3.00 1.70 Min. 0.037 0.002 0.035 0.0138 0.110 0.102 0.059 0.35 0.55 0.014 0.7 10° 0.020 0° 0.20 BSC 0.5 0° Max. 0.057 0.006 0.051 0.0217 0.118 0.118 0.067 0.037 0.075 0.95 1.90 Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 L2 L1 0.022 0.008 BSC 11 0.028 10° www.anpec.com.tw APL5312 Packaging Information SC70-5 D e1 θ e L E1 E θ1 L1 b C A1 A2 Symbol A A1 A2 b c D E E1 e e1 L L1 θ θ1 Dimensions In Millimeters Min. Max. 0.80 1.10 0.00 0.10 0.80 1.00 0.15 0.30 0.08 0.25 1.90 2.15 1.15 1.35 2.00 2.20 0.65TYP 1.20 1.40 0.53REF 0.26 0.46 0° 8° 4° 10° Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 12 0.20 A Dimensions In Inches Min. Max. 0.031 0.043 0.000 0.004 0.031 0.039 0.008 0.012 0.003 0.010 0.074 0.084 0.045 0.053 0.078 0.086 0.026TYP 0.047 0.055 0.021PEF 0.010 0.018 0° 8° 4° 10° www.anpec.com.tw APL5312 Physical Specifications Terminal Material Lead Solderability Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. Reflow Condition (IR/Convection or VPR Reflow) tp TP Critical Zone T L to T P Temperature Ramp-up TL tL Tsmax Tsmin Ramp-down ts Preheat 25 t 25 °C to Peak Time Classification Reflow Profiles Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classificatioon Temperature (Tp) Time within 5°C of actual Peak Temperature (tp) Ramp-down Rate Sn-Pb Eutectic Assembly Pb-Free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 217°C 60-150 seconds See table 1 See table 2 10-30 seconds 20-40 seconds 6°C/second max. 6°C/second max. 6 minutes max. 8 minutes max. Time 25°C to Peak Temperature Notes: All temperatures refer to topside of the package .Measured on the body surface. Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 13 www.anpec.com.tw APL5312 Classification Reflow Profiles(Cont.) Table 1. SnPb Entectic Process – Package Peak Reflow Temperature s Package Thickness Volume mm 3 Volume mm 3 <350 ≥350 <2.5 mm 240 +0/-5°C 225 +0/-5°C ≥2.5 mm 225 +0/-5°C 225 +0/-5°C Table 2. Pb-free Process – Package Classification Reflow Temperatures 3 3 3 Package Thickness Volume mm Volume mm Volume mm <350 350-2000 >2000 <1.6 mm 260 +0°C* 260 +0°C* 260 +0°C* 1.6 mm – 2.5 mm 260 +0°C* 250 +0°C* 245 +0°C* ≥2.5 mm 250 +0°C* 245 +0°C* 245 +0°C* *Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C) at the rated MSL level. Reliability Test Program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245°C, 5 SEC 1000 Hrs Bias @125°C 168 Hrs, 100%RH, 121°C -65°C~150°C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1 tr > 100mA Carrier Tape t D P Po E P1 Bo F W Ko Ao Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 D1 14 www.anpec.com.tw APL5312 Carrier Tape (Cont.) T2 J C A B T1 Application SOT23-5 Application A B 178±1 72 ± 1.0 F D D1 3.5 ± 0.05 1.5 +0.1 1.5 +0.1 A B C 178±1 SC70-5 F C J 13.0 + 0.2 2.5 ± 0.15 Po T1 T2 8.4 ± 2 P1 D1 E 4 ± 0.1 1.75± 0.1 Ao Bo Ko t 1.4± 0.1 0.2±0.03 4.0 ± 0.1 2.0 ± 0.1 3.15 ± 0.1 3.2± 0.1 J T1 14.4 ± 0.4 13.0 + 0.2 1.15 ± 0.1 12. ±0.2 D P 1.5± 0.3 W 8.0+ 0.3 - 0.3 Po P1 T2 P E 2.8± 0.2 W 8.0+ 0.3 - 0.1 4 ± 0.1 1.75± 0.1 Ao Bo Ko t 3.5 ± 0.05 1.55± 0.05 1.00 +0.25 4.0 ± 0.1 2.0 ± 0.05 2.4 ± 0.1 2.4± 0.1 1.19± 0.1 0.25±0.013 (mm) Cover Tape Dimensions Application SOT23-5 SC70-5 Carrier Width 8 8 Cover Tape Width 5.3 5.3 Devices Per Reel 3000 3000 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2005 15 www.anpec.com.tw