AS1701, AS1706 D a ta S he e t 1.6W Audio Power Amplifiers 1 General Description 2 Key Features The AS1701 and AS1706 are 1.6W bridged audio power amplifiers that provide excellent circuit reliability, providing a very low-cost solution by eliminating external components when used with 2.7 to 5.5V-powered circuits. ! 2.7 to 5.5V (VDD) Single-Supply Operation ! Very High PSRR: Greater Than 65dB @ 217Hz The devices have superb total harmonic distortion (THD) at high-power output and excellent power supply rejection with 4- and 8Ω-loads. ! THD+Noise: 1.6W into 4Ω at 1% ! No Output Coupling Capacitors Required ! External Gain Configuration Capability ! Low-Power Shutdown Mode: 10nA ! Click and Pop Suppression ! Over-Temperature and Over-Current Protection ! Operating Temperature Range: -40 to +85°C ! 8-pin MSOP Package Integrated over-temperature and over-current protection circuitry switch the devices off in case of an output short-circuit. A digital input allows the devices to automatically switch into shutdown mode. Click- and popsuppression circuitry reduces audible clicks and pops during power-up and shutdown. The gain (AV) of the devices is controlled using external resistors. The AS1701/AS1706 are available in an 8-pin MSOP package. 3 Applications The AS1701/AS1706 are ideal as audio front-ends for battery powered audio devices such as MP3 and CD players, mobile phones, PDAs, portable DVD players, and any other hand-held battery-powered device. Figure 1. Typical Configuration Block Diagram VDD 10µF 20kΩ RF Audio Input CIN RIN 0.33µF 20kΩ + CS 6 4 IN3 VDD – 5 OUT+ + 40kΩ IN+ 40kΩ RL = 4 or 8Ω 50kΩ 2 0.1 to + 1µF CB VDD/2 – 8 + OUT- BIAS Av = -1 1 Bias 50kΩ AS1701/ AS1706 SHDN GND www.austriamicrosystems.com 7 Revision 1.52 1 - 17 AS1701, AS1706 Data Sheet - P i n o u t 4 Pinout Pin Assignments Figure 2. Pin Assignment – 8-Pin MSOP Package (Top View) SHDN 1 8 OUT- BIAS 2 AS1701/ AS1706 7 GND IN+ 3 6 VDD IN- 4 5 OUT+ Pin Descriptions Table 1. Pin Descriptions Pin Name Description 1 SHDN Shutdown. Connect this pin to GND for the AS1701 (active-high); connect this pin to VDD for the AS1706 (active-low). 2 BIAS DC Bias Bypass 3 IN+ Non-Inverting Input 4 IN- Inverting Input 5 OUT+ 6 VDD Power Supply 7 GND Ground 8 OUT- Negative Differential Output www.austriamicrosystems.com Positive Differential Output Revision 1.52 2 - 17 AS1701, AS1706 Data Sheet - A b s o l u t e Maximum Ratings 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Parameter Min Max Unit VDD to GND -0.3 +7 V Any Other Pin to GND -0.3 VDD + 0.3 V Input Current (Latchup Immunity) -100 100 mA JEDEC 78 Continuous Power Dissipation 362 mW TAMB = 70ºC, Derate 4.5mW/ºC Above +70ºC Electro-Static Discharge (ESD) 1 kV HBM MIL-Std883E 3015.7 Methods Operating Temperature Range (TAMB) -40 +85 ºC Storage Temperature Range -65 +150 ºC Soldering Conditions www.austriamicrosystems.com +260 Revision 1.52 ºC Comments The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD020C “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. 3 - 17 AS1701, AS1706 Data Sheet - E l e c t r i c a l Characteristics 6 Electrical Characteristics All specifications are 100% tested at TAMB = +25ºC. 5V Operation VDD = 5V, RL = ∞, CBIAS = 0.1µF to GND, SHDN = GND, TAMB +25ºC (unless otherwise specified). Table 3. DC Electrical Characteristics – 5V Operation Parameter Supply Voltage Range 1 Supply Current Shutdown Supply Current Symbol VDD Conditions Inferred from PSRR Test IDD ISHDN Typ Max 5.5 Units V TAMB = -40 to +85ºC 6.8 10.4 mA SHDN = VDD 0.01 1 µA VIH SHDN Threshold Min 2.7 VDD x 0.7 VDD x 0.3 VDD/2 VDD/2 VDD/2 - 5% + 5% Av = 2, IN- = OUT+, IN- = BIAS ±1 ±10 Inputs Grounded, VRIPPLE = 217Hz 65 200mVp-p, RL = 4Ω, VIN- = VIN+ = 1kHz 63 VBIAS V VIL Common-Mode Bias Voltage 2 VBIAS Output Offset Voltage VOS Power Supply Rejection Ratio PSRR Output Power 3 Total Harmonic Distortion+Noise Thermal-Shutdown Threshold Thermal-Shutdown Hysteresis Power-Up/Enable from Shutdown Time Shutdown Time Turn-Off Transient mV dB 1.6 1.2 0.09 0.05 145 9 ºC ºC tPU 150 ms tSHDN VPOP 1 20 µs mV POUT THD+N RL = 4Ω, THD+N = 1%, fIN = 1kHz RL = 8Ω, THD+N = 1%, fIN = 1kHz AV = 2, RL = 4Ω, fIN = 1kHz, POUT = 1.3W AV = 2, RL = 8Ω, fIN = 1kHz, POUT = 1W V 0.8 W % 1. Quiescent power supply current is specified and tested without loads on the outputs. Quiescent power supply current depends on the offset voltage when a practical load is connected to the device. 2. Common-mode bias voltage is the voltage on pin BIAS and is nominally VDD/2. 3. Guaranteed by design. 3V Operation VDD = 3V, RL = ∞, CBIAS = 0.1µF to GND, SHDN = GND, TAMB +25ºC (unless otherwise specified). Table 4. DC Electrical Characteristics – 3V Operation Parameter 1 Supply Current Shutdown Supply Current Symbol Conditions IDD TAMB = -40 to +85ºC SHDN = VDD R L = 4Ω, THD+N = 1%, fIN = 1kHz 2 POUT Output Power RL = 8Ω, THD+N = 1%, fIN = 1kHz 217Hz VRIPPLE = 200mVp-p, Power Supply Rejection Ratio PSRR RL = 8Ω, VIN- = VIN+ = VBIAS 1kHz AV = 2, RL = 4Ω, fIN = 1kHz, POUT = 500mW Total Harmonic Distortion +Noise THD+N AV = 2, RL = 8Ω, fIN = 1kHz, POUT = 350mW ISHDN Min Typ Max Units 6 10 mA 0.01 0.6 0.4 65 63 0.09 0.06 1 µA W dB % 1. Quiescent power supply current is specified and tested without loads on the outputs. Quiescent power supply current depends on the offset voltage when a practical load is connected to the device. 2. Guaranteed by design. www.austriamicrosystems.com Revision 1.52 4 - 17 AS1701, AS1706 Data Sheet - Ty p i c a l Operating Characteristics 7 Typical Operating Characteristics Figure 3. THD + Noise vs. Output Power; VDD = 3V, RL = 4Ω, Av = 2 Figure 4. THD + Noise vs. Output Power; VDD = 3V, RL = 8Ω, Av = 2 100 100 10 fIN = 1kHz THD+N (%) THD+N (%) 10 1 fIN = 10kHz 0.1 fIN = 1kHz 1 fIN = 10kHz 0.1 fIN = 100Hz 0.01 fIN = 100Hz 0.01 0.001 0.001 0 100 200 300 400 500 600 700 800 0 100 Output Power (mW) Figure 5. THD + Noise vs. Output Power; VDD = 3V, RL = 4Ω, Av = 4 400 500 600 100 10 10 THD+N (%) fIN = 1kHz 1 fIN = 10kHz 0.1 fIN = 1kHz 1 fIN = 10kHz 0.1 fIN = 100Hz fIN = 100Hz 0.01 0.01 0.001 0.001 0 0 100 200 300 400 500 600 700 800 100 Output Power (mW) Figure 7. THD + Noise vs. Output Power; VDD = 5V, RL = 4Ω, Av = 2 200 300 400 500 600 Output Power (mW) Figure 8. THD + Noise vs. Output Power; VDD = 5V, RL = 8Ω, Av = 2 100 100 10 10 fIN = 1kHz 1 fIN = 10kHz 0.1 fIN = 1kHz THD+N (%) THD+N (%) 300 Figure 6. THD + Noise vs. Output Power; VDD = 3V, RL = 8Ω, Av = 4 100 THD+N (%) 200 Output Power (mW) 1 fIN = 10kHz 0.1 fIN = 100Hz fIN = 100Hz 0.01 0.01 0.001 0.001 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 0.4 0.6 0.8 1 1.2 1.4 1.6 Output Power (mW) Output Power (W) www.austriamicrosystems.com 0.2 Revision 1.52 5 - 17 AS1701, AS1706 Data Sheet - Ty p i c a l Operating Characteristics Figure 9. THD + Noise vs. Output Power; VDD = 5V, RL = 4Ω, Av = 4 Figure 10. THD + Noise vs. Output Power; VDD = 5V, RL = 8Ω, Av = 4 100 100 fIN = 1kHz 10 fIN = 1kHz THD+N (%) THD+N (%) 10 1 fIN = 10kHz 0.1 1 fIN = 10kHz 0.1 fIN = 100Hz fIN = 100Hz 0.01 0.01 0.001 0.001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 0 0.2 0.4 0.6 0.8 Output Power (W) Figure 11. THD + Noise vs. Frequency; VDD = 3V, RL = 4Ω, Av = 2 1.2 1.4 1.6 1.8 Figure 12. THD + Noise vs. Frequency; VDD = 3V, RL = 8Ω, Av = 2 10 10 1 THD+N (%) THD+N (%) 1 Output Power (W) 250mW 0.1 1 0.1 200mW 500mW 350mW 0.01 0.01 10 100 1000 10 10000 Frequency (Hz) 10000 Figure 14. THD + Noise vs. Frequency; VDD = 5V, RL = 8Ω, Av = 2 10 10 1 1 THD+N (%) THD+N (%) 1000 Frequency (Hz) Figure 13. THD + Noise vs. Frequency; VDD = 5V, RL = 4Ω, Av = 2 500mW 0.1 100 0.1 300mW 1.4W 700mW 0.01 0.01 10 100 1000 10000 10 Frequency (Hz) www.austriamicrosystems.com 100 1000 10000 Frequency (Hz) Revision 1.52 6 - 17 AS1701, AS1706 Data Sheet - Ty p i c a l Operating Characteristics Figure 16. THD + Noise vs. Frequency; VDD = 5V, RL = 8Ω, Av = 4 10 10 1 1 THD+N (%) THD+N (%) Figure 15. THD + Noise vs. Frequency; VDD = 5V, RL = 4Ω, Av = 4 500mW 0.1 1.4W 500mW 0.1 1W 0.01 0.01 10 100 1000 10000 10 100 Frequency (Hz) 10000 Figure 18. Power Dissipation vs. POUT; VDD = 3V Av = 2, RL = 4Ω, f = 1kHz, THD+N<1% 1.6 700 1.4 600 Power Dissipation (mW) Power Dissipation (W) Figure 17. Power Dissipation vs. POUT; VDD = 5V, Av = 2, RL = 4Ω, f = 1kHz, THD+N<1% 1.2 1.0 0.8 0.6 0.4 0.2 0.0 500 400 300 200 100 0 0.0 0.3 0.6 0.9 1.2 1.5 1.8 0 Output Power (W) 100 200 300 400 500 600 700 Output Power (mW) Figure 19. Power Dissipation vs. POUT; VDD = 5V, Av = 2, RL = 8Ω, f = 1kHz, THD+N<1% Figure 20. Power Dissipation vs. POUT; VDD = 3V Av = 2, RL = 8Ω, f = 1kHz, THD+N<1% 350 Power Dissipation (mW) 1.0 Power Dissipation (W) 1000 Frequency (Hz) 0.8 0.6 0.4 0.2 300 250 200 150 100 50 0 0.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0 1.4 Output Power (W) www.austriamicrosystems.com 100 200 300 400 500 Output Power (mW) Revision 1.52 7 - 17 AS1701, AS1706 Data Sheet - Ty p i c a l Operating Characteristics Figure 21. Output Power vs. Supply Voltage; f = 1kHz, RL = 4Ω, Av = 2 Figure 22. Output Power vs. Supply Voltage; f = 1kHz, RL = 8Ω, Av = 2 3 2 1.8 1.6 Output Power (W) Output Power (W) 2.5 2 POUT@10% (W) 1.5 POUT@1% (W) 1 1.4 POUT@10% (W) 1.2 1 POUT@1% (W) 0.8 0.6 0.4 0.5 0.2 0 0 2.5 3.5 4.5 5.5 2.5 3.5 5.5 Figure 24. PSRR vs. Frequency; VRIPPLE = 200mVPP CBP = CIN = 1µF, RL = 4Ω, Av = 2, Floating Input -20 -20 -30 -30 -40 -40 PSRR (dB) PSRR (dB) Figure 23. PSRR vs. Frequency; VRIPPLE = 200mVPP CBP = CIN = 1µF, RL = 4Ω, Av = 2, In1 Grounded -50 VDD = 5V -60 -50 VDD = 5V -60 VDD = 3V VDD = 3V -70 -70 -80 -80 10 100 1000 10000 10 100000 100 Figure 25. PSRR vs. Frequency; VRIPPLE = 200mVPP CBP = CIN = 1µF, RL = 4Ω, Av = 2, Inputs Grounded 10000 100000 Figure 26. Supply Current vs. Temperature 8 -30 7.5 Supply Current (mA) -20 -40 -50 -60 1000 Frequency (Hz) Frequency (Hz) PSRR (dB) 4.5 Supply Voltage (V) Supply Voltage (V) VDD = 5V VDD = 5V 7 6.5 VDD = 3V 6 5.5 -70 VDD = 3V 5 -80 10 100 1000 10000 -45 100000 Frequency (Hz) www.austriamicrosystems.com -20 0 20 40 60 70 80 90 Temperature (°C) Revision 1.52 8 - 17 AS1701, AS1706 Data Sheet - Ty p i c a l Operating Characteristics Figure 27. Output Power vs. Load Resistance; VDD = 5V Figure 28. Output Power vs. Load Resistance; VDD = 3V 800 2.4 700 POUT@THD = 10% Output Power (W) Output Power (W) 2 POUT@THD = 10% 1.6 1.2 POUT@THD = 1% 0.8 0.4 600 500 400 POUT@THD = 1% 300 200 100 0 0 1 10 Load Resistance (Ω ) www.austriamicrosystems.com 1 100 Revision 1.52 10 Load Resistance (Ω ) 100 9 - 17 AS1701, AS1706 Data Sheet - D e t a i l e d Description 8 Detailed Description The AS1701/AS1706 bridged audio power-amplifiers can deliver 1.6W into 4Ω while operating from a single 2.7 to 5.5V supply. The devices consist of two high-output-current operational amplifiers configured as a bridge-tied load (BTL) amplifier as shown in Figure 29. Figure 29. AS1701 Typical Configuration Block Diagram VDD 0.1µF 20kΩ Audio Input CIN RIN 0.33µF 20kΩ + CS RF VDD IN- – IN+ + OUT+ 40kΩ 40kΩ RL 4 or 8Ω 50kΩ BIAS VDD/2 0.1 to + 1.0µF CB SHDN – + OUT- Av = -1 Bias 50kΩ AS1701 GND The gain of the devices is set by the closed-loop gain of the input operational amplifier. As shown in Figure 29, the output of the first amplifier serves as the input to the second amplifier, which is configured as an inverting unity-gain follower in both devices. This results in two outputs, identical in magnitude, and 180° out-of-phase. Bias The devices operate from a single 2.7 to 5.5V supply and contain an internally generated, common-mode bias voltage of: VDD/2 (EQ 1) referenced to ground. Bias provides click-and-pop suppression and sets the DC bias level for the audio outputs. For selection of the value for the bias bypass capacitor (CBIAS), see Bias Bypass Capacitor on page 13. Pin BIAS is internally connected to the non-inverting input of one amplifier, and should be connected to the non-inverting input of the other amplifier for proper signal biasing (see Figure 29). Shutdown The integrated 100nA, low-power shutdown circuitry reduces quiescent current consumption. As shutdown commences, the bias circuitry is automatically disabled, the device outputs go high impedance, and bias is driven to GND. Note: Connect SHDN to GND for the AS1701 (active-high); connect SHDN to VDD for the AS1706 (active-low). Current Limit The AS1701/AS1706 current limit circuitry protects the device during output short-circuit and overload conditions. When both amplifier outputs are shorted to either VDD or GND, the short-circuit protection is enabled and the amplifier enters a pulsing mode, reducing the average output current to a safe level. The amplifier remains in this mode until the short-circuit or overload condition is corrected. www.austriamicrosystems.com Revision 1.52 10 - 17 AS1701, AS1706 Data Sheet - A p p l i c a t i o n Information 9 Application Information BTL Amplifier The AS1701/AS1706 are designed to drive loads differentially in a bridge-tied load (BTL) configuration. Figure 30. Bridge-Tied Load Configuration VOUT(P-P) +1 2 x VOUT(P-P) VOUT(P-P) -1 Driving the load differentially doubles the output voltage (illustrated in Figure 30) compared to a single-ended amplifier under similar conditions. Thus, the differential gain of the device is twice the closed-loop gain of the input amplifier. The effective gain is calculated by: AVD = 2 x RF (EQ 2) RIN Substituting 2 x VOUT(P-P) into (EQ 3) and (EQ 4) yields four times the output power due to doubling of the output voltage. VRMS = VOUT(P-P) 2 2 POUT = VRMS RL (EQ 3) 2 (EQ 4) Since the differential outputs are biased at mid-supply, there is no net DC voltage across the load, eliminating the need for the large, expensive, performance degrading DC-blocking capacitors required by single-ended amplifiers. Power Dissipation and Heat Sinking Normally, the devices dissipate a significant amount of power. The maximum power dissipation is given in Table 2 as Continuous Power Dissipation, or it can be calculated by: PDISSPKF(MAX) = TJ(MAX) -TA ΘJA (EQ 5) where TJ(MAX) is +150°C, TAMB (see Table 2) is the ambient temperature, and ΘJA is the reciprocal of the derating factor in °C/W. The increased power delivered by a BTL configuration normally results in increased internal power dissipation versus a single-ended configuration. The maximum internal power dissipation for a given VDD and load is calculated by: 2 PDISSPKF(MAX) = www.austriamicrosystems.com 2VDD π2RL Revision 1.52 (EQ 6) 11 - 17 AS1701, AS1706 Data Sheet - A p p l i c a t i o n Information If the internal power dissipation exceeds the maximum allowed for a given package, power dissipation can be reduced by increasing the ground plane heat-sinking capabilities and increasing the size of the traces to the device (see Layout and Grounding Considerations on page 14). Additionally, reducing VDD, increasing load impedance, and decreasing ambient temperature can reduce device power dissipation. The integrated thermal-overload protection circuitry limits the total device power dissipation. Note that if the junction temperature is ≥ +145°C, the integrated thermal-overload protection circuitry will disable the amplifier output stage. If the junction temperature is reduced by 9ºC, the amplifiers will be re-enabled. Note: A pulsing output under continuous thermal overload results as the device heats and cools. Efficiency Efficiency of the AS1701/AS1706 is calculated by taking the ratio of the power delivered to the load, to the power consumed from the power supply. Output power is calculated by: POUT = VPEAK 2 (EQ 7) π2RL where VPEAK is half the peak-to-peak output voltage. In BTL amplifier configurations, the supply current waveform is a full-wave rectified sinusoid with the magnitude proportional to the peak output voltage and load. Calculate the supply current and power drawn from the power supply by: IDD = 2VPEAK (EQ 8) πRL PIN = VDD 2VPEAK πRL (EQ 9) The efficiency of the AS1701/AS1706 is: η= POUT RIN =π POUTRL 2 (EQ 10) 2VDD Component Selection Gain-Setting Resistors External feedback resistors RF and RIN (see Figure 1 on page 1) set the gain of the device as: AVD = 2 x RF RIN (EQ 11) Optimum output offset is achieved when RF = 20kΩ. Device gain can be varied by changing the value of RIN. If used in a high-gain configuration (greater than 8V/V), a feedback capacitor may be required to maintain stability (see Figure 1 on page 1). CF and RF limit the bandwidth of the device, preventing high-frequency oscillations. Note: Ensure that the pole created by CF and RF is not within the frequency band of interest. www.austriamicrosystems.com Revision 1.52 12 - 17 AS1701, AS1706 Data Sheet - A p p l i c a t i o n Information Input Filter Input capacitor CIN (if used), in conjunction with RIN, forms a high-pass filter that removes the DC bias from an incoming signal. CIN allows the amplifier to bias the signal to an optimum DC level. Assuming zero source impedance, the 3dB point of the high-pass filter is given by: f-3dB = 1 2πRINCIN (EQ 12) Select the value for RIN as specified in Gain-Setting Resistors on page 12. Choose the value for CIN such that f-3dB is well below the lowest frequency of interest. Setting f-3dB too high can affect the low-frequency response of the device. Capacitors with dielectrics that have low-voltage coefficients such as tantalum or aluminum electrolytic should be used, since capacitors with high-voltage coefficients, such as ceramics, can increase distortion at low frequencies. Note: Other considerations when designing the input filter include the overall constraints of the system, the frequency band of interest, and click-and-pop suppression. Although hi-fi audio specifies a flat gain response between 20Hz and 20kHz, portable voice reproduction devices such as mobile phones and two-way radios only need address the frequency range of the human voice (~ 300Hz to 3.5kHz). Additionally, speakers used in portable devices typically have poor response below 150Hz. In practice, the input filter may not need to be designed for the 20Hz to 20kHz range, which could save PCB space and design costs since only small capacitors would be required. Bias Bypass Capacitor The bias bypass capacitor, CBIAS, improves PSRR and THD+N by reducing power supply noise at the common-mode bias node, and serves as the primary click- and pop-suppression component. CBIAS is fed from an internal 25kΩ source, and controls the rate at which the common-mode bias voltage rises at power-up and falls during shutdown. For optimal click- and pop-suppression, ensure that the input capacitor (CIN) is fully charged (ten time constants) before CBIAS. The value of CBIAS for best click- and pop-suppression is given by: CBIAS ≤ 10 CINRIN 25kΩ (EQ 13) Note: A larger CBIAS value yields higher PSRR. Click- and Pop-Less Operation AC-coupling capacitors (CIN) along with CBIAS facilitate click- and pop-less power-up and shutdown. The value of CBIAS determines the rate at which the mid-rail bias voltage rises on power-up and falls when entering shutdown. On power-up, CIN is charged to its quiescent DC voltage through the RF from the output. The current generated creates a voltage transient at the amplifier output, which can result in an audible pop. Minimizing the value of CIN reduces this effect, optimizing click-and-pop suppression. For more information see Bias on page 10 and Bias Bypass Capacitor on page 13. Supply Bypassing Proper power supply bypassing – connect a 0.1µF ceramic capacitor in parallel with a 10µF ceramic capacitor from VDD to GND – will ensure low-noise, low-distortion performance of the device. Additional bulk capacitance can be added as required. Note: Place the capacitors as close to the device as possible. Volume Control The addition of a digital potentiometer (AS1500 family) used as an input attenuator, can provide simple volume control for the AS1701/AS1706. Connect the high terminal of the AS150x to the audio input, the low terminal to ground and the AS150x wiper to CIN (as shown in Figure 31). Setting the wiper to the top position passes the audio signal unattenuated; setting the wiper to the lowest position fully attenuates the input. www.austriamicrosystems.com Revision 1.52 13 - 17 AS1701, AS1706 Data Sheet - A p p l i c a t i o n Information Figure 31. Volume Control Configuration RF Audio Input H 5 CIN RIN 4 IN- AS1701/ AS1706 OUT+ 8 OUT- AS150x L For more information on the AS1500 family of digital potentiometers, refer to the latest version of the AS150x data sheet, available from the austriamicrosystems website http://www.austriamicrosystems.com. Layout and Grounding Considerations Well designed PC board layout is essential for optimizing device performance. Use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance and route heat away from the device. Sufficient grounding improves audio performance, minimizes crosstalk between channels, and prevents digital switching noise from coupling onto the audio signal. Refer to Power Dissipation and Heat Sinking on page 11 for heat sinking considerations. www.austriamicrosystems.com Revision 1.52 14 - 17 AS1701, AS1706 Data Sheet - P a c k a g e Drawings and Markings 10 Package Drawings and Markings Figure 32. 8-pin MSOP Package Symbol Millimeters ± Tolerance Symbol Millimeters ± Tolerance A 1.10 Max b 0.33 +0.07 to -0.08 A1 0.10 ±0.05 b1 0.30 ±0.05 A2 0.86 ±0.08 c 0.18 ±0.05 D 3.00 ±0.10 c1 0.15 +0.03 to -0.02 D2 2.95 ±0.10 θ1 3.0º ±3.0º E 4.90 ±0.15 θ2 12.0º ±3.0º E1 3.00 ±0.10 θ3 12.0º ±3.0º E2 2.95 ±0.10 L 0.55 ±0.15 E3 0.51 ±0.13 L1 0.95 BSC E4 0.51 ±0.13 aaa 0.10 R 0.15 +0.15 to -0.08 bbb 0.08 R1 0.15 +0.15 to -0.08 ccc 0.25 t1 0.31 ±0.08 e .65 BSC t2 0.41 ±0.08 S .525 BSC Notes: 1. 2. 3. 4. 5. 6. 7. All dimensions are in millimeters (angle in degrees), unless otherwise specified. Datums B and C to be determined at datum plane H. Dimensions D and E1 are to be determined at datum plane H. Dimensions D2 and E2 are for top package and D and E1 are for bottom package. Cross section A-A to be determined at 0.13 to 0.25mm from the lead tip. Dimensions D and D2 do not include mold flash, protrusion, or gate burrs. Dimension E1 and E2 do not include interlead flash or protrusion. www.austriamicrosystems.com Revision 1.52 15 - 17 AS1701, AS1706 Data Sheet - O r d e r i n g Information 11 Ordering Information The devices are available as the standard products shown in Table 5. Table 5. Ordering Information Part Number Description SHDN Delivery Form Package Type AS1701 1.6W Audio Power Amplifier Active-High Tube 8-pin MSOP AS1701-T 1.6W Audio Power Amplifier Active-High Tape and Reel 8-pin MSOP AS1706 1.6W Audio Power Amplifier Active-Low Tube 8-pin MSOP AS1706-T 1.6W Audio Power Amplifier Active-Low Tape and Reel 8-pin MSOP www.austriamicrosystems.com Revision 1.52 16 - 17 AS1701, AS1706 Data Sheet Copyrights Copyright © 1997-2007, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact www.austriamicrosystems.com Revision 1.52 17 - 17