AT27C020 Features • Fast Read Access Time - 55 ns • Low Power CMOS Operation • • • • • • • – 100 µA max. Standby – 25 mA max. Active at 5 MHz JEDEC Standard Packages – 32-Lead 600-mil PDIP – 32-Lead PLCC – 32-Lead TSOP 5V ± 10% Supply High-Reliability CMOS Technology – 2,000V ESD Protection – 200 mA Latchup Immunity Rapid™ Programming Algorithm - 100 µs/byte (typical) CMOS and TTL Compatible Inputs and Outputs Integrated Product Identification Code Commercial and Industrial Temperature Ranges 2-Megabit (256K x 8) OTP EPROM AT27C020 Description The AT27C020 is a low-power, high performance 2,097,152-bit one-time programmable read only memory (OTP EPROM) organized as 256K by 8 bits. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 55 ns, eliminating the need for speed reducing WAIT states on high performance microprocessor systems. In read mode, the AT27C020 typically consumes 8 mA. Standby mode supply current is typically less than 10 µA. PLCC Top View Addresses O0 - O7 Outputs CE Chip Enable OE Output Enable PGM Program Strobe A7 A6 A5 A4 A3 A2 A1 A0 O0 4 3 2 1 32 31 30 A0 - A17 5 6 7 8 9 10 11 12 13 29 28 27 26 25 24 23 22 21 14 15 16 17 18 19 20 Function A14 A13 A8 A9 A11 OE A10 CE 07 01 02 GND 03 04 05 06 Pin Name A12 A15 A16 VPP VCC PGM A17 Pin Configurations TSOP Top View Type 1 PDIP Top View VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC PGM A17 A14 A13 A8 A9 A11 OE A10 CE 07 06 05 04 03 A11 A9 A8 A13 A14 A17 PGM VCC VPP A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE 07 06 05 04 03 GND 02 01 O0 A0 A1 A2 A3 Rev. 0570C-B–12/97 1 The AT27C020 is available in a choice of industry standard JEDEC-approved one-time programmable (OTP) plastic PDIP, PLCC, and TSOP packages. All devices feature twoline control (CE, OE) to give designers the flexibility to prevent bus contention. With 256K byte storage capability, the AT27C020 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel’s 27C020 have additional features to ensure high quality and efficient production use. The Rapid™ Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. Block Diagram 2 AT27C020 System Considerations Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V CC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. AT27C020 Absolute Maximum Ratings* Temperature Under Bias.......................-55°C to +125°C *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns. Storage Temperature............................-65°C to +150°C Voltage on Any Pin with Respect to Ground ............................... -2.0V to +7.0V(1) Voltage on A9 with Respect to Ground ............................ -2.0V to +14.0V(1) 1. VPP Supply Voltage with Respect to Ground ............................. -2.0V to +14.0V(1) Operating Modes Mode/Pin CE OE PGM Ai VPP Outputs Read VIL VIL X(1) Ai X DOUT Output Disable X VIH X X X High Z VIH X X X X High Z VIL VIH VIL Ai VPP DIN PGM Verify VIL VIL VIH Ai VPP DOUT PGM Inhibit VIH X X X VPP High Z X A9 = VH(3) A0 = VIH or VIL A1 - A17 = VIL X Identification Code Standby Rapid Program (2) Product Identification Notes: (4) VIL VIL 1. X can be VIL or VIH. 2. Refer to Programming Characteristics. 3. VH = 12.0 ± 0.5V. 4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte. 3 DC and AC Operating Conditions for Read Operation AT27C020 Operating Temperature (Case) -55 -70 -90 -12 -15 Com. 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C Ind. -40°C - 85C -40°C - 85C -40°C - 85C -40°C - 85C -40°C - 85C 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% VCC Power Supply DC and Operating Characteristics for Read Operation Symbol Parameter Condition ILI Input Load Current Output Leakage Current ILO IPP (2) VPP (1) Read/Standby Current Min Max Units VIN = 0V to VCC (Com., Ind.) ±1.0 µA VOUT = 0V to VCC (Com., Ind.) ±5.0 µA VPP = VCC ±10 µA ISB1 (CMOS), CE = VCC ± 0.3V 100 µA ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1.0 mA f = 5 MHz, IOUT = 0 mA, CE = VIL 25 mA ISB VCC(1) Standby Current ICC VCC Active Current VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 VCC + 0.5 V VOL Output Low Voltage IOL = 2.1 mA 0.4 V VOH Output High Voltage IOH = -400 µA Notes: 2.4 V 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. VPP may be connected directly to VCC except during programming. The supply current would then be the sum of ICC and IPP. AC Characteristics for Read Operation AT27C020 -55 4 Min Max Min -90 Parameter tACC(3) Address to Output Delay CE = OE = VIL 55 70 90 tCE(2) CE to Output Delay OE = VIL 55 70 tOE(2)(3) OE to Output Delay CE = VIL 20 tDF(4)(5) OE or CE High to Output Float, whichever occurred first 18 tOH Output Hold from Address, CE or OE,whichever occurred first 7 1. 2, 3, 4, 5. See AC Waveforms for Read Operation diagram. AT27C020 7 Max Min -12 Symbol Note: Condition -70 Max Units 120 150 ns 90 120 150 ns 30 35 35 40 ns 20 20 30 40 ns 0 Max Min -15 0 Max Min 0 ns AT27C020 AC Waveforms for Read Operation(1) Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC. 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. Input Test Waveforms and Measurement Levels Output Test Load (1) For -55 devices only: 3.0V AC DRIVING LEVELS 1.5V AC MEASUREMENT LEVEL 0.0V tR, tF < 5 ns (10% to 90%) Note: For -70,-90,-12,-15 devices only: 1. CL = 100 pF including jig capacitance except -55 devices where CL = 30 pF. tR, tF < 20 ns (10% to 90%) Pin Capacitance f = 1 MHz, T = 25°C(1) Typ Max Units Conditions CIN 4 8 pF VIN = 0V COUT 8 12 pF VOUT = 0V Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. 5 Programming Waveforms (1) Notes: 1. The Input Timing reference is 0.8V for VIL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. 3. When programming the AT27C020, a 0.1 µF capacitor is required across VPP and ground to suppress voltage transients. DC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Limits 6 Symbol Parameter Test Conditions ILI Input Load Current VIN = VIL, VIH VIL Input Low Level VIH Input High Level VOL Output Low Voltage IOL = 2.1 mA VOH Output High Voltage IOH = -400 µA ICC2 VCC Supply Current (Program and Verify) IPP2 VPP Supply Current VID A9 Product Identification Voltage AT27C020 Min Max Units ±10 µA -0.6 0.8 V 2.0 VCC + 1.0 V 0.4 V 2.4 CE = PGM = VIL 11.5 V 40 mA 20 mA 12.5 V AT27C020 AC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V,VPP = 13.0 ± 0.25V Limits Test Condition (1) Min Max Units Symbol Parameter tAS Address Setup Time 2 µs tCES CE Setup Time 2 µs tOES OE Setup Time 2 µs tDS Data Setup Time 2 µs tAH Address Hold Time 0 µs tDH Data Hold Time 2 µs Input Rise and Fall Times: (10% to 90%) 20 ns. Input Pulse Levels: 0.45V to 2.4V tDFP OE High to Output Float Delay tVPS VPP Setup Time tVCS VCC Set up Time 0 Input Timing Reference Level: 0.8V to 2.0V tPW PGM Program Pulse Width(3) tOE Data Valid from OE tPRT VPP Pulse Rise Time During Programming Notes: (2) Output Timing Reference Level: 0.8V to 2.0V 130 ns 2 µs 2 µs 95 105 µs 150 ns 50 ns 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven — see timing diagram. 3. Program Pulse width tolerance is 100 µs ± 5%. Atmel’s 27C020 Integrated Product Identification Code Pins Codes A0 O7 O6 O5 O4 O3 O2 O1 O0 Hex Data Manufacturer 0 0 0 0 1 1 1 1 0 1E Device Type 1 1 0 0 0 0 1 1 0 86 7 Rapid Programming Algorithm A 100 µs PGM pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs PGM pulse without verification. Then a verification / reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails. 8 AT27C020 AT27C020 Ordering Information ICC (mA) tACC (ns) Active Standby 55 25 0.1 AT27C020-55JC AT27C020-55PC AT27C020-55TC 32J 32P6 32T Commercial (0°C to 70°C) 25 0.1 AT27C020-55JI AT27C020-55PI AT27C020-55TI 32J 32P6 32T Industrial (-40°C to 85°C) 25 0.1 AT27C020-70JC AT27C020-70PC AT27C020-70TC 32J 32P6 32T Commercial (0°C to 70°C) 25 0.1 AT27C020-70JI AT27C020-70PI AT27C020-70TI 32J 32P6 32T Industrial (-40°C to 85°C) 25 0.1 AT27C020-90JC AT27C020-90PC AT27C020-90TC 32J 32P6 32T Commercial (0°C to 70°C) 25 0.1 AT27C020-90JI AT27C020-90PI AT27C020-90TI 32J 32P6 32T Industrial (-40°C to 85°C) 25 0.1 AT27C020-12JC AT27C020-12PC AT27C020-12TC 32J 32P6 32T Commercial (0°C to 70°C) 25 0.1 AT27C020-12JI AT27C020-12PI AT27C020-12TI 32J 32P6 32T Industrial (-40°C to 85°C) 25 0.1 AT27C020-15JC AT27C020-15PC AT27C020-15TC 32J 32P6 32T Commercial (0°C to 70°C) 25 0.1 AT27C020-15JI AT27C020-15PI AT27C020-15TI 32J 32P6 32T Industrial (-40°C to 85°C) 70 90 120 150 Ordering Code Package Operation Range Package Type 32J 32-Lead,Plastic J-Leaded Chip Carrier (PLCC) 32P6 32-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 32T 32-Lead, Plastic Thin Small Outline Package (TSOP) 9