1. Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Thermal Sensitive Layer Over a 0.35 µm CMOS Array
Image Zone: 0.4 × 11.6 mm
Image Array: 8 × 232 = 1856 pixels
Pixel Pitch: 50 × 50 µm = 500 dpi Resolution
Serial Peripheral Interface (SPI) - 2 Modes:
– Fast Mode at 16 Mbps Max for Imaging
– Slow Mode at 200 kbps Max for Navigation and Control
Operating Voltage: 2.3 to 3.6V
Operating Temperature Range: -40°C to 85°C
Finger Sweeping Speed from 2 to 20 cm/second
Low Power: 4.5 mA (Image Acquisition), 1.5 mA (Navigation), <10 µA (Sleep Mode)
Hard Protective Coating (>4 Million Sweeps)
High Protection from Electrostatic Discharge
Small Form Factor Packaging
Direct PCB integration through High Reliability Snap in Holder
Comply with the European Directive for Restriction of Hazardous Substances (RoHS
Directive)
2. Description
This document describes the specifications of Atmel’s AT77C104B fingerprint sensor
dedicated to PDA, cellular and smartphone applications. Based on FingerChip® thermal technology, the AT77C104B is a linear sensor that captures fingerprint images by
sweeping the finger over the sensing area. This product embeds true hardware-based
8-way navigation and click functions.
AT77C104B
3. Applications
• Scrolling, Menu and Item Selection for PDAs, Cellular or Smartphone Applications
• Cellular and Smartphones-based Security (Device Protection, Network and ISP
•
•
•
•
Access, E-commerce)
Personal Digital Agenda (PDA) Access
User Authentication for Private and Confidential Data Access
Portable Fingerprint
Fingerprint Acquisition
Figure 3-1.
FingerChip
Thermal
Fingerprint
Sweep Sensor,
Hardware
Based,
Navigation and
Click Function,
SPI Interface
Note: Not reccomended
for new designs. No longer
supported by Atmel.
Packages Available
CB08YV
CB12YI
CB09YV
5347F-BIOM-3/08
Figure 3-2.
Notes:
Product Integration Solution
1. Product Integration Solution available for CB08 Only
2. Please contact Support for additional documentation regarding integration of this product
Figure 3-3.
FingerChip with Holder
Table 3-1.
Pin Description for Chip-on-board Package: AT77C104B-CB08YV or AT77C104B-CH08YV
Pin Number
Name
Type
Description
1
Not connected
2
Not connected
3
Not connected
4
Not connected
5
GNDD
G
Digital ground supply
6
GNDA
G
Analog ground supply - connect to GNDD
7
VDDD
P
Digital power supply
8
VDDA
P
Analog power supply - connect to VDD
9
SCK
I
Serial Port Interface (SPI) clock
10
TESTA
IO
Reserved for the analog test, not connected
11
MOSI
I
Master-out slave-in data
12
TPP
P
Temperature stabilization power
13
MISO
O
Master-in slave-out data
14
SCANEN
I
Reserved for the scan test in factory, must be grounded
15
SSS
I
Slow SPI slave select (active low
16
IRQ
O
Interrupt line to host (active low). Digital test pin
17
FSS
I
Fast SPI slave select (active low)
18
RST
I
Reset and sleep mode control (active high)
19
FPL
I
Front plane, must be grounded
Note:
2
The die attach is connected to pin 6 and must be grounded. The FPL pin must also be grounded.
AT77C104B
5347F–BIOM–3/08
AT77C104B
Table 3-2.
Pin Description for Chip-on-Board Package: AT77C104B-CB09YV
Pin
Name
Description
1
GNDD
Digital ground supply
2
GNDA
Digital ground supply
3
VDDD
Digital power supply
4
VDDA
Digital power supply
5
SCK
Serial Port Interface (SPI) clock
6
TESTA
Reserved for the analog test, not connected
7
MOSI
Master-out slave-in data
8
TPP
Temperature stabilization power
9
MISO
Master-in slave-out data
10
SCANEN
Reserved for the scan test in factory, must be grounded
11
SSS
Slow SPI slave select (active low
12
IRQ
Interrupt line to host (active low). Digital test pin
13
FSS
Fast SPI slave select (active low)
14
RST
Reset and sleep mode control (active high)
15
FPL
Front plane, must be grounded
3
5347F–BIOM–3/08
Table 3-3.
Pin Description for COB with Connector Package: AT77C104B-CB12YI
Pin Number
Name
Type
Description
1
GNDA
G
Analog ground supply - connect to GNDD
2
FPL
I
Front plane, must be grounded
3
GNDD
G
Digital ground supply
4
VDDD
P
Digital power supply
5
SCK
I
Serial Port Interface (SPI) clock
6
MOSI
I
Master-out slave-in data
7
MISO
O
Master-in slave-out data
8
GNDA
G
Analog ground supply - connect to GNDD
9
SSS
I
Slow SPI slave select (active low)
10
GNDA
G
Analog ground supply - connect to GNDD
11
GNDA
G
Analog ground supply - connect to GNDD
12
FSS
I
Fast SPI slave select (active low)
13
RST
I
Reset and sleep mode control (active high)
14
IRQ
O
Interrupt line to host (active low). Digital test pin
15
SCANEN
I
Reserved for the scan test in factory, must be grounded
16
TPP
P
Temperature stabilization power
17
TESTA
IO
Reserved for the analog test, not connected
18
VDDA
P
Analog power supply - connect to VDD
19
GNDA
G
Analog ground supply - connect to GNDD
20
GNDA
G
Analog ground supply - connect to GNDD
Note:
4
Ref. Connector plug: 2-1470841-0.
Ref. Connector Receptacle: 2-1470842-0
from Tyco Electronics 0.5mm Pitch.
Stack height: 1.5mm
AT77C104B
5347F–BIOM–3/08
AT77C104B
Figure 3-4.
Typical Application
VDDD
VDDD
10 kΩ
10 kΩ
TESTA
IRQ
MISO
TPP
VDDD
MOSI
10µF
SCK
GNDD
SSS
VDDA
FSS
SCANEN
NC VDDD
VDDA
10µF
GNDA
FPL
GND
GND
RST
The pull-up must be implemented for the master controller. The noise should be lower than 30
mV peak-to-peak on VDDA and VDDD.
Figure 3-5.
Pin Description - CB08
NC
NC
NC
NC
GNDD
GNDA
VDDD
VDDA
SCK
TESTA
MOSI
TPP
MISO
SCANEN
SSS
IRQ
FSS
RST
FPL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Bottom View
Top View
5
5347F–BIOM–3/08
Figure 3-6.
Pin Description - CB09
GNDD
GNDA
VDDD
VDDA
SCK
TESTA
MOSI
TPP
MISO
SCANEN
SSS
IRQ
FSS
RST
FPL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Bottom View
Figure 3-7.
Pin Description - CB12
Top View
Note:
Top View
10
11
1
20
Bottom View
Refer to Table 3-3 for the pin name.
The TESTA pin is only used for testing and debugging. The SCANEN pin is not used in the final
application and must be connected to ground.
Warning: SSS and FSS must never be low at the same time. When both SSS and FSS equal
0, the chip switches to scan test mode. With the SPI protocol, this configuration is not
possible as only one slave at a time can be selected. However, this configuration
works when debugging the system.
3.1
AT77C104B-CH08YV integration solution
This product is an assembly of a standard AT77C104B-CB08YV sensor and an elastomer in a
plastic part. This product includes the connectics: it can directly be clipped on the main board.
6
AT77C104B
5347F–BIOM–3/08
AT77C104B
4. Specifications
Table 4-1.
Absolute Maximum Ratings
Parameter
Symbol
Power Supply Voltage
Comments
Value
VDDD, VDDA
-0.5 to 4.6V
Front Plane
FPL
GND to VDD +0.5V
Digital Input
SSS, FSS,
SCK, MOSI
GND to VDD +0.5V
Temperature Stabilization
Power
TPP
GND to VDD +0.5V
Storage Temperature
Tstg
-50 to +95°C(1)
Lead Temperature
(soldering 10 seconds)
Note:
Tleads
Do not solder
Forbidden
Note: Stresses beyond those listed
under “Absolute Maximum
Ratings” may cause permanent
damage to the device. These are
stress ratings only and functional
operation of the device at these or
any other conditions beyond those
indicated in the operational
sections of this specification is not
implied. Exposure to absolute
maximum rating conditions for
extended periods may affect device
reliability.
1. -40°C to 85°C for the AT77C104B-CH08YV product with holder.
Table 4-2.
Recommended Conditions of Use
Parameter
Symbol
Comments
Min
Typ
Max
Unit
Positive Supply Voltage
VDD
2.5 ±5%
3.3 ±10%
2.3
2.5
3.3
3.6
V
Front Plane
FPL
Must be grounded
GND
V
Digital Input Voltage
CMOS levels
V
Digital Output Voltage
CMOS levels
V
Digital Load
20
CL
50
pF
Operating Temperature Range
Tamb
Domestic "V" grade
-40 to +85
°C
Operating Temperature Range
Tamb
Domestic "I" grade
-20 to +80
°C
Maximum Current on TPP
ITPP
Use of TPP is optional
0
-
60
mA
7
5347F–BIOM–3/08
Table 4-3.
Resistance
Parameter
Min Value
Standard Method
2 kV
MIL-STD-883 method 3015.7
±16 kV
NF EN 6100-4-2
200,000
MIL E 12397B
4 hours
Internal method
ESD
On pins HBM (Human Body Model) CMOS I/O
On die surface (zap gun) air discharge
Mechanical Abrasion
Number of cycles without lubricant
Multiply by a factor of 20 for correlation with a real finger
Chemical Resistance
Cleaning agent, acid, grease, alcohol, diluted acetone
Table 4-4.
Explanation of Test Levels
Level
Description
I
100% production tested at +25°C
II
100% production tested at +25°C, and sample tested at specified temperatures (AC testing done on sample)
III
Sample tested only
IV
Parameter is guaranteed by design and/or characterization testing
V
Parameter is a typical value only
VI
100% production tested at temperature extremes
D
100% probe tested on wafer at Tamb = +25°C
Table 4-5.
Specifications
Parameter
Symbol
Test Level
Min
Typ
Max
Unit
Resolution
IV
50
Micron
Size
IV
8 × 232
Pixel
Yield: Number of bad pixels
I
Equivalent Resistance on TPP pin
I
8
23
35
5
Bad pixels
47
Ohm
AT77C104B
5347F–BIOM–3/08
AT77C104B
5. Power Consumption and DC Characteristics
The following characteristics are applicable to the operating temperature -40°C ≤ Ta ≤ +85°C.
Typical conditions are: power supply = 3.3V; Tamb = 25°C; FSCK = 12 MHz (1600 slices per second); duty cycle = 50%
CLOAD 120 pF on digital outputs unless otherwise specified.
Table 5-1.
Power Requirements
Name
Parameter
VDD
Test Level
Min
Typ
Max
Unit-
Positive Supply Voltage
I
2.3
2.5/3.3
3.6
V
IDD
Current on VDD in Acquisition
Mode
I
3
4.5
6
mA
IDDNAV
Current on VDD in Navigation Mode
I
1
1.5
2
mA
IDDCLI
Current on VDD in Click Mode
I
0.2
0.3
0.5
mA
IDDSLP
Current on VDD in Sleep Mode
I
10
µA
IDDSTB
Current on VDD in Stand-by Mode
I
Table 5-2.
Conditions
Digital Inputs
Logic Compatibility
Name
Parameter
IIL
CMOS
Conditions
Test Level
Low-level Input Current Without
Pull-up Device(1)
VI = 0V
IIH
High-level Input Current Without
Pull-up Device
IIOZ
Tri-state Output Leakage Without
Pull-up/down Device
VIL
Low-level Input Voltage
VIH
High-level Input Voltage
VHYST
Schmitt Trigger Hysteresis(1)
Note:
Max
Unit
I
1
µA
VI = VDD
I
1
µA
VI = 0V or VDD
IV
1
µA
VOH
Typ
0.3 VDD
V
I
I
VDD = 3.3V
Temp = 25°C
IV
0.7 VDD
(1)
V
0.400
0.750
V
Digital Outputs
Logic Compatibility
VOL
Min
1. A minimum noise margin of 0.05 VDD should be taken for Schmitt trigger input threshold switching levels compared to VIL and
VIH values.
Table 5-3.
Name
Refer to “Power Management” on page 34
Parameter
Low-level Output Voltage
CMOS
Conditions
IOL = 3 mA
VDD = 3.3V ±10%
Test Level
Min
I
IOL = 1.75 mA
VDD = 2.5V ±5%
High-level Output Voltage
IOH = -3 mA
VDD = 3.3V ±10%
IOH = -1.75 mA
VDD = 2.5V ±5%
I
0.85 VDD
Typ
Max
Unit
0.15 VDD (1)
V
V
9
5347F–BIOM–3/08
6. Switching Performances
The following characteristics are applicable to the operating temperature –40°C ≤ Ta ≤ +85°C.
Typical conditions are: nominal value; Tamb = 25°C; FSCK = 12 MHz; duty cycle = 50%; CLOAD 120 pF in digital output unless
specified otherwise.
Table 6-1.
Timings
Parameter
Symbol
Test Level
Min
Clock Frequency Acquisition
Mode
FACQ
IV
Clock Frequency Navigation
Mode and Chip Control
FCTRL
Max
Unit
8
16
MHz
I
–
0.2
MHz
DC
IV
20
80
%
TRSTSU
I
½ TSCK(1)
ns
I
(1)
ns
(1)
ns
Duty Cycle (clock SCK)
Reset Setup Time
Slave Select Setup Time
TSSSU
Slave Select Hold Time
Note:
TSSHD
I
Typ
50
½ TSCK
½ TSCK
1. TSCK = 1/FCTRL (clock period)
Table 6-2.
3.3V ±10% Power Supply
Parameter
Symbol
Test Level
Data-in Setup Time
TSU
IV
3
ns
Data-in Hold Time
TH
IV
1
ns
Data-out Valid
TV
I
Data-out Disable Time from SS
High
TDIS
IV
IRQ Hold Time
TIRQ
IV
Note:
Min
Typ
Max
30
3.8
Unit
ns
ns
3
µs
Max
Unit
All power supplies = +3.3V
Table 6-3.
2.5V ±5% Power Supply
Parameter
Symbol
Test Level
Data-in Setup Time
TSU
IV
3
ns
Data-in Hold Time
TH
IV
1
ns
Data-out Valid
TV
I
Data-out Disable Time from SS
High
TDIS
IV
IRQ Hold Time
TIRQ
IV
Note:
10
Min
Typ
30
3.8
ns
ns
3
µs
All power supplies = +2.5V
AT77C104B
5347F–BIOM–3/08
AT77C104B
7. Timing Diagrams: Slow and Fast SPI Interface
Figure 7-1.
Read Timing Fast SPI Slave Mode
RST
SS
Trstsu Tsssu
DC
Tsshd
SCK
Tdis
Tv
MISO
Figure 7-2.
Read/Write Timing Slow SPI Slave Mode
SS
Tsssu
Tsshd
SCK
Tsu
Th
MOSI
MISO
Figure 7-3.
Read Status Register to Release IRQ
SS
SCK
1
MOSI
1
0
0
0
0
X
X
Tirq
IRQ
Figure 7-4.
Chip Initialization
RST
Min = 10 μs
SS
Trstsu
SCK
MISO
11
5347F–BIOM–3/08
8. Functional Description
The AT77C104B is a fingerprint sensor based on FingerChip technology. It is controlled by an
SPI serial interface through which output data is also transferred (a slow SPI for the pointing
function and a fast one for acquisition). Six modes are implemented:
– Sleep Mode: a very low consumption mode controlled by the reset pin RST. In this
mode, the internal clocks are disabled and the registers are initialized.
– Stand-by Mode: also a low consumption mode that waits for an action from the
host. The slow serial port interface (SSPI) and control blocks are activated. In this
mode the oscillator can remain active.
– Click Mode: waits for a finger on the sensor. The SSPI and control blocks are
activated. The local oscillator, the click array and the click block are all activated.
– Navigation Mode: calculates the finger’s x and y movements across the sensor.
The SSPI and control blocks are still activated. The local oscillator, the navigation
array and the navigation block are also activated.
– Acquisition Mode: slices are sent to the host for finger reconstruction and
identification. The SSPI and control blocks are still activated. The fast serial port
interface block (FSPI) and the acquisition array are activated, as well as the local
oscillator when watchdog is required.
– Test: this mode is reserved for factory testing.
In the final application, three main modes are used:
– Stand-by: low consumption mode
– Pointing: equivalent to click and navigation modes
– Acquisition: fingerprint image capture
Note:
12
The term "host" describes the processor (controller, DSP...) linked to the sensor. It is the master. In
the description of n-bit registers (see “Function Registers” on page 14), the term "b0"
describes the Least Significant Bit (LSB). The term “b(n-1)” describes the Most Significant Bit
(MSB). Binary data is written as 0b_ and hexadecimal data as 0x_.
AT77C104B
5347F–BIOM–3/08
AT77C104B
9. Sensor and Block Diagram
Figure 9-1.
TPP
Functional Block Diagram
FPL
VDDA
GNDA
VDDD
GNDD
RST
FSS
Acquisition
Pixel Array
(232 x 8)
Fast Serial
Interface
SPI
(8-16 MHz)
Array
CTRL
Navigation
Algorithms
Oscillator (420 kHz)
Click Pixels
(12)
SCK
Click
CTRL
Click
Algorithm
MISO
Slow Serial
Interface
SPI
(200 kHz)
+
Control
Register
MOSI
SSS
IRQ
Watchdog
Heating
SCANEN
Test
TESTA
The circuit is divided into the following main sections:
• An array or frame of 8 x 232 pixels + 1 dummy column
• An analog to digital converter
• An on-chip oscillator
• Control and status registers
• Navigation and click units
• Slow and fast serial interfaces
13
5347F–BIOM–3/08
10. Function Registers
Table 10-1.
Register
Address (b3 down to b0)
Read/Write
STATUS
0000
Read
MODECTRL
0001
Read/Write
ENCTRL
0010
Read/Write
HEATCTRL
0011
Read/Write
NAVCTRL
0100
Read/Write
CLICKCTRL
0101
Read/Write
MOVCTRL
0110
Read/Write
0111
Reserved
NAVIGATION
(1)
1000
Read
NAVIGATION
(1)
1001
Reserved
NAVIGATION
(1)
1010
Reserved
PIXELCLICK
1011
Reserved
PIXELCLICK
1100
Reserved
PIXELCLICK
1101
Reserved
1110
Reserved
Note:
14
Registers
1. Navigation requires 3 registers. The reading of the first register (0b1000) enables the reading
of all 3 registers.
AT77C104B
5347F–BIOM–3/08
AT77C104B
10.1
Status Register
Register Name: Status (8 bits)
Access Type: Read Only
Function: State of AT77C104B
b7
CLICK
0
b6
MOV
0
b5
TRANSIT
0
b4
SLICE
0
b3
READERR
0
b2
–
0
b1
–
0
b0
–
0
• CLICK: Click Detection
0: default
1: click detected
• MOV: Movement Detection
0: default
1: X or Y movement detected
• TRANSIT: not used, for testing only
• SLICE: not used, for testing only
• READERR: Read Error Detection
0: default, no error
1: read error detected
Note:
10.2
To clear the interrupts, the status register is initialized after each reading from the host.
Modectrl Register
Register Name: Modectrl (7 bits)
Access Type: Read/Write
Function: Mode Control
b6
MODE (MSB)
0
b5
MODE
0
b4
MODE
0
b3
MODE (LSB)
0
b2
ANALOGRST
1
b1
–
0
b0
–
0
• MODE: Select Operating Mode
0000: standby
0001: test (reserved for factory use)
0010: click
0100: navigation
1000: acquisition
Certain changes can be made. For example, MODE can be set to 0b0110 to activate click and
navigation.
15
5347F–BIOM–3/08
• ANALOGRST: Reset Local Oscillator
0: oscillator in active mode
1: oscillator in power-down mode
Notes:
1. Click or navigation modes cannot be used when the local oscillator is switched off.
2. To return to standby mode and stop the oscillator (to save on power consumption), two Modectrl register accesses are necessary: the first one to select standby mode and the second to
switch off the oscillator.
3. The read-only registers cannot be read when the oscillator is turned off.
4. To shift between navigation and acquisition modes, you must be in standby mode (Modectrl =
0b00001).
If modes such as “acquisition and click” or “acquisition and navigation” are programmed
together, they will be ignored by the system.
Programmed Mode
Register Value
11xx
01xx
1x1x
0x1x
With x = 0 or 1.
10.3
Enctrl Register
Register Name: Enctrl (7 bits)
Access Type: Read/Write
Function: Interrupts control
b6
CLICKEN
0
b5
MOVEN
0
b4
TRANSITEN
0
b3
SLICEN
0
b2
READERREN
0
b1
–
0
b0
–
0
• CLICKEN: Click Interrupts Enable
0: default
1: click IRQ enabled
IRQ is generated when a click is detected.
• MOVEN: Movement Interrupts Enable
0: default
1: movement IRQ enabled
IRQ is generated when an X or Y movement is detected.
16
AT77C104B
5347F–BIOM–3/08
AT77C104B
• TRANSITEN: not used, for testing only
• SLICEN: not used, for testing only
• READERREN: Read Error Interrupts Enable
0: default
1: read error IRQ enabled
IRQ is generated when a read error is detected.
Note:
10.4
The interrupt is cleared after the status register is read.
Heatctrl Register
Register Name: Heatctrl (7 bits)
Access Type: Read/Write
Function: Heating Control
b6
HEAT
0
b5
WDOGEN
0
b4
HEATV (MSB)
0
b3
HEATV(LSB)
0
b2
–
0
b1
–
0
b0
–
0
• HEAT: Sensor Heating
0: default, no heating
1: heating
The default value is recommended to optimize power consumption.
• WDOGEN: Watchdog Enable
0: default
1: watchdog enabled
Watchdog automatically stops heating of the sensor after a time-out.
• HEATV (2 bits): Heating Power Value
00: 50 mW
01: 100 mW
10: reserved
11: reserved
VDD is between 2.6 and 3.6V.
Notes:
1. Heating can only be used in the acquisition mode (it is not allowed in navigation or click
modes).
2. The oscillator has to be activated when the watchdog is required and must not be stopped
while the watchdog remains active.
17
5347F–BIOM–3/08
10.5
Navctrl Register
Register Name: Navctrl (7 bits)
Access Type: Read/Write
Function: Navigation control
b6
NAVFREQ
(MSB)
1
b5
b4
b3
b2
b1
b0
NAVFREQ (LSB)
NAVV ( MSB)
NAVV (LSB)
CLICKV (MSB)
CLICKV (LSB)
reserved
0
0
0
0
0
0
• NAVFREQ: Navigation Frequency
00: 5.8 kHz
01: 2.9 kHz (default value)
10: 1.9 kHz
11: 1.5 kHz
A faster frequency enables faster finger movement detection. A lower frequency enhances sensitivity. Refer to notes 1 and 2 on page 18.
• NAVV: Navigation Pixels Threshold
00: lower threshold
01:
10:
11: higher threshold
Sets the minimum analog value detected as a high level (‘1’). Refer to note 1 on page 18.
• CLICKV: Click Pixels Threshold
00: lower threshold
01:
10: higher threshold
11: reserved
Sets the minimum analog value detected as a high level (‘1’) and the maximum analog value
detected as a low level (‘0’). See note 3.
Notes:
1. Navfreq and Navv registers should not be changed once the navigation mode is selected. Finger sensitivity refers to the minimum level of information required from a finger. The sensitivity
is linked to the integration time; a longer integration time enables better sensitivity but does not
tolerate fast movement.
2. The navigation frequency is the frequency needed for the reading of one new navigation
frame.
3. The Clickv register should not be changed once the click mode is selected.
18
AT77C104B
5347F–BIOM–3/08
AT77C104B
10.6
Clickctrl Register
Register Name: Clickctrl (7 bits)
Access Type: Read/Write
Function: Click control
b6
CLICKFREQ
(MSB)
0
b5
CLICKFREQ
(LSB)
1
b4
CLICKDET
(MSB)
0
b3
CLICKDET
(LSB)
1
b2
CLICKCPT
(MSB)
1
b1
CLICKCPT
0
b0
CLICKCPT
(LSB)
1
• CLICKFREQ: Click Pixels Reading Frequency
00: 180 Hz
01: 90 Hz (default value)
10: 60 Hz
11: 45 Hz
Faster frequency enables faster finger click detection. Lower frequency enables higher
sensitivity.
• CLICKDET: Threshold for Selecting the Black/White Color of a Slice
00: more than 7 black/white pixels and less than 5 white/black pixels
01: more than 8 black/white pixels and less than 4 white/black pixels
10: more than 9 black/white pixels and less than 3 white/black pixels
11: more than 10 black/white pixels and less than 2 white/black pixels
• CLICKCPT: Click Detection Counter (maximum number of slices read between two
transitions)
000: 5
001: 7
010: 10
011: 12
100: 16
101: 20
110: 25
111: 31
Two transitions are interpreted as a click if the number of slices between them is less than
CLICKCPT. This is used to differentiate a touch-down/touch-up from a real click. A click is equivalent to two close touch-down/touch-up transitions.
This register adjusts the “time out” for considering the two transitions as a click.
Note:
Clickfreq and Clickcpt registers should not be changed once the click mode is selected.
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5347F–BIOM–3/08
10.7
Movectrl Register
Register Name: Movctrl (7 bits)
Access Type: Read/Write
Function: In stream mode, during navigation calculation, the AT77C104B must
interrupt the host when a maximum absolute X or Y movement is detected (second and third
navigation registers). The MOVECTRL register enables you to control this value. This value can
be set as the minimum finger movement value at which the pointing device makes a
displacement.
b6
(MSB)
0
b5
–
0
b4
–
0
b3
–
0
b2
–
0
b1
–
0
b0
(LSB)
0
• MOVCTRL: Generates an interrupt when the second or third navigation register (X or Y
absolute movement) is greater than the value programmed in the Movectrl register.
0b0000000
0b0000001
0b0000010
...
0b1111111
For example, when MOVCTRL = 0b0001001, an interruption to the host is generated when the
absolute X movement register (second navigation register) or absolute Y movement register
(third navigation register) is greater than 0b00010010.
Note:
20
The Movctrl register should not be changed once the navigation mode is selected.
AT77C104B
5347F–BIOM–3/08
AT77C104B
10.8
Navigation Register
Register Name: Navigation (3 x 8 bits)
Access Type: Read Only (These three registers cannot be read individually. The reading command of the first navigation register [address 0b1000] returns the value of the three registers).
Function: The format of the navigation registers is similar to the PS/2 protocol. Three registers
are used to code movements and clicks. The navigation registers are initialized after each reading. The registers only represent actions (movement, click, transition...) that have occurred since
the last data packet sent to the host.
10.8.1
General Register
b7
YOVR
0
b6
XOVR
0
b5
YSIGN
0
b4
XSIGN
0
b3
1
1
b2
TRANS
0
b1
CLICK
0
b0
FINGER
0
• YOVR: Y Overflow
0: default
1: Y movement overflow
High (‘1’) when the Y movement counter is overflowed.
• XOVR: X Overflow
0: default
1: X movement overflow
High (‘1’) when the X movement counter is overflowed.
• YSIGN: Y Sign Bit
0: default, positive Y movement
1: negative Y movement
High (‘1’) when the Y movement is negative. Low when the Y movement is positive.
• XSIGN: X Sign Bit
0: default, positive X movement
1: negative X movement
High (‘1’) when the X movement is negative. Low when the X movement is positive.
• TRANS: Not used; for test purposes only.
• CLICK: Click
0: default
1: click detected
This function is not in the PS/2 protocol.
• FINGER: Not used; for test purposes only.
Note:
In the PS/2 protocol, bits b2 and b1 are used to code the middle and right buttons respectively,
and b3 is set to high.
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5347F–BIOM–3/08
10.8.2
Absolute X Movement Register (0 to 255 Pixels)
b7
XMOV (MSB)
0
10.8.3
22
b5
–
0
b4
–
0
b3
–
0
b2
–
0
b1
–
0
b0
XMOV (LSB)
0
b3
–
0
b2
–
0
b1
–
0
b0
YMOV (LSB)
0
Absolute Y Movement Register (0 to 255 Pixels)
b7
YMOV (MSB)
0
Note:
b6
–
0
b6
–
0
b5
–
0
b4
–
0
When a click is detected, the information is placed in the b7 bit of the status register and in the b1 bit of the general navigation
register. The reading of the status register initializes the b7 bit but does not initialize the b1 bit of the general navigation register.
The host must carefully correlate the two bits.
AT77C104B
5347F–BIOM–3/08
AT77C104B
11. SPI Interface General Description
Two communication busses are implemented in the device:
• The control interface, a slow bus that controls and reads the internal registers (status,
navigation, control...).
• The pixels’ acquisition interface, a fast bus that enables full pixel acquisition by the host.
A synchronous Serial Port Interface (SPI) has been adopted for the two communication busses.
The SPI protocol is a slave/master full duplex synchronous serial communication. This protocol
uses three communication signals:
• SCK (Serial Clock): the communication clock
• MOSI (Master Out Slave In): the data line from the master to the slave
• MISO (Master In Slave Out): the data line from the slave to the master
The slaves are selected by an input pin SS/ (Slave Select). A master can communicate with several slaves.
The word length of the transferred data is fixed to 8 bits. The Most Significant Bit (MSB) is sent
first. For each 8-bit transfer, 8 bits are sent from the master to the slave and 8 bits transferred
from the slave to the master. Transfers are still synchronized with the communication clock
(SCK). Only the host can initialize transfers. To send data, the slave must wait for an access
from the master. When there is no transfer, a clock is not generated.
Figure 11-1. One Master with Several Slaves
SS/1
Master
Slave #1
SS/2
Slave #2
SS/3
Slave #3
SCK
MISO
MOSI
When a master is connected with several slaves, the signals SCK, MISO and MOSI are interconnected. Each slave SS/ is driven separately. Only one slave can be selected, the others
have their MISO tri-stated and ignore MOSI data.
The SS/ signal falls a half-period before the first clock edge, and rises a half-period after the last
clock edge.
11.1
Clock Phase and Polarity
During phase zero of the operation, the output data changes on the clock’s falling edge and the
input data is shifted in on the clock’s rising edge. In phase one of the operation, the output data
changes on the clock’s rising edge and is shifted in on the clock’s falling edge.
Polarity configures the clock’s idle level, which is high ('1') during polarity one of the operation
and low ('0') during polarity zero of the operation.
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5347F–BIOM–3/08
11.2
AT77C104B and the SPI
The AT77C104B is always the slave and the host always the master. The host drives the SCK
clock. Both the AT77C104B and the host transmit data with the MISO signal. The word length of
the transferred data is fixed to 8 bits. The Most Significant Bit (MSB) is sent first.
The AT77C104B supports only one phase and polarity configuration:
• the clock’s idle level set to high (polarity 1);
• the output data changed on the clock’s falling edge, and input data shifted in on the clock’s
rising edge (phase 0).
Figure 11-2. SPI Waveform (Phase = 0, Polarity = 1)
SCK
MSB
MOSI/MISO
LSB
SS/
Emission
Note:
11.2.1
11.3
Reception
During initialization of the SCK wire (power-on or reset), SS/ has to be inactive (‘1’).
Recommendations
The SSS or FSS falling edge should be half a clock cycle before the first SCK falling edge and
the SSS or FSS rising edge should be half a clock cycle after the last SCK
rising edge.
SPI Behavior with Hazardous Access
The control register block uses an internal finite state machine that can only be initialized by the
RST pin (asynchronous reset). When SPI access does not use 8 clock pulses, the internal finite
state machine is desynchronized. The only way to resynchronize it is by resetting the sensor
with the RST pin. No requester modification is recorded when a write access is made on a readonly register. Reliable initialization of read-only registers is not guaranteed when the slow SPI’s
maximum clock frequency is not respected.
24
AT77C104B
5347F–BIOM–3/08
AT77C104B
12. Control Interface (Slow SPI)
This interface controls the sensor’s internal registers. The protocol enables reading and writing
of these registers.
The master (host) initiates transfers to the slave (sensor). The sensor can only use its interrupt
pin to communicate with the host. When the host is interrupted, it must read the status register
before continuing operation.
The word length of the transferred data is fixed to 8 bits. The Most Significant Bit (MSB) is sent
first.
12.1
Communication Protocol
Accesses to the host are structured in packets of words. The first word is the command and the
other words are the data.
The b7 bit is used to differentiate the command and data. When the word is a command, b7 is
high ('1') and when the word is a piece of data, b7 is low ('0').
The following protocol is used:
12.1.0.1
b7
1
12.1.0.2
b7
0
12.1.0.3
b7
0
Note:
Command Format
The host indicates to the sensor if it wants to read or write into a register and indicates the register’s address.
b6
Read
(1)/Write (0)
b5
b4
b3
b2
b1
b0
Address (b3)
Address (b2)
Address (b1)
Address (b0)
x
x
b2
Data (b2)
b1
Data (b1)
b0
Data (b0)
Data Format (Writing into Register)
If writing into a register, the host transmits the data.
b6
Data (b6)
b5
Data (b5)
b4
Data (b4)
b3
Data (b3)
Data Format (Reading of Register)
If reading a register, the host transmits one or several packets of data and data is shifted in from
the sensor. The host transmits dummy words with the data format (b7 is low ['0’]). If reading the
navigation or pixelclick registers, the host transmits three packets of data to read the three
registers.
b6
x
b5
x
b4
x
b3
x
b2
x
b1
x
b0
x
The host cannot communicate with the sensor without receiving data from it. Useless data is ignored by the host.
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5347F–BIOM–3/08
12.2
Communication Speed
To reduce consumption, the control interface’s communication speed is set to the lowest possible speed and depends on the host’s configuration.
To communicate with “fast” controllers, the sensor’s communication speed can be set to 200
kbits/s.
12.2.1
Example for the MODECTRL Register
Figure 10 represents a typical writing sequence into an internal register (MODECTRL register in
this example).
See Appendix B for flowchart.
Figure 12-1. Writing into an Internal Register
SSS
SCK
MOSI
1
0
0
0
0
1
x
x
0
0
1
1
0
0
0
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
MISO
Writing into MODECTRL Register Requested
Note:
26
New Data to be Written into MODECTRL Register
(Navigation and Click Mode)
The break on SCK on the SPI chronogram has been added for better comprehension only. In a real application, SCK can be
continuous.
AT77C104B
5347F–BIOM–3/08
AT77C104B
Figure 12-2. Reading Sequence of a Register (Except for Navigation Registers)
Figure 12-2 represents a typical reading sequence of a register different from the navigation register. In this example, the
status register is used.
SCK
MOSI
1
1
0
0
0
0
x
x
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
1
0
0
0
0
0
0
0
MISO
Reading of STATUS Register Requested
12.3
Emission of the STATUS Register
(Click Detected)
Example of Navigation Registers
Figure 12-3. Reading of the Navigation Registers
Figure 12-3 represents a typical reading sequence of the three navigation registers.
Refer to “Appendix C” on page 43 for flowchart.
SCK
MOSI
MISO
1
1
1
0
0
0
X
X
0
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
0
1
0
1
0
0
0
0
1
1
0
0
0
1
0
0
1
0
0
0
0
Reading of Navigation
Register Requested
Emission of the First
Navigation Register
(No Overflow, Y Negative Movement
Click Detected, Black Slice)
Emission of the Second
Navigation Register
(X Absolute Movement
= 24 Pixels)
Emission of the Third
Navigation Register
(Y Absolute Movement
= 144 Pixels)
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5347F–BIOM–3/08
13. Image Capture (Fast SPI)
This serial interface enables full-speed acquisition of the sensor’s pixels by the host.
This interface only supports the serial clock (SCK) and one data line: MISO (Master In/ Slave
Out).
13.1
Communication Protocol
When the sensor is in acquisition mode, the host can receive pixels through the fast SPI (FSS/ =
0). The host must transmit the communication clock (SCK) to receive the pixels. This clock must
have a regular frequency to obtain constant fingerprint slices (See “Registration Integration
Time” on page 30.).
With the sensor configured to acquisition mode, the controller can proceed to fast accesses.
Figure 13-1. Example of an 8-bit Access
Controller
FSS/ = 0
Sensor
Sending of Dummy Data
0b0000000
Reception of 2 Pixels
Sending of 2 Pixels (8 Bits)
End of
No
Communication
?
Yes
FSS/ = 1
During an 8-bit access, the sensor transmits two pixels (each pixel is coded on 4 bits).
Figure 13-2. Fast SPI Communication
SCK (Pixel Clock)
MISO
Bit3
MSB
Bit2
Bit1
Bit0
Bit3
Pixel 2i
Transmission Clock
Edge (Sensor)
13.2
Bit2
Bit1
Pixel 2i - 1
Bit0
Bit3 Bit2
MSB
Bit1
Pixel 2i + 2
Bit0
Bit3
Bit2
Bit1
Bit0
Pixel 2i + 1
Reception Clock
Edge (Host)
Communication Speed
The acquisition speed of the pixels is linked to the clock’s communication speed. The faster the
communication clock, the faster the authorized maximum finger sweeping speed. The sensor
supports fast communications up to 16 Mbps.
28
AT77C104B
5347F–BIOM–3/08
AT77C104B
13.3
Reading of Frame
A frame consists of 232 true columns and 1 dummy column of 8 pixels of 4 bits each. A frame
starts with a dummy column.
Figure 13-3. Example of a Frame
Dummy
Column
0
F
0
F
2
0
0
Synchro = F0F00200
0
232 x 8 Pixels Column
p1
P9
p2
p10
p3
p11
p4
P12
p5
P13
p6
P14
p7
P15
p16
p8
Pixel Frame
The first dummy column, at the beginning of the pixel array, is added to the sensor to act as a
specific easy-to-detect pattern, and represents the start of the frame tag.
The pixel array is always read in the following order: the first byte, following the 4 bytes of the
dummy column, which contains the value of the pixels physically located on the upper left corner
of the array, when looking at the die with bond pads to the right. Then another 4 bytes are read
that contain the value of the pixels located in the same column from top to bottom. The next column on the right is output, and so on, until the last line on the right, close to the bond pads, is
output.
Even values are first sent during the data serialization for SPI transfer. Therefore, the synchronization sequence on the chip’s MISO output is F0F00200.
Figure 13-4. Reading of Frame
SCK
MISO
F
0
F
0
0
2
0
Dummy Column
Notes:
0
P2
P1
P4
P3
P6
First Pixel
Column
P5
P8
P7
P10
P9
Second Pixel
Column
1. For the first array or frame reading, 40 dummy clock cycles must be sent before the first data arrives. This is necessary for
the initialization of the chip pipeline. Consequently, the first synchronization sequences appear after 40 clock cycles. For the
following array readings, data arrives at each clock cycle. One should implement a synchronization routine in the protocol to
look for the F0F00200 pattern.
2. The Most Significant Bit (MSB) is sent first.
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5347F–BIOM–3/08
13.4
Reading of Entire Image
The FingerChip delivers fingerprint slices or frames with a height of 0.4 mm and a width of 11.6
mm (this equals 8 × 232 pixels). Pixels are sampled/read sequentially and are synchronous with
SCK. Raw slices are captured by the acquisition system and overlapped with the corresponding
X or Y finger displacement computed by Atmel reconstruction software. This reconstruction software supports a sweeping speed from 2 to 20 cm/s.
The table below shows finger speeds according to the different clock frequencies. The reconstruction results are obtained after acquisition of all slices.
Table 13-1.
13.5
Finger Speeds Versus Clock Frequencies
Fsck
(MHz)
Data Rate
(Mbit/s)
Slice Rate
(Slices/s)
Absolute
Maximum Finger
Speed (cm/s)
Comments
1
1
134
3
Too slow
2
2
268
6
Too slow
4
4
536
12
Minimum
6
6
804
18
Normal speed
8
8
1072
24
Good speed
12
12
1608
36
Very good speed
16
16
2146
48
Very good speed
Registration Integration Time
The pixel’s integration time (the time needed for one frame reading) must be as regular as possible to obtain consistent fingerprint slices. This time is directly dependant on the SCK, SPI clock
and frequency. Therefore, the SPI cycle of 4 × 8 × 233 clock pulses should be as regular as
possible.
Figure 13-5. Regular Integration Time
Regular Integration Time
Frame n
Frame n+1
Frame n+2
Frame n+3
Clock SCK
500 us max
4 x 8 x 233 =
7456 Pulses
7456 Pulses
7456 Pulses
7456 pulses
233 = 232 + 1 Dummy Column
Note:
30
The 500 µs duration corresponds to the host’s computation time (slice reconstruction, finger detection…) and in the illustration is
given as an example only. Once the host detects a finger, this value remains constant, thus guaranteeing a regular integration
time.
AT77C104B
5347F–BIOM–3/08
AT77C104B
14. Navigation (Slow SPI)
The sensor’s navigation function includes the processing elements necessary for providing the
displacement of the finger touching the sensor in an up or down and right or left direction. It is
aimed at a screen menu navigation or simple pointing application. In addition, a click processing
function is embedded to detect a quick touch of the finger on the sensor. It is aimed at screen
text, box or object selection. A double-click function could also be implemented in the software.
This interface has been designed to resemble the PS/2 mouse protocol.
An interrupt signal IRQ indicates to the host that an action has been detected. The host must
read the status register to obtain details on the action. The IRQ signal enables implementation of
an efficient power consumption protocol.
Note:
• Click and navigation modes can be used together.
• Two configurations are implemented for the click and navigation modes:
– Stream mode, where the sensor sends an interrupt to the host when a movement or
a change in the button’s state is detected.
– Remote mode, where the sensor does not interrupt the host but waits for its registers
to be read.
In these two modes, the registers are initialized after each reading from the host.
See “Appendix D” on page 44. for an example of an interrupt generated by a movement
detection.
14.1
Navigation
See “Navigation Register” on page 21.
The typical navigation slice frequency has been fixed to 2.9 kHz. A programmable divider is
implemented in the control registers (NAVFREQ) to reduce this frequency. Finger displacement
is provided as a number of pixels in X and Y directions. Negative movements are possible. The
register is cleared after the navigation registers are read. These registers are incremented or
decremented between two accesses.
Table 14-1.
Navctrl
Register
(Bits b6 to b5)
Typical Navigation
Slice Frequency
(kHz)
Typical
Integration Time
(µs)
Typical Maximum
Finger Speed
(cm/s)
00
5.8
172
30
01
2.9
345
15
10
1.9
526
9.5
11
1.5
666
7.5
31
5347F–BIOM–3/08
14.2
Click
See “Clickctrl Register” on page 19.
The sensor generates a click detection. The host must read the b7 bit of the status register or
the b1 bit of the general navigation register.
The click function is composed of an array of a few pixels and a processing unit. The typical click
slice frequency is 90 Hz. A programmable divider is implemented to modify this frequency in the
control registers (CLICKFREQ).
14.3
Double-click
This function is performed by the controller, allowing better flexibility. It detects a succession of
two clicks.
32
AT77C104B
5347F–BIOM–3/08
AT77C104B
15. Temperature Stabilization Function and Watchdog
The sensor has an embedded temperature stabilization unit that identifies a difference in temperature between the finger and the sensor. When this difference is increased, the images are
more contrasted. This function is optional and its use depends on the quality of the image processing software, therefore its management should be decided together with the image
processing software.
In order to limit excessive current consumption by the use of the temperature stabilization function, a watchdog has been implanted in the sensor. The local oscillator stops the heating of the
module after a defined time. The oscillator should not be stopped as long as watchdog is active,
otherwise the clock stops automatically.
When heating of the sensor is requested '1' is written in bit 6 of the HEATCTRL
register) and the watchdog is enabled '1' is written in bit 5 of the HEATCTRL register), the sensor is heated during ‘n’ seconds.
Due to the oscillator frequency dispersion, the value of n is:
2 seconds (minimum) < n = 4 seconds (typical) < 7 seconds (maximum).
The accuracy of n is not important since the heat register can be enabled successively.
The level of power consumption is programmable. Two pre-programmed values are set to 50 or
100 mW.
The dissipated die power is quasi constant over a significant supply voltage range as shown
below (mode 50 mW selected):
Power = f ( Vdd )
5,40E-02
Power ( W )
5,30E-02
5,20E-02
5,10E-02
5,00E-02
4,90E-02
4,80E-02
2
2,2
2,4
2,6
2,8
3
3,2
3,4
3,6
3,8
VDD
Power = f ( Vdd)
Note:
This function is useless for navigation and click modes.
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5347F–BIOM–3/08
16. Power Management
16.1
Sleep Mode (<10 µA)
Reset high
16.2
Standby Mode (<10 µA Providing SPI Bus not Accessed)
Power consumption can be reduced in several ways:
• By switching off the FingerChip sensor
• By programming a standby mode by writing 00001xx in the MODCTRL register (STANDBY
mode set and oscillator stopped.) Bit b6 (HEAT) of the HEATCTRL register must be turned to
‘0’ when programming standby mode
16.3
Acquisition Mode Current Consumption
16.3.1
Static Current Consumption
When the SPI bus is not used, only the analog part of the circuit consumes power at around 4
mA.
16.3.2
Dynamic Current Consumption
When the clock is running, the digital sections also consume current. With a 30 pF load at 16
MHz, the power consumption is approximately 4.5 mA on the VDD pins.
16.4
Navigation and Click Modes Current Consumption
16.4.1
Static Current Consumption
The SPI bus’ consumption is very low in click and navigation modes, the majority of the consumption being generated by the analog part of the circuit. Therefore, the static and dynamic
consumption is almost the same.
16.4.2
Dynamic Current Consumption
With a 30 pF load at maximum clock frequency, the current consumption in click mode is almost
300 µA on pins VDD. With a 30 pF load at maximum clock frequency, the current consumption in
navigation mode is approximately 1.5 mA.
Note:
34
We advise use of the interrupt capabilities (IRQ signal or Interrupts register) so as to limit the
host’s overall current consumption. The host can, from time to time, check the IRQ or Interrupt
register. A strategy for very low power consumption is to use the click mode only as a wake-up.
The click mode is only 300 µA, and once a click is detected the host can turn on the navigation
mode as well.
AT77C104B
5347F–BIOM–3/08
AT77C104B
17. Packaging Mechanical Data
17.1
AT77C104B-CB08YV Package Information
4.8 max
+0.07
1.50 - 0.01
4.6 max
A
0.56 ±0.1
0.74 ±0.06
Figure 17-1. AT77C104B-CB08YV Top View and Side View
A
1.2 max
23 ±0.3
A
0.2 A
11.98
1.75 ±0.5
5 ±0.3
4.8 ±0.4
1.1 min
All dimensions in mm.
Figure 17-2. AT77C104B-CB08YV Bottom View
0.5 ±0.08
0.5 ±0.08
1.5 ±0.3
19
1
2 ±0.08
2.25 ±0.3
All dimensions in mm.
35
5347F–BIOM–3/08
17.2
AT77C104B-CH08YV Package Information
The holder is designed to be assembled onto a motherboard of thickness specification
0.8mm±0.1mm.
Figure 17-3. AT77C104B-CH08YV Mechanical Plan
8 ± 0.25
2 ± 0.25
2.35 ± 0.13
1
R
1.56 ± 0.15
2 ± 0.05
0.74 ± 0.06
5
.7
0.
1.2 Max
1.96 ± 0.13
25
±
7 ± 0.05
7 ± 0.25
11 ± 0.05
4.50 ± 0.05
7.80 ± 0.25
Datum snap leg
0.88 ± 0.25
24.40 ± 0.25
1.51 ± 0.25
18.20 ± 0.40
4.6 Max
36
4.8 Max
5.55 Max
3.50 ± 0.25
+ 0.07
1.50 - 0.01
3.50 ± 0.25
0.95 ± 0.13
AT77C104B
5347F–BIOM–3/08
AT77C104B
17.3
AT77C104B-CB09YV Mechanical Plan
0.50 ± 0.08
0.50 ± 0.08
1.75 ± 0.15
0.74 ± 0.06
4.8 max
5.0 ± 0.15
1.20 max
3.8 max
2 ± 0.08
18 ± 0.15
0.2 A
A
1.0 min
11.98
0.5 min
1.75 ± 0.35
+ 0.07
1.50 - 0.01
0.89 ± 0.10
1.5 ± 0.15
1
1.75 ± 0.15
1.5 ± 0.08
15
0.7 ± 0.25
37
5347F–BIOM–3/08
17.4
AT77C104B-CB12YI Mechanical Plan
Note:
Ref. Connector plug: 2-1470841-0.
Ref. Connector Receptacle: 2-1470842-0
Stack height:1.5mm
from Tyco Electronics 0.5mm Pitch.
38
AT77C104B
5347F–BIOM–3/08
AT77C104B
17.5
Electrical Disturbances
Three areas of the FingerChip device must never be in contact with the casing, or any other
component, so as to avoid electrical disturbances. These areas are shown in Figure 21:
Figure 17-4. Sensitive Areas
6 mm
11.5 mm
Figure 17-5. Epoxy Overflow
Maximum epoxy overflow width: 0.35 mm on the die edge.
Maximum epoxy overflow thickness: 0.33 mm.
0.35
0.33
AA Section
Fingerchip
Note:
Epoxy Glue Overflow
Refer to Figure 17-1 on page 35.
39
5347F–BIOM–3/08
18. Ordering Information
18.1
Package Device
AT77C
104B
CXXX Y
Atmel prefix
FingerChip family
V
_
Quality Level: Standard
Device type
Package
CB08: Chip On Board (COB)
CH08: COB with holder
CB09: Shrinked COB
CB12: COB with connector
Table 18-1.
40
Temperature range
V: -40° to +85°C
I: -20° to +80°C
RoHS compliant
Temperature Operating Ranges
Part Number
Package
Operating Range
AT77C104B-CB08YV
19-pin chip-on-board
−40C to +85C
AT77C104B-CB09YV
15-pin chip-on-board
−40C to +85C
AT77C104B-CH08YV
19-pin chip-on-board
−40C to +85C
AT77C104B-CB12YI
20-pin chip-on-board
−20C to +80C
AT77C104B
5347F–BIOM–3/08
AT77C104B
19. Appendix A
19.1
Controller Initialization
Host Controller
Initialization
Controller
Initialized ?
no
Yes
SPI Initialization
(Phase = 0, Polarity = 1)
SPI
Initialized ?
no
Yes
RST = 1
Sensor Initialization
Pulse
> 10 us ?
no
Yes
RST = 0
41
5347F–BIOM–3/08
20. Appendix B
20.1
Example for the MODECTRL Register
Controller
Sensor
Reception of the Command
Reading of MODECTRL
Interrupts Masked
SSS/ = 0
MODECTRL Reading
Requested
Sending 0b11000100
No
Transfer
Ended ?
Yes
Sending of MODECTRL
Modification of MODECTRL to
Change Mode Bits
Transfer
Ended ?
No
Yes
Modification of MODECTRL to
Change Mode Bits
Reception of the Command
Writing of MODECTRL
MODECTRL Writing Requested
Sending of 0b10000100
No
Transfer
ended ?
Yes
Reception of MODECTRL
Sending of the New
MODECTRL
Transfer
ended ?
No
Yes
SSS/ = 1
Interrupts enabled
42
AT77C104B
5347F–BIOM–3/08
AT77C104B
21. Appendix C
21.1
Example of Navigation Registers
Controller
Sensor
Reception of the Command
Reading of NAVIGATION
Interrupts Masked
SSS/ = 0
NAVIGATION Reading
Requested
Sending 0b11000000
No
Transfer
Ended ?
Yes
Sending of NAVIG1
Sending of Dummy Data
0b00000000
Reception of NAVIG1
No
Transfer
Ended ?
Yes
Sending of NAVIG2
Sending of Dummy Data
0b00000000
Reception of NAVIG2
Transfer
Ended ?
No
Yes
Sending of NAVIG3
Sending of Dummy Data
0b00000000
Reception of NAVIG3
No
Transfer
Ended ?
Yes
SSS/ = 1
Interrupts Enabled
43
5347F–BIOM–3/08
22. Appendix D
22.1
Example of an Interrupt Generated by a Movement Detection
Controller
Main Program
Sensor
Interrupt Generated
IRQ/ = 0
Interrup ?
No
Interrupts Masked
SSS/ = 0
Reception of the Command
STATUS Reading Requested
Sending of 0b11000000
No
Transfer
Ended ?
Yes
Sending of STATUS
Interrupts Cleared
Sending of Dummy Data
0b00000000
Reception of STATUS
Transfer
Ended ?
No
Yes
Interrupts Control
Detection of Movement
Reception of the Command
Reading of NAVIGATION
NAVIGATION Reading
Requested
Sending of 0b11100000
Transfer
Ended ?
No
Yes
Sending of the 3
Navigation Registers
Sending of Dummy Data
0b00000000
Reception of the 3 Navigations
3 Registers
Values Sent ?
No
Yes
SSS/ = 1
Interrupts enabled
44
AT77C104B
5347F–BIOM–3/08
AT77C104B
23. Revision History
Doc. Rev.
Date
Comments
5347F
3/2008
Added CB09 picture
Replaced picture forpindescription CB12
Updated CB12YI Mechanical Plan, added note
Updated CB09YV Mechanical Plan
Updated CB08YV Mechanical Plan
Added note for Ordering Information
5347F
1/2008
Added tables and figures for AT77C104B-CB12YI
10/2007
Updated to new template
Changed CB09 to CB08 as needed
Added CB08 &CB09 Mechanical Plan
Changed Features, removed size, modified finger sweep speed
Recreated Figures on page 33 & 34
1/2007
Implemented revision history.
New product integration solution added:
New product reference with holder AT77C104B-CH08YV.
Associated information and mechanical data plan added.
5347E
5347D
45
5347F–BIOM–3/08
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5347F–BIOM–3/08