BD7961FM Optical disc ICs Power driver IC for CD changer BD7961FM BD7961FM is a 6-channel driver IC developed for CD changer. In addition to the 4-channel BTL driver and the 2-channel loading driver, the 3.3V regulator and 5.0V regulator used in the peripheral circuit are also incorporated. The size reduction of the set is achieved by integrating functions that were used in two chips into a single chip. !Applications CD changer !Features 1) This circuit is a 6-channel driver IC consisting of four BTL drivers and two loading drivers. 2) Two wide dynamic range loading drivers of MOS output (RON=1.0Ω). 3) The circuit is provided with loading driver voltage setting terminals. 4) A 5.0V regulator and a 3.3V regulator are built in. (Each regulator has an external PNP transistor and an ON/OFF switch) 5) The circuit has a mute switch. 6) A thermal shutdown circuit is built in. 7) Since HSOP-M36 power package is used, the set requires a reduced space. !Absolute maximum ratings (Ta=25°C) Parameter Supply voltage Symbol Limits Unit VCC 15 V mW Pd 2200∗ Operating temperature range Topr −35 to +85 °C Storage temperature range Tstg −55 to +150 °C Power dissipation ∗ Reduced by 17.6mW for each increase in Ta of 1°C over 25°C, on less than 3% (percentage occupied by copper foil), 70mm×70mm, t=1.6mm, glass epoxy mounting. !Recommended operating conditions (Ta=25°C) Symbol Min. Typ. Max. Unit Supply voltage 1 Parameter VCC1 4.5 8.0 14.0 V Supply voltage 2 VCC2 4.5 8.0 14.0 V Supply voltage 3∗ VCC3 6.0 8.0 14.0 V ∗ When REG2 (5.0-V regulator) is not used, the supply voltage3 (VCC3) is 4.5 to 14.0V. 1/9 BD7961FM Optical disc ICs !Block diagram 33 32 31 30 29 28 27 26 GND3 VCC2 25 VCC3 24 23 22 + − 9 10 11 23.5k 12 13 GND1 14 CH2 15 10k 8 10k 7 10k 6 10k 5 10k 4 + − F 23.5k 3 10k + − 10k R CH5 2 47k + − 10k 23.5k REG1 SW 10k R + Level shift − + 10k 47k Control logic F − Level shift 23.5k + Control logic GND2 1 − Level shift − + + − REG2 SW (POW GND CH5/6) 10k 47k 47k − + Level shift REG1 + − + + − − LD CONT2 REG2 10k LD CONT1 10k − + 19 CH3 + − (PRE VCC (POW VCC CH1~4) REG VCC) (POW VCC CH5/6) 10k + − (CH1~CH4) + − MUTE 20 10k 10k (REG GND) BIAS 21 CH4 VCC1 + − 34 CH6 + − 35 + − 36 CH1 16 17 18 !Pin descriptions Pin No. Pin name Function Pin No. Pin name Function 1 GND2 POW GND (loading driver unit) 19 OUT3+ BTL driver (CH3) output + 2 OUT5− Loading driver (CH5) output − 20 OUT3− BTL driver (CH3) output − 3 OUT5+ Loading driver (CH5) output + 21 OUT4+ BTL driver (CH4) output + 4 IN5FWD Loading driver (CH5) FWD input 22 OUT4− BTL driver (CH4) output − 5 IN5REV Loading driver (CH5) REV input 23 LDCONT2 Loading driver (CH6) voltage setting terminal 6 IN6REV Loading driver (CH6) REV input 24 LDCONT1 Loading driver (CH5) voltage setting terminal 7 IN6FWD Loading driver (CH6) FWD input 25 VCC1 Supply voltage (BTL driver unit) 8 REG2SW Regulator 2 switch terminal 26 VCC3 Supply voltage (regulator unit) 9 REG1SW Regulator 1 switch terminal 27 GND3 10 IN4 CH4 input 28 VCC2 11 IN3 CH3 input 29 REG1OUT 12 IN1 CH1 input 30 REG1_B Regulator 1 Tr base 13 IN2 CH2 input 31 REG2_B Regulator 2 Tr base 14 GND1 POW GND (BTL driver unit) 32 REG2OUT 15 OUT2− BTL driver (CH2) output − 33 MUTE BTL driver mute terminal 16 OUT2+ BTL driver (CH2) output + 34 OUT6+ Loading driver (CH6) output + 17 OUT1− BTL driver (CH1) output − 35 OUT6− Loading driver (CH6) output − 18 OUT1+ BTL driver (CH1) output + 36 BIAS REG GND (regulator unit) Supply voltage (loading driver unit) Regulator 1 output Regulator 2 output BIAS terminal 2/9 BD7961FM Optical disc ICs !Input output circuit OUT1+/OUT1−/OUT2+/OUT2− OUT3+/OUT3−/OUT4+/OUT4− IN1/IN2/IN3/IN4 VCC1 VCC1 VCC1 10k 23.5k 15~22pin 10k 10, 11 12, 13pin 10k 10k IN5FWD/IN5REV IN6FWD/IN6REV OUT5+/OUT5− OUT6+/OUT6− LDCONT1/LDCONT2 VCC2 VCC1 4, 5, 6, 7 pin VCC1 200k 23, 24 pin 2, 35pin 25k 3, 34pin 40k 25k GND2 REG1OUT/REG2OUT REG1_B/REG2_B VCC3 VCC1 VCC1 20k (8.5k) 29, 32pin 30, 31pin 30k (24k) BG MUTE REG1SW/REG2SW VCC1 BIAS VCC1 8, 9pin VCC1 33pin 36pin 20k 50k 3k 20k 50k 50k 50k 3/9 BD7961FM Optical disc ICs !Electrical characteristics (unless otherwise noted, Ta=25°C, VCC1, VCC2, VCC3=8V, BIAS=2.5V, RL=8Ω) Parameter Symbol Min. Typ. Max. Unit Quiescent current ICC1 12 25 38 mA Under no load Conditions Quiescent current (BTL MUTE) ICC2 5 10 15 mA Under no load Output offset voltage VOFS −70 0 +70 mV Max. output amplitude VOM 5.4 6.0 − V Closed circuit voltage gain GVC 16 18 20 dB ∆GVC −2.0 0 2.0 dB Output offset voltage VOFSL −35 0 +35 mV Output saturation voltage H VOLH − 0.32 0.48 V IO=500mA Output saturation voltage L VOLL − 0.18 0.27 V IO=500mA Voltage gain GVLD 4.0 6.0 8.0 dB LDCONT=1V ∆GVLD −2.0 0 2.0 dB Output voltage VREG1 3.135 3.300 3.465 V Output load stability ∆VRL1 5 10 20 mV IO=0~200mA Supply voltage stability ∆VVCC1 5 10 20 mV VCC=6~10V IO=100mA REG1_B terminal sink current IREGSI1 2 − − mA Output voltage VREG2 4.75 5.00 5.25 V Output load stability ∆VRL2 5 10 20 mV IO=0~200mA Supply voltage stability ∆VVCC2 5 10 20 mV VCC=7~10V IO=100mA RE2_B terminal sink current IREGSI2 2 − − mA 〈 BTL driver CH1 to CH4 〉 Difference between positive and nagative voltage gains VIN=BIAS±0.5V 〈 Loading driver CH5 and CH6 〉 Difference between positive and nagative voltage gains When brake is applied 〈 Regulator 1〉 〈 Regulator 2〉 The product is not designed for protection against radioactive rays. 4/9 BD7961FM Optical disc ICs 3 REGOUT IREG IREG REGOUT !Measurement circuits 2 1 1 SW2 2 3 47µF SW2 LDCONT LDCONT 47µF A A IQ3 IMUTE 32 31 30 29 28 27 A A A 23 22 26 25 24 20 CH4 + − A IQ6R IQ6F 9 A A 10 23.5k VIN LDINR 12 CH2 13 14 IQREGSW2 IQREGSW1 (CH5) OUT_LD LDINF LDINR 11 VIN VIN CH1 15 16 17 OUT− A IQ5R 8 OUT+ OUT+ A IQ5F 7 OUT− OUT− 6 (CH2) OUT_A VIN 10k A 5 10k 4 10k F 10k R 10k + − 23.5k 3 10k 47k + − CH5 2 + − 23.5k REG1 SW 10k 47k 10k R 23.5k + Control logic F + Level shift Level shift − + 10k (POW GND CH5/6) − Level shift − + + − REG2 SW − Control logic 10k 47k 47k − + Level shift REG1 + − + 10k − LD CONT2 REG2 + − LD CONT1 10k − + + − (CH1~CH4) (PRE VCC (POW VCC REG VCC) CH1~4) (POW VCC CH5/6) 10k + − + − MUTE 10k (REG GND) BIAS 19 CH3 10k 10k CH6 18 (CH1) OUT_A The resistance values are indicated in [Ω] LDINF REGSW REGSW Fig.1 OUT_A OUT_LD + V REV FWD OUT− OUT+ 1 21 ILDC1 + − 33 A OUT+ 34 IQ2 + − 35 A OUT_A (CH3) + − 36 ILDC2 IQ1 OUT− A OUT_A (CH4) IQREG1 IQREG2 OUT+ OUT+ A VMUTE VCC1 OUT− IQB OUT− OUT_LD (CH6) VB VCC2 OUT+ VCC3 2SB1182 2SB1182 VO VOLD V RL V V SW1 SW1 VOLF RL=8Ω 2 VOLR 1 2 1 Fig.2 IDR IDF Fig.3 5/9 BD7961FM Optical disc ICs !Switch table for measuring circuit diagrams (unless otherwise noted, Ta=25°C, VCC1, VCC2, VCC3=8V, BIAS=2.5V, RL=8Ω Unless otherwise specified, the switch 1 is used.) Parameter Symbol SWITCH 1 Conditions 2 Measurement circuit Quiescent current ICC1 ∗1 Fig.1 Quiescent current (BTL MUTE) ICC2 ∗2 Fig.1 Output offset voltage VOFS VIN=VB, VOFS=VO Fig.2 Max. output amplitude VOM VIN=VCC, VOM=VO Fig.2 Closed circuit voltage gain(CH1 to CH4) GVC VIN=VB±0.5V, GVC=20log (VO/0.5) Fig.2 〈 BTLdriver CH1 to CH4 〉 Difference between positive and negative voltage gains (CH1 to CH4) ∆GVC Mute terminal sink current IMUTE VMUTE=5V, IMUTE=IMUTE Fig.1 Bias terminal sink current IBIAS VB=2.5V, IBIAS=IQB Fig.1 Fig.2 〈 Loading driver CH5 and CH6 〉 Output offset voltage VOFSL LDINF=LDINR=5V, VOFSL=VOLD Fig.3 Output saturation voltage H VOLH 2 ∗3 Fig.3 Output saturation voltage L VOLL 2 LDINF=5V, LDINR=0V, IDR=500mA, VOLL=VOLR Fig.3 Voltage gain (Loading) GVLD ∗4 Fig.1 Difference between positive and negative voltage gains (Loading) ∆GVLD Fig.1 Input terminal sink current IINL LDINF=LDINR=5V, IINL=IQ5F, IQ5R, IQ6F, IQ6R Fig.1 LDCONT terminal source current ILDC LDCONT=5V, ILDC=ILDC Fig.1 〈 Regulator 1 〉 Fig.1 Output voltage VREG1 Output load stability ∆VRL1 2 IREG=0~200mA Fig.1 Supply voltage stability ∆VVCC1 2 VCC=6~10V, IREG=100mA Fig.1 REG1_B terminal sink current IREGSI1 3 REGOUT=2.5V, IREGSI1=IQREGSW1 Fig.1 REG1SW terminal sink current IREG1 REGSW=5V, IREGSI1=IQREGSW1 Fig.1 〈 Regulator 2 〉 Fig.1 Output voltage VREG2 Output load stability ∆VRL2 2 IREG=0~200mA Fig.1 Supply voltage stability ∆VVCC2 2 VCC=7~10V, IREG=100mA Fig.1 REG2_B terminal sink current IREGSI2 3 REGOUT=4V, IREGSI2=IQREGSW2 Fig.1 REG2SW terminal sink current IREG2 REGSW=5V, IREGSI2=IQREGSW2 Fig.1 ∗1 LDINF=LDINR=0V, REGSW=0V, VMUTE=5V, ICC1=IQ1+IQ2+IQ3 ∗2 LDINF=LDINR=0V, REGSW=0V, VMUTE=0V, ICC2=IQ1+IQ2+IQ3 ∗3 LDINF=5V, LDINR=0V, IDF=500mA, VOLH=VCC-VOLF ∗4 LDINF=5V, LDINR=0V, LDCONT=1V, GVLD=20log (VOLD/LDCONT) 6/9 BD7961FM Optical disc ICs !Application example REG2 OUT 5.0V±5% LOADING1 CONT MUTE M 34 33 32 31 30 29 28 27 26 GND3 VCC2 25 VCC3 24 23 22 + − 23.5k 23.5k 3 4 5 6 7 8 9 10 11 12 13 M LOADING1 FWD IN LOADING2 REV IN LOADING1 REV IN REG2 SW CH2 14 GND1 REG1 SW 15 CH1 16 M 10k (POW GND CH1~CH4) F 10k R 10k + − 10k GND2 2 47k + − 10k 23.5k REG1 SW CH5 1 + Level shift − + 10k 47k 10k R − Level shift 23.5k + Control logic F Level shift − + 10k (POW GND CH5/6) 10k REG2 SW − Control logic + − 47k + − + − − + Level shift REG1 47k + 10k REG2 10k − LD CONT2 + − 10k LD CONT1 10k (PRE VCC (POW VCC REG VCC) CH1~4) 19 CH3 + − − + 10k + − + − MUTE (CH1~CH4) (POW VCC CH5/6) 20 10k (REG GND) BIAS 21 CH4 VCC1 10k CH6 + − 35 + − 36 LOADING2 CONT VCC1 GND3 VCC2 + − BIAS VCC3 REG1 OUT 3.3V±5% 17 18 M CH4_IN CH3_IN CH1_IN CH2_IN LOADING2 FWD IN The resistance values are indicated in [Ω] Fig.4 !Operation notes (1) BD7961FM has a built-in thermal shutdown circuit. When the chip temperature reaches 175°C (Typ.), the output current from all drivers is muted. When the chip temperature returns to 150°C (Typ.), the circuit of the driver unit starts up. (2) When the mute terminal (pin33) is opened or the terminal voltage is reduced to 0.5V or less, the output current of the BTL driver unit is muted. In the normal state of use, pull up the voltage to 2.0V or more. (3) When the voltage of the regulator switch terminals (pin8 and 9) is increased to 2.0V or more, the output from the regulator is muted. In the normal state of use, pull down the voltage to 0.5V or less. (4) When the bias terminal (pin36) voltage is reduced to 0.7V or less, the BTL driver unit is muted. In the normal state of use, set the voltage to 1.1V or more. (5) Thermal shutdown mutes all drivers. When the mute ON voltage and the bias terminal voltage are reduced, only the BTL drivers are muted. When the drivers are muted, the BTL driver output terminal voltage becomes the internal bias voltage (VCC1−0.7)/2V. 7/9 BD7961FM Optical disc ICs (6) The loading drivers operate according to the following logic. INPUT FWD OUTPUT Function REV OUT+ OUT− L L Hi Z Hi Z High impedance L H L H REV mode H L H L FWD mode H H L L Brake mode The output voltage can be changed by adjusting the voltage input to the LDCONT terminal (gain of 6dB Typ.). However, even if the input voltage is increased excessively, the output voltage will not exceed the max. output voltage that depends on the supply voltage. (7) Supply the same voltage to VCC1 (pin25), VCC2 (pin28) and VCC3 (pin26). Insert by the pass capacitor (approx. 0.1µF) between VCC pin and GND pin of IC as near as possible. (8) Connect the radiating fin with external GND. (9) Output pin is to avoid short-circuit with VCC, GND and other output pins. An integrated circuit is damaged, and smoke may come out by the case. !Electrical characteristic curves 25 20 15 MUTE=L 10 R=8Ω 5 VCC=8V, BIAS=2.5V VIN=GND or VCC 2.0 R=20Ω LOSS VOLTAGE : VLOSS (V) MUTE=H OUTPUT VOLTAGE : VO (V) CIRCUIT CURRENT : ICC (mA) VCC=8V, BIAS=2.5V RegVCC=POW VCC BIAS= 1 VCC 2 30 0 −5 5 1.5 1.0 0.5 0 −0.5 −1.0 −1.5 −2.0 0 5 10 −1.0 −0.5 0 0.5 1.0 1.5 0 100 200 300 400 500 600 700 800 900 1000 SUPPLY VOLTAGE : VCC (V) INPUT VOLTAGE : VIN (V) LOAD CURRENT : IL (mA) Fig.5 Circuit current characteristic Fig.6 Input-output characteristic Fig.7 Output load current regulation (FWD) 0.3 8+47µH 5 0 −5 (REV) −5 0.4 20+47µH 0 5 0.2 0.1 0 −0.1 −0.2 −0.3 −0.4 −0.5 VCC=8V, LDCONT=8V −0.6 FWD=H (8V) −0.7 REV=L (0V) 0 100 200 300 400 500 600 700 800 900 1000 REGULATOR1 VOLTAGE : VREG1 (V) VCC=8V, LDCONT=Sweep OUTPUT VOLTAGE : VOLD (V) −1.5 15 LOSS VOLTAGE : VLOSS (V) 0 3.5 3.0 IO=200mA IO=500mA 2.5 2.0 1.5 1.0 0.5 0 0 1 2 3 4 5 6 7 8 9 10 LDCONT VOLTAGE : VLD (V) LOAD CURRENT : IL (mA) SUPPLY VOLTAGE : VCC (V) Fig.8 Input-output characteristic Fig.9 Output load current regulation Fig.10 Reg1 power supply characteristic 8/9 BD7961FM 5.0 IO=200mA 4.5 70mm×70mm, thickness of 1.6mm, percentage occupied by copper foil of less than 3%, glass epoxy mounting. 3 IO=500mA POWER DISSIPATION : (W) REGULATOR2 VOLTAGE : VREG2 (V) Optical disc ICs 4.0 3.5 3.0 2.5 2.0 1.5 1.0 2 1 0.5 0 0 1 2 3 4 5 6 7 8 9 0 10 0 25 50 75 100 125 150 SUPPLY VOLTAGE : VCC (V) AMBIENT TEMPERATURE : Ta (°C) Fig.11 Reg2 power supply characteristic Fig.12 Power dissipation !External dimensions (Units : mm) 18.5±0.1 2.2±0.05 0.1±0.05 0.85 2.4Max. 0.5±0.15 1.2±0.2 19 7.5±0.1 9.9±0.2 36 1 18 2.77±0.1 0.8 0.27+0.055 −0.045 0.08 S 0.37+0.05 −0.04 0.08 M HSOP-M36 9/9 Appendix Notes No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. Products listed in this document use silicon as a basic material. Products listed in this document are no antiradiation design. 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In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause) on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction. Appendix1-Rev1.0