1/4 STRUCTURE Silicon Monolithic Integrated Circuit NAME OF PRODUCT DC-AC Inverter Control IC TYPE ＢＤ９８９２Ｋ FUNCTION ・ 4ch control with Push-Pull ・ Short circuit protection with Timer Latch ・ Sequencing easily achieved with Soft Start Control ・ Under Voltage Lock Out ・ Short circuit protection with over voltage ・ Mode-selectable the operating or stand-by mode by stand-by pin ・ Synchronous operating the other BD9892FV IC’s ・ BURST mode controlled by PWN and DC input ・ Output linear control by external DC voltage ○Absolute Maximum Ratings（Ta = 25℃） Parameter Supply Voltage Operating Temperature Range Storage Temperature Range Power Dissipation Maximum Junction Temperature * Symbol VCC Topr Tstg Pd Tjmax Limits 15 -40～+90 -55～+125 1062* +150 Unit V ℃ ℃ mW ℃ Pd derated at 8.5mW/℃ for temperature above Ta = 25℃ (When mounted on a PCB 70.0mm×70.0mm×1.6mm) 〇Operating condition Parameter Supply voltage CT oscillation frequency BCT oscillation frequency Symbol VCC fCT fBCT Limits 5.5～14.0 20～150 0.05～0.50 Unit V kHz kHz Status of this document The Japanese version of this document is the official specification. Please use the translation version of this document as a reference to expedite understanding of the official version. If these are any uncertainty in translation version of this document, official version takes priority. REV. B 2/4 ○Electric Characteristics（Ta=25℃，VCC=7V） Parameter （（WHOLE DEVICE） ） Operating current Stand-by current （（OVER VOLTAGE DETECT）） FB over voltage detect voltage （（STAND BY CONTROL）） MIN. Limits TYP. MAX. Icc1 Icc2 － － 15.0 2 23.0 10 mA μA Vovf 2.20 2.40 2.60 V Symbol Conditions Unit CT=0.5V Stand-by voltage H VstH 2.0 － VCC V System ＯＮ Stand-by voltage L （（TIMER LATCH）） Timer Latch voltage Timer Latch current （（BURST MODE）） VstL -0.3 － 0.8 V System ＯＦＦ Vcp Icp 1.9 0.5 2.0 1.0 2.1 1.5 V μA BOSC Max voltage VburH 1.94 2.0 2.06 V BOSC Min Voltage VburL 0.4 0.5 0.6 V BOSC constant current IBCT 1.35/BRT 1.5/BRT 1.65/BRT A BOSC constant current fBCT 292.5 300.0 307.5 Hz ICT VoscH VoscL MAXDUTY Iss Visc Vss RSRT 1.35/RT 1.8 0.3 44 1.0 0.45 2.0 － 1.5/RT 2.0 0.5 46.5 2.0 0.50 2.2 200 1.65/RT 2.2 0.7 49 3.0 0.55 2.4 400 A V V % μA V V Ω V_A_uvloH ⊿V_A_uvlo Vuvlo2 ⊿Vuvlo2 Vuvlo_fb 4.95 0.21 2.242 0.083 2.222 5.15 0.29 2.315 0.110 2.315 5.35 0.037 2.388 0.137 2.407 V V V V V VREG IREG 3.038 5.0 3.100 － 3.162 － V mA IS threshold voltage Vis 1.225 1.250 1.275 V VS threshold voltage Vvs 1.220 1.250 1.280 V IS source current 1 Iis1 － － 1.5 μA IS source current 2 Iis2 13.0 20.0 27.0 μA VS source current （（OUTPUT BLOCK） ） NAch output voltage NBch output voltage NAch output voltage NBch output voltage Ivs － － 1.0 μA VoutNAH VoutNBH VoutNAL VoutNBL VCC-0.3 VCC-0.3 － － VCC-0.1 VCC-0.1 0.1 0.1 － － 0.3 0.3 V V V V RsinkNA － 5 10 Ω RsourceNA － 8 16 Ω RsinkNB － 5 10 Ω RsourceNB － 8 16 Ω fOUT 58.5 60.0 61.5 KHz VCOMP ⊿VCOMP 3.033 0.07 3.100 0.1 3.167 0.13 V V Normal output voltage VPH 2.9 3.1 3.3 Protect output voltage VPL － － 0.5 （This product is not designed for normal operation with in a radio active environment.） V V （（OSC BLOCK）） OSC constant current OSC Max voltage OSC Min voltage MAX DUTY Soft start current IS COMP detect Voltage SS COMP detect voltage SRT ON resistance （（UVLO BLOCK）） Operating voltage Hysteresis width Operating voltage (External UVLO) Hysteresis width FB OVP Mask Threshold voltage （（REG BLOCK）） REG output voltage REG source current （（FEED BACK BLOCK）） H H L L NAch output sink resistance NAch output source resistance NBch output sink resistance NBch output source resistance Drive output frequency （（COMP BLOCK）） Over voltage detect Hysteresis width （（PROTECT CLOCK）） REV. B fBCT=0.2kHz BCT(A,B)common spec fBCT=0.2kHz BCT(A,B) common spec BCT(A,B) common spec BRT=36kΩ BCT=0.048μF BCT(A,B) common spec fCT=60kHz fCT=60kHz fCT=60kHz SS(A,B) common spec VCC(A,B) common spec VCC(A,B) common spec Connected REG When Vref pin is open IS(1,2,3,4) common VS(1,2,3,4) common DUTY=2.0V IS(1,2,3,4) common DUTY=0V、IS=0.5V IS(1,2,3,4) common VS(1,2,3,4) common spec spec spec spec spec NA(1,2,3,4) common spec NB(1,2,3,4) common spec NA(1,2,3,4) common spec NB(1,2,3,4) common spec Isink=10mA NA(1,2,3,4) common spec Isource=10mA NA(1,2,3,4) common spec Isink=10mA NB(1,2,3,4) common spec Isource=10mA NB(1,2,3,4) common spec RT=20kΩ、CT=420pF NA,NB(1,2,3,4) common spec COMP(A,B) common spec COMP(A,B) common spec 3/4 〇Package Dimensions 〇Pin Description Device Mark BD9892K Lot No. QFP44 (unit:mm) 〇Block Diagram VCC_A VCC_B REG VREF CT OSC BLOCK REG BLOCK STB STB BLOCK RT BRT BCT_A BCT_B DUTY BOSC BLOCK PH DUTY BLOCK UVLO BLOCK VCC FB1 VCC_A F/B PWM SS_A BLOCK① BLOCK① LOGIC BLOCK① VS2 OUTPUT BLOCK① NA1 NB1 CT FB2 IS2 VCC_A F/B PWM BLOCK② SS_A BLOCK② LOGIC BLOCK② OUTPUT BLOCK② NA2 NB2 CT PGND_A FB3 VCC_B IS3 VS3 F/B BLOCK③ PWM BLOCK③ SS_B LOGIC BLOCK③ OUTPUT BLOCK③ FB4 IS4 NB3 VCC_B F/B PWM BLOCK④ SS_B BLOCK④ LOGIC BLOCK④ OUTPUT BLOCK④ NA4 NB4 CT PGND_B GND PROTECT BLOCK FAIL COMP_A COMP_A Over voltage detect for 1ch,2ch 2 3 4 5 6 7 NA1 NB1 PGND_A NB2 NA2 STB FET driver for 1ch FET driver for 1ch Ground for FET drivers FET driver for 2ch FET driver for 2ch Stand-by switch 8 VCC_A Supply voltage input 9 VREF 10 11 FAIL PH 12 13 REG DUTY 14 BRT 15 BCT_B 16 BCT_A 17 GND 18 CT 19 RT 20 SRT 21 CP_A 22 CP_B 23 SS_A 24 SS_B 25 26 27 28 29 30 31 32 33 VCC_B UVLO NA4 NB4 PGND_B NB3 NA3 COMP_B VS4 34 35 36 37 38 39 40 41 42 43 44 IS4 FB4 VS3 IS3 FB3 FB2 IS2 VS2 FB1 IS1 VS1 Function Reference voltage input for IS error amplifier Protect clock output Shift control input Internal regulator output Control PWM mode and BURST mode External resistor from BRT to GND for adjusting the BURST triangle oscillator External capacitor from BCT to GND for adjusting the BURST triangle oscillator for 3ch,4ch External capacitor from BCT to GND for adjusting the BURST triangle oscillator for 1ch,2ch GROUND External capacitor from CT to GND adjusting the triangle oscillator External resistor from RT to GND adjusting the triangle oscillator External resistor from SRT to RT adjusting the triangle oscillator External capacitor from CP to GND Timer Latch for 1ch,2ch External capacitor from CP to GND Timer Latch for 3ch,4ch for for for for for COMP_B CP_A CP_B External capacitor from SS to GND for Soft Start Control 1ch,2ch External capacitor from SS to GND for Soft Start Control 3ch,4ch Supply voltage input External Under Voltage Lock OUT FET driver for 4ch FET driver for 4ch Ground for FET drivers FET driver for 3ch FET driver for 3ch Over voltage detect for 3ch,4ch Error amplifier input④ NA3 CT VS4 1 UVLO SS_B IS1 Pin Name SYSTEM ON/OFF SS_A VS1 Pin No. SRT REV. B Error Error Error Error Error Error Error Error Error Error Error amplifier amplifier amplifier amplifier amplifier amplifier amplifier amplifier amplifier amplifier amplifier input④ output④ input③ input③ output③ output② input② input② output① input① input① 4/4 〇NOTE FOR USE １． When designing the external circuit, including adequate margins for variation between external devices and the IC.Use adequate margins for steady state and transient characteristics. ２． Recommended Operating Range The circuit functionality is guaranteed within of ambient temperature operation range as long as it is within recommended operating range. The standard electrical characteristic values cannot be guaranteed at other voltages in the operating ranges, however, the variation will be small. ３． Mounting Failures Mounting failures, such as misdirection or miscounts, may harm the device. ４． Electromagnetic Fields A strong electromagnetic field may cause the IC to malfunction. ５. The GND pin should be the location within ±0.3V compared with the PGND(A,B) pin ６． BD9892K has the short circuit protection with Thermal Shut Down System. When STB or Vcc pin re-supplied, They enables to cancel the latch. If It rise the temperature of the chip more than 170℃(TYP), It make the external FET OFF ７． Absolute maximum ratings are those values that, if exceeded, may cause the life of a device to become significantly shortened. Moreover, the exact failure mode caused by short or open is not defined. Physical countermeasures, such as a fuse, need to be considered when using a device beyond its maximum ratings. ８． About the external FET, the parasitic Capacitor may cause the gate voltage to change, when the drain voltage is switching. Make sure to leave adequate margin for this IC variation. ９． On operating Slow Start Control (SS(A,B) is less than 2.2V), It does not operate Timer Latch. １０． By STB voltage, BD9892K is changed to 2 states. Therefore, do not input STB pin voltage between one state and the other state (0.8～2.0). １１．The pin connected a connector need to connect to the resistor for electrical surge destruction. １２．This IC is a monolithic IC which (as shown is Fig-1)has P+ substrate and between the various pins. A P-N junction is formed from this P layer of each pin. For example, the relation between each potential is as follows, ○(When GND > PinB and GND > PinA, the P-N junction operates as a parasitic diode.) ○(When PinB > GND > PinA, the P-N junction operates as a parasitic transistor.) Parasitic diodes can occur inevitably in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits as well as operation faults and physical damage. Accordingly you must not use methods by which parasitic diodes operate, such as applying a voltage that is lower than the GND(P substrate)voltage to an input pin. Transistor (NPN) Resistance (PinA) B (PinB) E C Ｃ GND P P＋ N P＋ N Ｎ N Ｎ P substrate GND Parasitic diode N P substrate GND Parasitic diode (PinB) (PinA) B CＣ Ｂ EＥ Parasitic diode GND GND Other adjacent components Parasitic diode Fig.1 Simplified structure of a Bipolar IC REV. B Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. 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