ONSEMI MC10EP116FA

MC10EP116
Hex Differential Line
Receiver
The MC10EP116/100EP116 is a 6-bit differential line receiver
based on the EP16 device. The 3.0GHz bandwidth provided by the
high frequency outputs makes the device ideal for buffering of very
high speed oscillators.
A VBB pin is available to AC couple an input signal to the device.
More information on AC coupling can be found in the design
handbook interfacing with ECLinPS on our website.
The design incorporates two stages of gain, internal to the device,
making it an excellent choice for use in high bandwidth amplifier
applications.
The differential inputs have internal clamp structures which will
force the Q output of a gate in an open input condition to go to a LOW
state. Thus, inputs of unused gates can be left open and will not affect
the operation of the rest of the device. Note that the input clamp will
take affect only if both inputs fall 2.5V below VCC. All VCC and VEE
pins must be externally connected to power supply to guarantee proper
operation.
•
•
•
•
•
•
•
•
•
•
•
•
230ps Typical Propagation Delay
High Bandwidth to 3.0 GHz Typical
PECL mode: 3.0V to 5.5V VCC with VEE = 0V
ECL mode: 0V VCC with VEE = –3.0V to –5.5V
Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D
Q Output will default LOW with inputs open or at VEE
ESD Protection: 2KV HBM, 100V MM
VBB Output
New Differential Input Common Mode Range
Moisture Sensitivity Level 2
For Additional Information, See Application Note AND8003/D
Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34
Transistor Count: 729 devices
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32–LEAD TQFP
FA SUFFIX
CASE 873A
MARKING DIAGRAM*
MC10
EP116
AWLYYWW
A
WL
YY
WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
32
1
*For additional information, see Application Note
AND8002/D
PIN DESCRIPTION
PIN
FUNCTION
D[0:5], D[0:5]
ECL Differential Data Inputs
Q[0:5], Q[0:5]
ECL Differential Data Outputs
VBB
Reference Voltage Output
VCC
Positive Supply
VEE
Negative, 0 Supply
LOGIC DIAGRAM
D0
D0
Q0
Q0
D1
D1
Q1
Q1
D2
D2
Q2
Q2
D3
D3
Q3
Q3
D4
D4
Q4
Q4
D5
D5
Q5
Q5
ORDERING INFORMATION
Device
Package
Shipping
MC10EP116FA
TQFP
250 Units/Tray
MC10EP116FAR2
TQFP
2000 Tape & Reel
VBB
 Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 3
1
Publication Order Number:
MC10EP116/D
MC10EP116
D4
D5
D5
Q5
Q5
Q4
Q4 VCC
24
23
22
21
20
19
18
17
D4
25
16
VCC
D3
26
15
Q3
D3
27
14
Q3
VEE
28
13
VCC
D2
29
12
VCC
D2
30
11
Q2
D1
31
10
Q2
D1
32
MC10EP116
9
1
2
3
4
D0
D0 VBB Q0
5
6
Q0
Q1
7
VCC
8
Q1 VEE
Figure 1. 32–Lead LQFP Pinout (Top View)
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VEE
Power Supply (VCC = 0V)
–6.0 to 0
VDC
VCC
Power Supply (VEE = 0V)
6.0 to 0
VDC
VI
Input Voltage (VCC = 0V, VI not more negative than VEE)
–6.0 to 0
VDC
VI
Input Voltage (VEE = 0V, VI not more positive than VCC)
6.0 to 0
VDC
Iout
Output Current
50
100
mA
IBB
VBB Sink/Source Current{
± 0.5
mA
TA
Operating Temperature Range
–40 to +85
°C
Tstg
Storage Temperature
–65 to +150
°C
θJA
Thermal Resistance (Junction–to–Ambient)
80
55
°C/W
θJC
Thermal Resistance (Junction–to–Case)
12 to 17
°C/W
Tsol
Solder Temperature (<2 to 3 Seconds: 245°C desired)
265
°C
Continuous
Surge
Still Air
500lfpm
* Maximum Ratings are those values beyond which damage to the device may occur.
{ Use for inputs of same package only.
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2
MC10EP116
DC CHARACTERISTICS, ECL/LVECL (VCC = 0V; VEE = –5.5V to –3.0V) (Note 4.)
–40°C
Symbol
Characteristic
Min
25°C
Typ
85°C
Max
Min
Typ
Max
Min
95
55
80
95
55
Typ
Max
Unit
95
mA
IEE
Power Supply Current
(Note 1.)
55
VOH
Output HIGH Voltage
(Note 2.)
–1135
–1060
–885
–1070
–945
–820
–1010
–885
–760
mV
VOL
Output LOW Voltage
(Note 2.)
–1995
–1810
–1685
–1995
–1745
–1620
–1995
–1685
–1560
mV
VIH
Input HIGH Voltage
Single Ended
–1210
–885
–1145
–820
–1085
–760
mV
VIL
Input LOW Voltage
Single Ended
–1935
–1610
–1870
–1545
–1810
–1485
mV
VBB
Output Voltage Reference
–1575
–1375
–1540
–1340
–1515
–1315
mV
0.0
V
150
µA
VIHCMR Input HIGH Voltage Common Mode
Range (Note 3.)
IIH
Input HIGH Current
IIL
Input LOW Current
–1475
VEE+2.0
0.0
–1440
VEE+2.0
150
D
D
0.5
–150
0.0
–1415
VEE+2.0
150
0.5
–150
µA
0.5
–150
NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.
1. VCC = 0V, VEE = VEEmin to VEEmax, all other pins floating.
2. All loading with 50 ohms to VCC–2.0 volts.
3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC.
4. Input and output parameters vary 1:1 with VCC.
DC CHARACTERISTICS, LVPECL (VCC = 3.3V ± 0.3V, VEE = 0V) (Note 8.)
–40°C
Symbol
Characteristic
Min
25°C
Typ
85°C
Max
Min
Typ
Max
Min
95
55
80
95
55
Typ
Max
Unit
95
mA
IEE
Power Supply Current
(Note 5.)
55
VOH
Output HIGH Voltage
(Note 6.)
2165
2240
2415
2230
2355
2480
2290
2415
2540
mV
VOL
Output LOW Voltage
(Note 6.)
1305
1490
1615
1305
1555
1680
1305
1615
1740
mV
VIH
Input HIGH Voltage
Single Ended
2090
2415
2155
2480
2215
2540
mV
VIL
Input LOW Voltage
Single Ended
1365
1690
1430
1755
1490
1815
mV
VBB
Output Voltage Reference
1725
1925
1760
1960
1785
1985
mV
3.3
2.0
3.3
2.0
3.3
V
150
µA
VIHCMR Input HIGH Voltage Common Mode
Range (Note 7.)
IIH
Input HIGH Current
IIL
Input LOW Current
1825
2.0
150
D
D
0.5
–150
1860
150
0.5
–150
0.5
–150
1885
µA
NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.
5. VCC = 3.0V, VEE = 0V, all other pins floating.
6. All loading with 50 ohms to VCC–2.0 volts.
7. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC.
8. Input and output parameters vary 1:1 with VCC.
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3
MC10EP116
DC CHARACTERISTICS, PECL (VCC = 5.0V ± 0.5V, VEE = 0V) (Note 12.)
–40°C
Symbol
Characteristic
Min
25°C
Typ
85°C
Max
Min
Typ
Max
Min
95
55
80
95
55
Typ
Max
Unit
95
mA
IEE
Power Supply Current
(Note 9.)
55
VOH
Output HIGH Voltage
(Note 10.)
3865
3940
4115
3930
4055
4180
3990
4115
4240
mV
VOL
Output LOW Voltage
(Note 10.)
3005
3190
3315
3005
3255
3380
3005
3315
3440
mV
VIH
Input HIGH Voltage
Single Ended
3790
4115
3855
4180
3915
4240
mV
VIL
Input LOW Voltage
Single Ended
3065
3390
3130
3455
3190
3515
mV
VBB
Output Voltage Reference
3425
3625
3460
3660
3485
3685
mV
5.0
2.0
5.0
2.0
5.0
V
150
µA
VIHCMR Input HIGH Voltage Common Mode
Range (Note 11.)
IIH
Input HIGH Current
IIL
Input LOW Current
3525
2.0
3560
150
D
D
0.5
–150
3585
150
0.5
–150
µA
0.5
–150
NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.
9. VCC = 5.0V, VEE = 0V, all other pins floating.
10. All loading with 50 ohms to VCC–2.0 volts.
11. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC.
12. Input and output parameters vary 1:1 with VCC.
AC CHARACTERISTICS (VCC = 0V; VEE = –3.0V to –5.5V) or (VCC = 3.0V to 5.5V; VEE = 0V)
–40°C
Symbol
Characteristic
fmax
Maximum Toggle
Frequency (Note 13.)
tPLH,
tPHL
Propagation Delay to
Output Differential
tSKEW
Duty Cycle Skew (Note 14.)
tJITTER
Cycle–to–Cycle Jitter
VPP
Input Voltage Swing (Diff.)
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
3.0
150
150
250
350
5.0
5.0
20
TBD
TBD
1200
150
GHz
250
800
350
150
800
Unit
180
280
380
ps
5.0
20
ps
TBD
1200
150
800
ps
1200
mV
tr
Output Rise/Fall Times
Q
90
150
220
90
160
240
90
160
250
ps
tf
(20% – 80%)
13. Fmax guaranteed for functionality only.
14. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
are measured from the cross point of the inputs to the cross point of the outputs.
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4
MC10EP116
PACKAGE DIMENSIONS
A
–T–, –U–, –Z–
TQFP
FA SUFFIX
32–LEAD PLASTIC PACKAGE
CASE 873A–02
ISSUE A
4X
A1
32
0.20 (0.008) AB T–U Z
25
1
–U–
–T–
B
V
AE
P
B1
DETAIL Y
17
8
V1
AE
DETAIL Y
9
4X
–Z–
9
0.20 (0.008) AC T–U Z
S1
S
DETAIL AD
G
–AB–
0.10 (0.004) AC
AC T–U Z
–AC–
BASE
METAL
ÉÉ
ÉÉ
ÉÉ
ÉÉ
F
8X
M_
R
M
N
D
J
0.20 (0.008)
SEATING
PLANE
SECTION AE–AE
W
K
X
DETAIL AD
Q_
GAUGE PLANE
H
0.250 (0.010)
C E
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5
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DATUM PLANE –AB– IS LOCATED AT BOTTOM
OF LEAD AND IS COINCIDENT WITH THE LEAD
WHERE THE LEAD EXITS THE PLASTIC BODY AT
THE BOTTOM OF THE PARTING LINE.
4. DATUMS –T–, –U–, AND –Z– TO BE
DETERMINED AT DATUM PLANE –AB–.
5. DIMENSIONS S AND V TO BE DETERMINED AT
SEATING PLANE –AC–.
6. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE PROTRUSION
IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B
DO INCLUDE MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE –AB–.
7. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. DAMBAR PROTRUSION SHALL
NOT CAUSE THE D DIMENSION TO EXCEED
0.520 (0.020).
8. MINIMUM SOLDER PLATE THICKNESS SHALL
BE 0.0076 (0.0003).
9. EXACT SHAPE OF EACH CORNER MAY VARY
FROM DEPICTION.
DIM
A
A1
B
B1
C
D
E
F
G
H
J
K
M
N
P
Q
R
S
S1
V
V1
W
X
MILLIMETERS
MIN
MAX
7.000 BSC
3.500 BSC
7.000 BSC
3.500 BSC
1.400
1.600
0.300
0.450
1.350
1.450
0.300
0.400
0.800 BSC
0.050
0.150
0.090
0.200
0.500
0.700
12_ REF
0.090
0.160
0.400 BSC
1_
5_
0.150
0.250
9.000 BSC
4.500 BSC
9.000 BSC
4.500 BSC
0.200 REF
1.000 REF
INCHES
MIN
MAX
0.276 BSC
0.138 BSC
0.276 BSC
0.138 BSC
0.055
0.063
0.012
0.018
0.053
0.057
0.012
0.016
0.031 BSC
0.002
0.006
0.004
0.008
0.020
0.028
12_ REF
0.004
0.006
0.016 BSC
1_
5_
0.006
0.010
0.354 BSC
0.177 BSC
0.354 BSC
0.177 BSC
0.008 REF
0.039 REF
MC10EP116
Notes
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6
MC10EP116
Notes
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7
MC10EP116
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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8
MC10EP116/D