SEMICONDUCTOR TECHNICAL DATA The MC10168 is a Quad Latch with common clocking to all four latches. Separate output enabling gates are provided for each latch, allowing direct wiring to a bus. When the clock is high, outputs will follow the D inputs. Information is latched on the negative–going transition of the clock. PD = 310 mW typ/pkg (No Load) tpd = G to Q = 2 ns typ D to Q = 3 ns typ C to Q = 4 ns typ tr, tf = 2.0 ns typ (20%–80%) P SUFFIX PLASTIC PACKAGE CASE 648–08 LOGIC DIAGRAM D0 3 PIN ASSIGNMENT Q0 VCC1 1 16 VCC2 Q0 2 15 Q3 D0 3 14 D3 G1 4 13 CC 7 G0 5 12 G2 CC 13 Q1 6 11 Q2 D2 D1 7 10 G3 VEE 8 9 D2 G0 5 G1 4 Q1 D1 2 Q0 6 Q1 9 Q2 11 Q2 G2 12 G3 10 15 Q3 Q3 D3 14 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 TRUTH TABLE G C D H X X Qn+1 L L L X Qn L H L L L H H H 9/96 Motorola, Inc. 1996 3–99 REV 6 MC10168 ELECTRICAL CHARACTERISTICS Test Limits Characteristic Power Supply Drain Current Input Current Symbol Pin Pi Under Test IE 8 82 IinH 3,7,9,14 4,5,10,12 13 390 425 460 IinL * 0.5 –30°C Min +25°C Max Min +85°C Max Unit 75 82 mAdc 245 265 290 245 265 290 µAdc Typ Max 60 0.5 Min µAdc 0.3 Output Voltage Logic 1 VOH 2 6 –1.060 –1.060 –0.890 –0.890 –0.960 –0.960 –0.810 –0.810 –0.890 –0.890 –0.700 –0.700 Vdc Output Voltage Logic 0 VOL 2 6 –1.890 –1.890 –1.675 –1.675 –1.850 –1.850 –1.650 –1.650 –1.825 –1.825 –1.615 –1.615 Vdc Threshold Voltage Logic 1 VOHA 2 6 –1.080 –1.080 Threshold Voltage Logic 0 VOLA 2 6 Switching Times –0.980 –0.980 –0.910 –0.910 –1.655 –1.655 –1.630 –1.630 –1.595 –1.595 (50Ω Load) Propagation Delay Data Gate Clock 2 2 2 1.0 1.0 1.0 Setup Time t3+13+ 2 2.5 2.5 2.5 Hold Time t13+3+ 2 1.0 1.0 1.0 t2+ 2 1.0 (20 to 80%) Fall Time (20 to 80%) t2– 2 1.0 * Individually test each input applying VIH or VIL to input under test. MOTOROLA Vdc ns t3+2+ t5–2+ t13+2+ Rise Time Vdc 5.6 3.2 5.8 1.0 1.0 1.0 3.0 2.0 4.0 5.4 3.1 5.6 1.1 1.0 1.2 5.9 3.4 6.2 3.6 1.1 2.0 3.5 1.1 3.8 3.6 1.1 2.0 3.5 1.1 3.8 3–100 MECL Data DL122 — Rev 6 MC10168 ELECTRICAL CHARACTERISTICS (continued) TEST VOLTAGE VALUES (Volts) Characteristic Power Supply Drain Current Input Current @ Test Temperature VIHmax VILmin VIHAmin VILAmax VEE –30°C –0.890 –1.890 –1.205 –1.500 –5.2 +25°C –0.810 –1.850 –1.105 –1.475 –5.2 +85°C –0.700 –1.825 –1.035 –1.440 –5.2 Symbol Pin Under Test IE 8 IinH 3,7,9,14 4,5,10,12 13 TEST VOLTAGE APPLIED TO PINS LISTED BELOW VIHmax VILmin VIHAmin VILAmax * * 13 (VCC) Gnd 8 1, 16 8 8 8 1, 16 1, 16 1, 16 IinL * 8 1, 16 Output Voltage Logic 1 VOH 2 6 3, 13 7, 13 8 8 1, 16 1, 16 Output Voltage Logic 0 VOL 2 6 3, 5 4, 7 8 8 1, 16 1, 16 Threshold Voltage Logic 1 VOHA 2 6 13 13 8 8 1, 16 1, 16 Threshold Voltage Logic 0 VOLA 2 6 13 13 3 7 8 8 1, 16 1, 16 Pulse In Pulse Out –3.2 V +2.0 V t3+2+ t5–2+ t13+2+ 2 2 2 3 5 13 2 2 2 8 8 8 1, 16 1, 16 1, 16 t3+13+ 2 8 1, 16 t13+3+ 2 t2+ 2 Switching Times Propagation Delay (50Ω Load) Data Gate Clock Setup Time Hold Time Rise Time (20 to 80%) * VEE +1.11V Fall Time (20 to 80%) t2– 2 * Individually test each input applying VIH or VIL to input under test. 3 7 8 1, 16 3 2 8 1, 16 3 2 8 1, 16 Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner. MECL Data DL122 — Rev 6 3–101 MOTOROLA MC10168 OUTLINE DIMENSIONS P SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R –A– 16 9 1 8 B F C L S –T– SEATING PLANE K H G D M J 16 PL 0.25 (0.010) M T A M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315 Mfax: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 ◊ MOTOROLA 3–102 *MC10168/D* MC10168/D MECL Data DL122 — Rev 6