19-1719; Rev 0; 4/00 Low-Cost, Low-Power, 6-Bit DACs with 3-Wire Serial Interface in SOT23 Applications Automatic Tuning (VCO) Power Amplifier Bias Control Features ♦ 6-Bit Resolution in a Miniature 6-Pin SOT23 Package ♦ Wide +2.7V to +5.5V Supply Range (MAX5365) ♦ <1µA Shutdown Mode ♦ Software-Selectable Output Resistance During Shutdown ♦ Buffered Output Drives Resistive Loads ♦ Low-Glitch Power-On Reset to Zero DAC Output ♦ 3-Wire SPI/QSPI/MICROWIRE-Compatible Interface ♦ <±5% Full-Scale Error (MAX5365) ♦ <±1LSB max INL/DNL ♦ Low 230µA max Supply Current Ordering Information PART TEMP. RANGE PINPACKAGE SOT TOP MARK MAX5363EUT-T -40°C to +85°C 6 SOT23-6 AADE MAX5364EUT-T -40°C to +85°C 6 SOT23-6 AADG MAX5365EUT-T -40°C to +85°C 6 SOT23-6 AADI Programmable Threshold Levels Selector Table Automatic Gain Control (AGC) PART SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. INTERNAL REFERENCE MAX5363 2V MAX5364 4V MAX5365 0.9 ✕ V DD Typical Operating Circuit Pin Configuration TOP VIEW +2.7V TO +5.5V OUT MC68XXXX PCS0 MOSI SCK GND 1 6 CS 5 SCLK 4 DIN VDD CS DIN SCLK MAX5365 OUT GND 2 MAX5363 MAX5364 MAX5365 VDD 3 SOT23 ________________________________________________________________ Maxim Integrated Products 1 For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. MAX5363/MAX5364/MAX5365 General Description The MAX5363/MAX5364/MAX5365 low-cost, 6-bit digitalto-analog converters (DACs) in miniature 6-pin SOT23 packages have a simple 3-wire, SPI/QSPI/ MICROWIRE-compatible serial interface that operates up to 10MHz. The MAX5363 has an internal +2V reference and operates from a +2.7V to +3.6V supply. The MAX5364 has an internal +4V reference and operates from a +4.5V to +5.5V supply. The MAX5365 operates over the full +2.7 to +5.5V supply range and has an internal reference equal to 0.9 ✕ VDD. The MAX5363/MAX5364/MAX5365 require an extremely low supply current of only 150µA (typ) and provide a buffered voltage output. These devices power up at zero code and remain there until a new code is written to the DAC registers. This provides additional safety for applications that drive valves or other transducers that need to be off on power-up. The MAX5363/MAX5364/ MAX5365 include a 1µA, low-power shutdown mode that features software-selectable output loads of 1kΩ, 100kΩ, or 1MΩ to ground. MAX5363/MAX5364/MAX5365 Low-Cost, Low-Power, 6-Bit DACs with 3-Wire Serial Interface in SOT23 ABSOLUTE MAXIMUM RATINGS VDD to GND ..............................................................-0.3V to +6V OUT ............................................................-0.3V to (VDD + 0.3V) CS, SCLK, DIN to GND ............................................-0.3V to +6V Maximum Current into Any Pin............................................50mA Continuous Power Dissipation (TA = +70°C) 6-Pin SOT23 (derate 8.7mW/°C above +70°C)...........696mW Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Maximum Junction Temperature .....................................+150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +2.7V to +3.6V (MAX5363), VDD = +4.5V to +5.5V (MAX5364), VDD = +2.7V to +5.5V (MAX5365), RL = 10kΩ, CL = 50pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC ACCURACY Resolution 6 Bits Integral Linearity Error INL (Note 1) ±1 LSB Differential Linearity Error DNL Guaranteed monotonic ±1 LSB Offset Error VOS (Note 2) ±25 mV 60 dB ±1 Offset Error Supply Rejection MAX5365 (Notes 2, 3) Offset Error Temperature Coefficient MAX5363/MAX5364 3 MAX5365 1 Full-Scale Error Code = 63, no load Full-Scale Error Supply Code = 63 (Note 4) Full-Scale Error Temperature Coefficient Code = 63 ppm/°C MAX5363/MAX5364 10 MAX5365 5 % of ideal FS 50 dB MAX5363/MAX5364 MAX5363/MAX5364 ±40 MAX5365 ±10 ppm/°C DAC OUTPUT Internal Reference Voltage (Note 5) Output Load Regulation Shutdown Output Resistance to GND REF MAX5363 1.8 2 2.2 MAX5364 3.6 4 4.4 MAX5365 0.85 × VDD 0.9 × VDD 0.95 × VDD Code = 63, 0 to 100µA 0.5 Code = 0, 0 to 100µA 0.5 VOUT = 0 to VDD [D13, D12] = 0, 1 1k [D13, D12] = 1, 0 100k [D13, D12] = 1, 1 1M V LSB Ω DYNAMIC PERFORMANCE Voltage Output Slew Rate Positive and negative 0.4 V/µs Output Settling Time To 1/2 LSB, 50kΩ and 50pF load (Note 6) 20 µs Digital Feedthrough Code = 0, all digital inputs from 0 to VDD 2 nVs 2 _______________________________________________________________________________________ Low-Cost, Low-Power, 6-Bit DACs with 3-Wire Serial Interface in SOT23 (VDD = +2.7V to +3.6V (MAX5363), VDD = +4.5V to +5.5V (MAX5364), VDD = +2.7V to +5.5V (MAX5365), RL = 10kΩ, CL = 50pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Digital-Analog Glitch Impulse Code 31 to code 32 40 nVs Wake-Up Time From software shutdown 50 µs POWER REQUIREMENTS Supply Voltage VDD Supply Current IDD MAX5363 2.7 3.6 MAX5364 4.5 5.5 MAX5365 2.7 5.5 No load, all digital inputs at 0 or V DD , code = 63 150 Shutdown mode 230 V µA 1 DIGITAL INPUTS Input Low Voltage VIL Input High Voltage VIH Input Hysteresis VH Input Capacitance CIN Input Leakage Current IIN 0.3 × VDD 0.7 × VDD (Note 7) V V 0.05 × VDD V 10 pF ±1 µA TIMING CHARACTERISTICS (Figures 3 and 4, VDD = +2.7V to +3.6V (MAX5363), VDD = +4.5V to +5.5V (MAX5364), VDD = +2.7V to +5.5V (MAX5365), RL = 10kΩ, CL = 50pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are TA = +25°C.) (Note 7) PARAMETER SCLK Period SCLK Pulse Width High SYMBOL tCP tCH CONDITIONS MIN 100 40 TYP MAX UNITS ns ns SCLK Pulse Width Low tCL 40 ns CS Fall to SCLK Rise Setup Time tCSS 40 ns SCLK Rise to CS Rise Hold Time tCSH 0 ns DIN Setup Time tDS 40 ns DIN Hold Time tDH 0 ns SCLK Rise to CS Fall Delay tCS0 10 ns CS Rise to SCLK Rise Hold tCS1 40 ns CS Pulse Width High tCSW 100 ns _______________________________________________________________________________________ 3 MAX5363/MAX5364/MAX5365 ELECTRICAL CHARACTERISTICS (continued) TIMING CHARACTERISTICS (continued) (Figures 3 and 4, VDD = +2.7V to +3.6V (MAX5363), VDD = +4.5V to +5.5V (MAX5364), VDD = +2.7V to +5.5V (MAX5365), RL = 10kΩ, CL = 50pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are TA = +25°C.) (Note 7) Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Guaranteed from code 2 to code 63. The offset value extrapolated from the range over which the INL is guaranteed. MAX5365 tested at 5V ±10%. MAX5363 tested at 3V ±10%; MAX5364 tested at 5V ±10%. Actual output voltages at full scale are 63/64 ✕ VREF. Output settling time is measured by stepping from code 2 to code 63, and from code 63 to code 2. Guaranteed by design. Typical Operating Characteristics (VDD = +3.0V (MAX5363), VDD = +5.0V (MAX5364/MAX5365), TA = +25°C, unless otherwise noted.) INL (LSB) -0.025 25 50 2.5 75 -0.025 -0.050 -0.050 0 MAX5363/4/5-03 0 MAX5363/4/5-02 0 MAX5363/4/5-01 0.030 0.025 0.020 0.015 0.010 0.005 0 -0.005 -0.010 -0.015 -0.020 -0.025 -0.030 -0.035 -0.040 -0.045 INL (LSB) 3.0 3.5 4.0 4.5 5.0 -40 5.5 -20 0 20 40 60 80 CODE SUPPLY VOLTAGE (V) TEMPERATURE (°C) DIFFERENTIAL NONLINEARITY vs. CODE DIFFERENTIAL NONLINEARITY vs. SUPPLY VOLTAGE DIFFERENTIAL NONLINEARITY vs. TEMPERATURE DNL (LSB) 0 -0.005 -0.005 -0.010 -0.005 DNL (LSB) 0.005 0 -0.015 100 MAX5363/4/5-06 0 MAX5363/4/5-04 0.010 MAX5363/4/5-05 INL (LSB) INTEGRAL NONLINEARITY vs. TEMPERATURE INTEGRAL NONLINEARITY vs. SUPPLY VOLTAGE INTEGRAL NONLINEARITY vs. CODE DNL (LSB) MAX5363/MAX5364/MAX5365 Low-Cost, Low-Power, 6-Bit DACs with 3-Wire Serial Interface in SOT23 -0.010 -0.015 -0.010 -0.020 -0.025 -0.025 0 25 50 CODE 4 -0.020 -0.020 -0.015 75 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 5.0 5.5 -40 -20 0 20 40 60 TEMPERATURE (°C) _______________________________________________________________________________________ 80 100 Low-Cost, Low-Power, 6-Bit DACs with 3-Wire Serial Interface in SOT23 TOTAL UNADJUSTED ERROR vs. CODE MAX5363/4/5-09 0 MAX5363/4/5-08 0.10 OFFSET ERROR vs. TEMPERATURE OFFSET ERROR vs. SUPPLY VOLTAGE 0 MAX5363/4/5-07 0.15 -0.05 VOS (mV) VOS (mV) 0 -0.25 -0.25 -0.10 -0.15 -0.50 -0.50 25 50 75 2.5 3.0 CODE 3.5 4.0 4.5 5.0 -40 5.5 -20 0 FULL-SCALE ERROR vs. TEMPERATURE 0.75 0.8 0.50 0.4 MAX5365 0 0 -0.4 FULL-SCALE ERROR (LSB) MAX5363 1.2 FULL-SCALE ERROR (%) MAX5364 0.25 40 60 80 100 FULL-SCALE ERROR vs. TEMPERATURE MAX5363/4/5-10 0.50 20 TEMPERATURE (°C) SUPPLY VOLTAGE (V) 0.75 FULL-SCALE ERROR (LSB) MAX5363/4/5-11 1.2 0.8 MAX5363 MAX5364 0.25 0.4 0 0 MAX5365 -0.25 -0.4 -0.8 -0.50 -0.8 -1.2 5.5 -0.75 -0.25 -0.50 NO LOAD -0.75 3.0 3.5 4.0 4.5 5.0 -40 -20 SUPPLY VOLTAGE (V) SUPPLY CURRENT vs. SUPPLY VOLTAGE 180 MAX5364 40 60 80 -1.2 100 SUPPLY CURRENT vs. TEMPERATURE 160 140 MAX5365 100 80 60 40 NO LOAD 155 SUPPLY CURRENT (µA) MAX5363 120 20 TEMPERATURE (°C) 200 160 0 MAX5363/4/5-13 2.5 MAX5363/4/5-12 0 FULL-SCALE ERROR (%) -0.20 SUPPLY CURRENT (µA) TUE (LSB) 0.05 MAX5364 150 145 MAX5365 140 MAX5363 135 20 0 130 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 5.0 5.5 -40 -20 0 20 40 60 80 100 TEMPERATURE (°C) _______________________________________________________________________________________ 5 MAX5363/MAX5364/MAX5365 Typical Operating Characteristics (continued) (VDD = +3.0V (MAX5363), VDD = +5.0V (MAX5364/MAX5365), TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (VDD = +3.0V (MAX5363), VDD = +5.0V (MAX5364/MAX5365), TA = +25°C, unless otherwise noted.) SHUTDOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE 0.8 150 145 140 MAX5363 VDD = +5V 135 MAX5363 VDD = +3V 0.6 0.4 0.2 0 8 16 24 32 40 48 56 CODE OUTPUT LOAD REGULATION 0.6 VDD = +5V 0.4 VDD = +3V 0 2.5 64 0.8 0.2 0 130 1.0 MAX5363/4/5-15 MAX5365 VDD = +5V SUPPLY CURRENT (µA) 3.0 3.5 4.0 4.5 5.0 5.5 -40 -20 0 20 40 60 SUPPLY VOLTAGE (V) TEMPERATURE (°C) OUTPUT VOLTAGE ON POWER-UP MAX5363 OUTPUT VOLTAGE EXITING SHUTDOWN 80 100 MAX5363/4/5-17 MAX5363/4/5-18 4.5 A 4.0 MAX5363/4/5-19 SUPPLY CURRENT (µA) 155 1.0 SUPPLY CURRENT (µA) MAX5364 VDD = +5V MAX5363/4/5-14 160 SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE MAX5363/4/5-16 SUPPLY CURRENT vs. CODE 3.5 OUT 500mV/div OUT 50mV/div 3.0 2.5 B 2.0 C 1.5 0.2 D E 0.1 0 0 1 2 3 4 5 6 7 8 9 VOUT ZERO CODE (V) VOUT FULL SCALE (V) VDD 2V/div CS 3V/div 10 4µs/div 10µs/div MAX5363 OUTPUT SETTLING FROM 1/4FS TO 3/4FS MAX5363 OUTPUT SETTLING FROM 3/4FS TO 1/4FS A: MAX5364/MAX5365, VDD = +4.5V, FULL SCALE OR SOURCING B: MAX5363, FULL SCALE, VDD = +2.7V SINKING, VDD = +5.0V SOURCING C: MAX5363, FULL SCALE, VDD = +2.7V SOURCING D: ZERO CODE, VDD = +2.7V SINKING E: ZERO CODE, VDD = +5.5V SINKING MAX5363/4/5-21 LOAD CURRENT (mA) MAX5363/4/5-20 MAX5363/MAX5364/MAX5365 Low-Cost, Low-Power, 6-Bit DACs with 3-Wire Serial Interface in SOT23 OUT 0.5V/div OUT 0.5V/div CS 3V/div CS 3V/div 1µs/div 6 _______________________________________________________________________________________ 1µs/div Low-Cost, Low-Power, 6-Bit DACs with 3-Wire Serial Interface in SOT23 MAX5363 OUTPUT SETTLING 1/4LSB STEP UP MAX5363/4/5-23 MAX5363/4/5-22 MAX5363 OUTPUT SETTLING 1/4LSB STEP DOWN OUT 20mV/div AC-COUPLED OUT 20mV/div AC-COUPLED CS 3V/div CS 3V/div 2µs/div 2µs/div 0 x 20 TO 0 x 1F 0 x 1F TO 0 x 20 Pin Description PIN NAME FUNCTION 1 OUT DAC Voltage Output 2 GND Ground 3 VDD Power-Supply Input 4 DIN Serial Data Input 5 SCLK Serial Clock Input 6 CS Chip-Select Input Detailed Description The MAX5363/MAX5364/MAX5365 voltage-output, 6-bit DACs offer full 6-bit performance with less than 1LSB integral nonlinearity error and less than 1LSB differential nonlinearity error, ensuring monotonic performance. The devices use a simple 3-wire, SPI/QSPI/ MICROWIREcompatible serial interface that operates up to 10MHz. The MAX5363/MAX5364/MAX5365 include an internal reference, an output buffer, and three low-current shutdown modes, making these devices ideal for lowpower, highly integrated applications. Figure 1 shows the devices’ functional diagram. Analog Section The MAX5363/MAX5364MAX5365 employ a currentsteering DAC topology as shown in Figure 2. At the core of the DAC is a reference voltage-to-current converter (V/I) that generates a reference current. This current is mirrored to 63 equally weighted current sources. DAC switches control the outputs of these current mirrors so that only the desired fraction of the total current-mirror currents is steered to the DAC output. The current is then converted to a voltage across a resistor, and this voltage is buffered by the output buffer amplifier. Output Voltage Table 1 shows the relationship between the DAC code and the analog output voltage. The 6-bit DAC code is binary unipolar with 1LSB = (VREF/64). The MAX5363/ MAX5364 have a full-scale output voltage of (+2V - 1LSB) and (+4V - 1LSB), respectively, set by the internal references. The MAX5365 has a full-scale output voltage of (0.9 ✕ VDD - 1LSB). Output Buffer The DAC voltage output is an internally buffered unitygain follower that slews up to ±0.4V/µs. The output can swing from 0 to full scale. With a 1/4FS to 3/4FS output transition, the amplifier outputs typically settle to 1/2LSB in less than 5µs when loaded with 10kΩ in parallel with 50pF. The buffer amplifiers are stable with any _______________________________________________________________________________________ 7 MAX5363/MAX5364/MAX5365 Typical Operating Characteristics (continued) (VDD = +3.0V (MAX5363), VDD = +5.0V (MAX5364/MAX5365), TA = +25°C, unless otherwise noted.) MAX5363/MAX5364/MAX5365 Low-Cost, Low-Power, 6-Bit DACs with 3-Wire Serial Interface in SOT23 VDD OUT CURRENT-STEERING DAC REF 63 CS MAX5363 MAX5364 MAX5365 DATA LATCH CONTROL LOGIC DIN 6 SCLK SERIAL INPUT REGISTER GND Figure 1. Functional Diagram combination of resistive loads >10kΩ and capacitive loads <50pF. Power-On Reset The MAX5363/MAX5364/MAX5365 have a power-on reset circuit to set the DAC’s output to 0 when VDD is first applied or when VDD dips below 1.7V (typ). This ensures that unwanted DAC output voltages will not occur immediately following a system startup, such as after a loss of power. The output glitch on startup is typically less than 50mV. VREF SW1 SW2 SW63 OUT Figure 2. Current-Steering DAC Topology Table 1. Unipolar Code Output Voltage Digital Section OUTPUT VOLTAGE DAC CODE [D11–D6] 111 111 8 Shutdown Mode The MAX5363/MAX5364/MAX5365 include three software-controlled shutdown modes that reduce the supply current to <1µA. All internal circuitry is disabled, and a known impedance is placed from OUT to GND to ensure 0V while in shutdown. Table 2 details the three shutdown modes of operation. 3-Wire Serial Interface MAX5363 MAX5364 MAX5365 2V × (63/64) 4V × (63/64) 0.9 × VDD × (63/64) 100 000 1V 2V 0.9 × VDD / 2 000 001 31mV 63mV 0.9 × VDD / 64 000 000 0 0 0 The MAX5363/MAX5364/MAX5365s’ digital interface is a standard 3-wire connection compatible with SPI/QSPI/MICROWIRE interfaces. The chip-select input (CS) frames the serial data loading at the data-input pin (DIN). Immediately following CS’s high-to-low transition, the data is shifted synchronously and latched into the input register on the rising edge of the serial clock input (SCLK). After 16 bits have been loaded into the serial _______________________________________________________________________________________ Low-Cost, Low-Power, 6-Bit DACs with 3-Wire Serial Interface in SOT23 Applications Information Device Powered by an External Reference Since the MAX5365 generates an output voltage proportional to VDD, a noisy power supply will affect the accuracy of the on-board reference, thereby affecting the overall accuracy of the DAC. The circuit in Figure 5 rejects this power-supply noise by powering the device directly with a precision voltage reference, improving overall system accuracy. The MAX6103 (+3V, 75ppm) or the MAX6105 (+5V, 75ppm) precision voltage references are ideal choices due to the low power requirements of the MAX5365. This solution is also useful when the required full-scale output voltage is different from the available supply voltages. Digital Inputs and Interface Logic The digital interface for the 6-bit DAC is based on a 3-wire standard that is compatible with SPI, QSPI, and MICROWIRE interfaces. The three digital inputs (CS, DIN, and SCLK) load the digital input serially into the DAC. All of the digital inputs include Schmitt-trigger buffers to accept slow-transition interfaces. This means that optocouplers can interface directly to the MAX5363/ MAX5364/MAX5365 without additional external logic. The digital inputs are compatible with CMOS logic levels and can be driven with voltages up to +5.5V regardless of the supply voltage. Power-Supply Bypassing and Layout Careful PC board layout is important for best system performance. To reduce crosstalk and noise injection, keep analog and digital signals separate. To ensure that the ground return from GND to the supply ground is short and low impedance, a ground plane is recommended. Bypass VDD with a 0.1µF to ground as close as possible to the device. If the supply is excessively noisy, connect a 10Ω resistor in series with the supply and VDD and add additional capacitance. Table 2. Shutdown Modes DAC CODE [D13 AND D12] MODE OUTPUT RESISTANCE TO GROUND (Ω) MAXIMUM SUPPLY CURRENT ( µA) 01 Shutdown 1k 1 10 Shutdown 100k 1 11 Shutdown 1M 1 Table 3. Serial Interface Mapping 16-BIT SERIAL WORD MSB ANALOG LSB OUTPUT FUNCTION XX00 0000 0000 XXXX 0V Normal operation XX00 1111 11XX XXXX VREF ✕ (63/64) Normal operation XX00 0000 01XX XXXX VREF ✕ (1/64) Normal operation XX00 1000 00XX XXXX VREF ✕ (32/64) Normal operation XX01 XXXX XXXX XXXX 0V Shutdown, 1kΩ to GND XX10 XXXX XXXX XXXX 0V Shutdown, 100kΩ to GND XX11 XXXX XXXX XXXX 0V Shutdown, 1MΩ to GND X = Don’t care _______________________________________________________________________________________ 9 MAX5363/MAX5364/MAX5365 input register, it transfers its contents to the DAC latch on CS’s low-to-high transition (Figure 3). Note that if CS is not kept low during the entire 16 SCLK cycles, data will be corrupted. In this case, reload the DAC latch with a new 16-bit word. The serial clock (SCLK) can idle either high or low between transitions. Figure 4 shows the complete 3-wire serial interface transmission. Table 3 lists serial interface mapping. MAX5363/MAX5364/MAX5365 Low-Cost, Low-Power, 6-Bit DACs with 3-Wire Serial Interface in SOT23 ;;;;;;;; ;;;;;;;;; ; ; ;; tCSH1 CS tCSHO tCSSO tCH SCLK tCSS1 tCL tDH tDS D15 DIN D14 D0 Figure 3. 3-Wire Serial Interface Timing Diagram CS DAC UPDATED SCLK DIN D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Figure 4. Complete 3-Wire Serial Interface Transmission Chip Information +3.2V TO +12V TRANSISTOR COUNT: 2160 IN MAX6103 OUT +3.00V 0.1µF GND VDD CS DIN SCLK MAX5365 OUT 0 TO +2.7V GND Figure 5. Powering the MAX5365 with a Precision Voltage Reference 10 ______________________________________________________________________________________ Low-Cost, Low-Power, 6-Bit DACs with 3-Wire Serial Interface in SOT23 6LSOT.EPS ______________________________________________________________________________________ 11 MAX5363/MAX5364/MAX5365 Package Information Low-Cost, Low-Power, 6-Bit DACs with 3-Wire Serial Interface in SOT23 MAX5363/MAX5364/MAX5365 NOTES Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.