NUP45V6P5 Series Product Preview Low Capacitance Quad Array for ESD Protection These integrated transient voltage suppressor devices (TVS) are designed for applications requiring transient overvoltage protection. They are intended to be used in sensitive equipment such as wireless headsets, PDAs, digital cameras, computers, printers, communication systems, medical equipment, and other applications. Their integrated design provides very effective and reliable protection for four separate lines using only one package. These devices are ideal for situations where board space is at a premium. http://onsemi.com 1 5 2 3 4 Features • ESD Protection: IEC61000−4−2: Level 4 • • • • • MILSTD 883C − Method 3015−6: Class 3 Four Separate Unidirectional Configurations for Protection Low Leakage Current < 1 mA @ 3 V Small SOT−953 SMT Package Low Capacitance These are Pb−Free Devices SOT−953 CASE 526AB MARKING DIAGRAM Benefits • • • • Provides Protection for ESD Industry Standards: IEC 61000, HBM Protects Four Lines Against Transient Voltage Conditions Minimize Power Consumption of the System Minimize PCB Board Space Typical Applications • • • • Cellular and Portable Electronics Serial and Parallel Ports Microprocessor Based Equipment Notebooks, Desktops, Servers xM 1 x M G or G = Specific Device Code = Date Code = Pb−Free Package ORDERING INFORMATION Package Shipping† NUP45V6P5T5G SOT−953 (Pb−Free) 8000 / Tape & Reel NUP46V8P5T5G SOT−953 (Pb−Free) 8000 / Tape & Reel NUP412VP5T5G SOT−953 (Pb−Free) 8000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. © Semiconductor Components Industries, LLC, 2006 October, 2006 − Rev. P5 1 Publication Order Number: NUP45V6P5/D NUP45V6P5 Series ELECTRICAL CHARACTERISTICS I (TA = 25°C unless otherwise noted) Symbol IF Parameter IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM IR VBR IT QVBR VC VBR VRWM Working Peak Reverse Voltage V IR VF IT Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current Maximum Temperature Coefficient of VBR IF Forward Current VF Forward Voltage @ IF ZZT Maximum Zener Impedance @ IZT IZK Reverse Current ZZK Maximum Zener Impedance @ IZK IPP Uni−Directional MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Characteristic Symbol Value Unit Peak Power Dissipation (8 X 20 ms @ TA = 25°C) (Note 1) NUP45V6P5 NUP46V8P5 NUP412VP5 PPK Thermal Resistance Junction−to−Ambient Above 25°C, Derate RqJA 560 4.5 °C/W mW/°C TJmax 150 °C TJ Tstg −55 to +150 °C TL 260 °C ESD 16000 400 15000 8000 V W 14 30 65 Maximum Junction Temperature Operating Junction and Storage Temperature Range Lead Solder Temperature (10 seconds duration) Human Body Model (HBM) Machine Model (MM) IEC61000−4−2 Air (ESD) IEC61000−4−2 Contact (ESD) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ELECTRICAL CHARACTERISTICS (TA = 25°C) Device Device Marking Typ Capacitance @ 0 V Bias (pF) (Note 2) Typ Capacitance @ 3 V Bias (pF) (Note 2) Breakdown Voltage VBR @ 1 mA (Volts) Leakage Current IRM @ VRM Min Nom Max VRWM IRWM (mA) Typ Max Typ Max NUP45V6P5 5 5.3 5.6 5.9 3.0 1.0 13 17 7.0 11.5 NUP46V8P5 6 6.47 6.8 7.14 4.3 1.0 12 15 6.7 9.5 NUP412VP5 2 11.4 12 12.7 9.0 0.5 6.5 10 3.5 5.0 1. Non−repetitive current per Figure 1. 2. Capacitance of one diode at f = 1 MHz, VR = 0 V, TA = 25°C http://onsemi.com 2 NUP45V6P5 Series TYPICAL ELECTRICAL CHARACTERISTICS 14 0.14 TYPICAL CAPACITANCE (pF) 1 MHz FREQUENCY IR, REVERSE LEAKAGE (mA) 0.16 0.12 0.10 0.08 0.06 0.04 0.02 0 −60 −40 −20 0 20 40 60 80 12 TA = 25°C 10 8 6 4 12 V 2 0 100 0 1 T, TEMPERATURE (°C) PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms 80 70 60 HALF VALUE IRSM/2 @ 20 ms 50 40 30 tP 20 6 0.1 0.01 10 0 5 1 IF, FORWARD CURRENT (A) % OF PEAK PULSE CURRENT 90 4 Figure 2. Capacitance PEAK VALUE IRSM @ 8 ms tr 3 BIAS VOLTAGE (V) Figure 1. Reverse Leakage versus Temperature 100 2 TA = 25°C 0.001 0 20 40 60 0.6 80 0.8 1.0 1.2 1.4 t, TIME (ms) VF, FORWARD VOLTAGE (V) Figure 3. 8 × 20 ms Pulse Waveform Figure 4. Forward Voltage http://onsemi.com 3 1.6 1.8 NUP45V6P5 Series PACKAGE DIMENSIONS SOT−953 CASE 527AB−01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. A L −Y− D −X− 5 4 HE E 1 2 3 e DIM A b C D E e L HE C b 5X 0.08 X Y MILLIMETERS MIN NOM MAX 0.44 0.48 0.50 0.10 0.15 0.20 0.05 0.10 0.15 0.95 1.00 1.05 0.75 0.80 0.85 0.35 BSC 0.05 0.10 0.15 0.95 1.00 1.05 INCHES MIN NOM MAX 0.017 0.019 0.020 0.0039 0.0059 0.0079 0.002 0.004 0.006 0.037 0.039 0.041 0.03 0.032 0.034 0.014 BSC 0.0019 0.0039 0.0059 0.037 0.039 0.041 SOLDERING FOOTPRINT* 0.35 0.014 0.35 0.014 0.90 0.0354 0.20 0.08 0.20 0.08 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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