TB2110FN TOSHIBA Bi−CMOS Integrated Circuit Silicon Monolithic TB2110FN PLL For DTS The TB2110FN is a high−speed PLL LSI built in a 2 modulus prescaler that can operate with a 1.5V power supply. Each function is controlled via three serial bus lines, allowing you to configure a high−performance digital tuning system. Features · Due to a Bi−CMOS structure, the 1.5V power supply is stepped up and stabilized by a bipolar circuit to drive the CMOS section. Therefore, this chip is best suited for digital tuning system in headphone stereos. · Built in a prescaler, this IC can operate with TV: 50~250MHz and FM: 40~150MHz (2 modulus type) for the FMIN input or at 0.5~40MHz for the AMIN input (2 modulus type or directly divided). · Comes with a 20 bit programmable counter, two parallel output phase comparators, crystal oscillator, reference counter, and a DC / DC converter control circuit. · The crystal oscillator (X’tal) used in this IC is a 75kHz resonator. · The reference frequency can be selected from seven frequencies available. (ref = 1.0~25kHz) · A 20 bit general−purpose counter is built in that can measure the IF and other frequencies. · All device operations are controlled via three serial bus lines. · Operating voltage range: VCC = 1.0~2.5V (Ta = −20~75°C) · Package is SSOP24pin. 1 Weight: 0.31g (typ.) 2002-10-30 TB2110FN Pin Connection (Note) This device is vulnerable to surge voltages. Take it into account when using this device in your system. 2 2002-10-30 TB2110FN Block Diagram 3 2002-10-30 TB2110FN Pin Function Pin No. Symbol Pin Name Function Remarks Connect a 75kHz crystal oscillator for the reference frequency to these pins. 1 2 XI XO Crystal oscillator pins 3 Data Serial data input / output 4 Clock Clock signal input 5 Period Period signal input 6 7 8 9 Out-1 Out-2 Out-3 Out-4 General-purpose output port This is an open-collector output port. Use this port to output control signals. 10 In port General-purpose input port This port accepts the data to be fed to the output bit (out-5). 11 VCONT DC / DC converter control pin This pin controls the DC / DC converter. 12 VDD CMOS section power supply The VDD power supply from the DC / DC converter is applied to this pin. Serial I / O port. Use this pin to set the divide ratio and divide method, as well as transfer data to and from the controller to control the general-purpose counter and general-purpose I / O port. 13 Stand-by Standby The device is placed in standby mode when a “L” is input. The device is in active state when a “H” is input. 14 IF-FM General-purpose counter input Use this pin for IF signal input on the FM side. 15 VREF2 Reference pin Use this pin as the reference of the IF signal. 16 IF-AM General-purpose counter input Use this pin for IF signal input on the AM side. 17 A-GND Bipolar section GND — 4 — — 2002-10-30 TB2110FN Pin No. Symbol Pin Name Function 18 AM-in AM / SW signal input pin Use this pin for AM / SW signal input. 19 VREF1 Reference pin Use this pin as the reference of the AM / FM signal. 20 FM-in FM / TV signal input pin Use this pin for FM / TV signal input. 21 VCC Bipolar section power supply 22 23 DO1 DO2 Phase comparator output 24 D-GND MOS section GND — Remarks — This is a tri-state output of the phase comparator. DO1~DO2 are parallel outputs. — 5 — 2002-10-30 TB2110FN Operation ○ Serial I / O port The TB2110FN has two pairs of 24 bit registers, so it can set data to a total of 48 bits to control each function. Each data in these registers are transferred to and from the controller through a serial port using three pins: Data, clock, and period. A total of 32 bits consisting of 8 bit address and 24 data bits can be handled in one serial transfer. Because all operations are controlled via register, this section describes mainly the function of 8 bit address and each register. The registers are configured in units of 24 bits, and are selected by an 8 bit address. The address mapping of each register is listed in the next page as “register allocation.” Register Input register 1 Address D0H Input register 2 D2H Output register 1 D1H Output register 2 D3H Contents Of 24 Bits No. Of Bits PLL dividend number setting Reference frequency setting PLL input and mode setting Not used 16 3 2 3 Total 24 General-purpose counter control Test bit Output data Not used 7 1 4 12 Total 24 General-purpose counter numeric data Not used 22 2 Total 24 Data in register D2 Lock detection data Input data Not used 8 2 1 13 Total 24 The input data is latched into register 1 or register 2 at the falling edge of period to put each function to work. The output data that comes in parallel is latched into the output register at the 9 th falling edge of clock, and is serially output from the data pin. (Note) Transmit dummy data at least once before transferring regular data to initialize the device’s internal circuits after power-on. 6 2002-10-30 TB2110FN 7 2002-10-30 TB2110FN ○ Serial transfer format · The serial transfer format consists of 8 bit address and 24 bit data as shown above. The addresses used here are D0H to D3H. ○ Crystal oscillator connecting pins (XI, XO) Connect a crystal oscillator and capacitors to these pins as shown in Figure 1 to generate the clock required for the device’s internal operation. Use a 75kHz crystal oscillator here. (Note) Choose a crystal oscillator that has a small CI value and good startup characteristics. Figure 1 8 2002-10-30 TB2110FN ○ Programmable counter The programmable counter section consists of 1 / 4 + 1 / 2 prescalers, 2 modulus prescaler, and 4bit + 12bit programmable binary counters. 1. Setting the programmable counter section The programmable counter need to be set for the divisor (16 bits) and the dividing mode (2 bits). (1) Setting the dividing mode Use the FM and mode bit to choose the input setting and the dividing mode (pulse swallow mode or direct dividing mode). Four mode are available as listed below. Choose the desired one according to the frequency bands used. Typical Receiving Band Input Frequency Range Direct dividing mode LW, MW 0.5~10MHz 1 Pulse swallow mode SW 3~40MHz 1 0 1 / 4 + pulse swallow mode FM 40~150MHz 1 1 1 / 8 + pulse swallow mode TV 50~250MHz Mode FM Mode AM 0 0 SW 0 FM TV Dividing Mode Input Pin AMIN FMIN Divisor n n 4･n 8･n (Note) ‘n’ denotes the set value. (2) Setting the divisor To determine the programmable counter’s divisor, set binary data to the P0~P15 bits. · For the pulse swallow mode (16 bits, SW, FM, and TV band) Range of divisor set (pulse swallow mode) n = 210H~FFFFH (528~65535) (Note) The actual divisor is 4 times the programmed number for the 1 / 4 + pulse swallow mode, and 8 times the programmed number for the 1 / 8 + pulse swallow mode. · Direct divide method (12 bits) Range of divisor set (direct divide mode) n = 10H~FFFH (16~4095) (Note) In the direct divide method, the data in P0~P3 becomes irrelevant and the P4 port becomes the LSB. 9 2002-10-30 TB2110FN 2. Circuit configuration of prescaler and programmable counter (1) Circuit configuration in the pulse swallow mode The circuit is configured with a 2 modulus prescaler, swallow counter (4 bits), and a programmable counter (12 bits). In FM and TV modes, a 1 / 4 and a 1 / 8 prescaler are added in the front stage. (2) Circuit configuration in the direct divide method In the direct divide method, the prescaler section is passed through and the circuit consists of only a programmable counter (12 bits). (3) The FM-IN and AM-IN inputs each have a built-in amp, and are therefore capable of capacitor-coupled, small-amplitude operation. ○ Reference counter (divider to generate the reference frequency) The reference counter section is configured with a crystal oscillator and a counter. Using a 75kHz crystal oscillator, this circuit can generate seven types of reference frequencies. 1. Setting the reference frequency Use the R0~R2 bits to set the reference frequency. R2 R1 R0 Reference Frequency 0 0 0 1kHz 0 0 1 3kHz 0 1 0 3.125kHz 0 1 1 5kHz 1 0 0 6.25kHz 1 0 1 12.5kHz 1 1 0 25kHz 1 1 1 Standby mode · 10 When REF code = 7 H (R0~R2 = 1), the device is placed in standby mode. 2002-10-30 TB2110FN ○ Phase comparator The phase comparator compares the phase difference between the reference frequency signal fed from the reference frequency divider and the divided output from the programmable counter, and outputs the difference. In this way it controls the VCO through a low-pass filter to ensure that the frequencies and the phases of these two signals are matched to each other. Because this phase comparator has two tri-state buffers DO1 and DO2 connected in parallel as its outputs, you can design the optimum filter constant for each of the FM and AM bands. Furthermore, you can use the DOHZ bit of register D2 to place the DO2 output in a high-impedance state as necessary. Shown above is a DO output timing chart and a typical active low-pass filter circuit based on a darlington connection of FET and bipolar transistors. The filter circuit shown above is just one example. When designing the actual circuit, consider the band configuration and the desired characteristics of your system. 11 2002-10-30 TB2110FN ○ Unlock detection bit This bit is used to detect an unlock condition of the PLL circuit. When not locked (i.e., the reference frequency and the programmable counter’s divided output are not locked in phase), the phase comparator outputs a pulse to the unlock F / F synchronously with the period of the reference frequency. The unlock F / F is set by this pulse. The unlock F / F is reset each time the reset bit of register 2 (unlock reset bit) is set to 1. After the unlock F / F is reset in this way, you can access the unlock detection bit to see if the PLL circuit is in lock condition. Because the pulse is input synchronously with the period of the reference frequency, you must wait for a duration greater than the period of the reference frequency after resetting the unlock F / F before you can access the unlock detection bit (unlock). If this duration is short, you cannot detect the correct lock condition. To solve this problem, the device has a lock enable F / F. This F / F is reset each time the unlock reset bit is set to 1, and lock enable bit is set to 1 with the unlock detection timing. This means that you can detect the correct unlock condition when the lock enable bit (enable) is 1. Enable Unlock State 0 * — 0 Lock 1 Unlock 1 12 2002-10-30 TB2110FN ○ General-purpose counter The general-purpose counter is used to count frequencies such as the FM / AM band IF frequency to detect the auto stop signal during auto search tuning. For this frequency counting, the general-purpose counter uses a frequency measurement (IF-AM, IF-FM input) method to count the number of pulses input to the counter during a certain duration of time (gate time). 1. General-purpose counter control bits (1) G0, G1 bits…These bits choose the general-purpose counter’s gate time. G0 G1 Gate Time 0 0 1 ms 1 0 4 ms 0 1 16 ms 1 1 64 ms (2) Start bit…Each time the start bit is set to 1, measurement is restarted after resetting the general-purpose counter. (3) M8, M9 bits…These bits choose the general-purpose counter’s measurement mode and input pin. M8 M9 Pin Selection Input Frequency Range 0 1 IF-AM 0.3~1.0MHz 1 0 IF-FM 8~16MHz Remarks Direct input to IF counter IF frequency divided by 2 input to IF counter (Note) In the IF-FM mode, the general-purpose counter (20 bit binary counter) is preceded by an additionally inserted 1 / 2 prescaler. Therefore, the input signal from IF-FM is divided by 2 before being fed into the general-purpose counter. 2. General-purpose counter data output bits (f0~f19) (1) General-purpose counter count data bits (f0~f19) The resulting count of the general-purpose counter can be read in binary from the output registers f0 through f19. (2) General-purpose counter operation detect bits “1” General-purpose counter is in overflow condition. Over…General-purpose counter “0” General-purpose counter data is valid. overflow bit Busy…General-purpose counter operation monitor “1” “0” General-purpose counter is counting. General-purpose counter has finished counting. (Note) When using the general-purpose counter, check to see that the busy bit is 0 (finished counting) and that the over bit is 0 (valid data) before you reference the contents of the general-purpose counter data bits (f0~f19). 13 2002-10-30 TB2110FN 3. Circuit configuration of general-purpose counter The general-purpose counter section is configured with an input amp., a gate time control circuit, and a 20 bit binary counter. 4. Measurement timing of general-purpose counter (Note) IF-FM and IF-AM are capable of C-coupled, small-amplitude operation using a bipolar input. ○ General-purpose input / output ports The device has general-purpose input / output ports controlled by serial port. 1. General-purpose output ports (OT-1~OT-4) The data set to theO1~O4 bits of input register 2 are output in parallel from their dedicated output ports OT-1~OT-4. 2. General-purpose input port (IN) The data input from the IN pin can be read out from the data pin as out-5 of the output register. (Note) The output ports are set to “0” when the device is powered on. (Therefore, the general-purpose output ports are held low at power-on.) (Note) The TS bit of input register 2 must always be set to “0”. 14 2002-10-30 TB2110FN ○ DC / DC converter The TB2110FN uses a coil-type DC / DC converter (boosted voltage circuit) to allow for low-voltage operation. Coil: (SUMIDA ELECTRIC CO., LTD, CP-4LB) Test Frequency L (µH) 1-3 CO (pF) QO 2.52MHz 15.6±3% — — Bottom View Turns 1-2 2-3 6-4 18T 14T 2T 15 Wire (mmf) 0.08UEW 2002-10-30 TB2110FN Maximum Ratings (Ta = 25°C) Characteristic Symbol Rating Unit Supply voltage VDD -0.3~4.5 V Input voltage VIN -0.3~ VDD+0.3 V Power dissipation PD 400 mW Operating temperature Topr -20~75 °C Storage temperature Tstg -65~150 °C Electrical Characteristics (unless otherwise specified, Ta = -20~75°C, VCC = 1.0~2.5V, VDD = 2.4V) Characteristic Test Circuit Min. Typ. Max. PLL operation (normal operating) 1.2 1.5 2.5 Step-up control circuit operating 2.2 2.4 3.6 — PLL operation (normal operating), TV mode — 18 40 IDD — PLL operation (normal operating), TV mode — 1.5 7 ICS — VCC = 1.5V — 30 50 µA fXT — Crystal oscillator connected to XI and XO pins. — 75 — kHz TV in fTV — TV mode 50 ~ 250 MHz FM in fFM — FM mode 40 ~ 150 MHz SW in fSW — SW mode 3 ~ 40 MHz AM in fAM — AM mode 0.5 ~ 10 MHz IF-FM fIF-FM — IF-FM 8 ~ 16 MHz IF-AM fIF-AM — IF-AM 0.3 ~ 1.0 MHz TV in VTVin — TV mode FM in VFMin — FM mode SW in VSWin — SW mode AM in VAMin — AM mode 25 ~ 300 mVrms IF-FM VIF-FM — IF-FM IF-AM VIF-AM — IF-AM Operating power supply voltage Symbol Biplor unit VCC MOS unit VDD Operating power supply current ICC — Test Condition Unit V mA (Stand-by mode) Operating power supply current (Operating frequency) Crystal oscillation frequency (Input voltage) 16 2002-10-30 TB2110FN (OT-1~OT-4 open-collector output current) Symbol Test Circuit IOL1 — “H” level VIH — “L” level VIL — “H” level IIH — “L” level IIL “H” level Characteristic Min. Typ. Max. Unit 1.0 3.0 — mA — 1.7 ~ VDD — 0.0 ~ 0.5 VIH = 2.4V — — ±0.5 — VIL = 0.0V — — ±1.0 IOH2 — VOH = 2.0V, only data pin -0.2 -1.0 — “L” level IOL2 — VOL = 0.4V, only data pin 0.2 1.0 — “H” level IOH3 — VOH = 2.0V -0.2 -1.0 — “L” level IOL3 — VOL = 0.4V 0.2 1.0 — ITL — VTLH = 2.4V, VTLL = 0.0V — — ±0.1 VCL1 — Clear release voltage — — 1.9 VCL2 — Clear voltage 1.4 — — ICONT — Boosting voltage transistor drive current VCONT = 0.8V 100 150 — µA Standby release VSTOFF — Standby mode released 0.7 ~ VCC V Standby mode VSTON — Placed in standby mode 0.0 ~ 0.6 V Output current “L” level Test Condition VOL = 0.2V (Data, clock, period, I / O) Input voltage Input current Output current V µA µA (DO1, DO2) Input voltage Tri-state leak current Auto clear voltage VCONT output current 17 mA µA V 2002-10-30 TB2110FN Package Dimensions Weight: 0.31g (typ.) 18 2002-10-30 TB2110FN RESTRICTIONS ON PRODUCT USE 000707EBA · TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc.. · The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. 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