ONSEMI NCV8675DS33G

NCV8675
350 mA Very Low Iq Low
Dropout Linear Regulator
with Reset and Reset Delay
The NCV8675 is a precision 5.0 V and 3.3 V fixed output, low
dropout integrated voltage regulator with an output current capability
of 350 mA. Careful management of light load current consumption,
combined with a low leakage process, achieve a typical quiescent
ground current of 34 mA.
NCV8675 is pin for pin compatible with NCV4275 and it could
replace this part when very low quiescent current is required.
The output voltage is accurate within ±2.0%, and maximum dropout
voltage is 600 mV at full rated load current.
It is internally protected against input transients, input supply
reversal, output overcurrent faults, and excess die temperature. No
external components are required to enable these features.
Features
•5 V and 3.3 V Fixed Output (2.5 V Version Available Upon Request)
•±2.0% Output Accuracy, Over Full Temperature Range
•34 mA Typical Quiescent Current at IOUT = 100 mA, 50 mA
Maximum up to 85°C
•600 mV Maximum Dropout Voltage at 350 mA Load Current
•Wide Input Voltage Operating Range of 5.5 V to 45 V
•Internal Fault Protection
♦-42 V Reverse Voltage
♦Short Circuit/Overcurrent
♦Thermal Overload
•AEC-Q100 Qualified
•EMC Compliant
•NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
•These are Pb-Free Devices
IN
OUT
Bandgap
Reference
Error
Amplifier
+
-
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MARKING
DIAGRAM
NC
V8675-xx
AWLYWWG
1
5
D2PAK 5
DS SUFFIX
CASE 936A
1
Pin 1. I
2. RO
Tab, 3. GND*
4. D
5. Q
* Tab is connected to
Pin 3 on all packages
xx
A
WL
Y
WW
G
= 50 (5.0 V Version)
= 33 (3.3 V Version)
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
Current Limit and
Saturation Sense
Thermal
Shutdown
Reset
Generator
D
GND
RO
Figure 1. Block Diagram
© Semiconductor Components Industries, LLC, 2007
December, 2007 - Rev. 3
1
Publication Order Number:
NCV8675/D
NCV8675
PIN DESCRIPTIONS
Symbol
Function
VIN
Unregulated Input Voltage; 4.5 V to 45 V; Battery Input Voltage. Bypass to GND with a Ceramic Capacitor.
RO
Reset Output; Open Collector Active Reset (Accurate when VIN > 1.0 V)
GND
D
VOUT
Ground; Pin 3 Internally Connected to Tab
Reset Delay; Timing Capacitor to GND for Reset Delay Function
Output; ±2.0%, 350 mA. 22 mF, ESR < 9 W
MAXIMUM RATINGS
Pin Symbol, Parameter
Symbol
Min
Max
Unit
VIN
-42
45
V
Output Voltage
VOUT
-0.3
16
V
Reset Output Voltage
VRO
-0.3
25
V
Reset Output Current
IRO
-5.0
5.0
mA
Reset Delay Voltage
VD
-0.3
7.0
V
Reset Delay Current
ID
-2.0
2.0
mA
Storage Temperature
TStg
-55
+150
°C
-
4
200
TStg
-55
Input Voltage
ESD Capability
-Human Body Model
-Machine Model
Storage Temperature
kV
V
+150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
OPERATING RANGE
Pin Symbol, Parameter
Symbol
Min
Max
Unit
Input Voltage Operating Range
VIN
4.5
45
V
Junction Temperature
TJ
-40
150
°C
THERMAL RESISTANCE
Parameter
Symbol
Min
Max
Junction Ambient
D2PAK
Rthja
85.4
Junction Case
D2PAK
Rthjc
6.8
Unit
°C/W
1. 1 oz., 100 mm2 copper area.
Pb SOLDERING TEMPERATURE AND MSL
Parameter
Symbol
Lead Temperature Soldering
Reflow (SMD styles only), Pb-Free (Note 2)
Tsld
Moisture Sensitivity Level
MSL
Min
Max
Unit
°C
265 pk
2. Pb-Free, 60 sec – 150 sec above 217°C, 40 sec maximum at peak.
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1
-
NCV8675
ELECTRICAL CHARACTERISTICS VIN = 13.5 V, TJ = -40°C to +150°C, unless otherwise specified
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Output Voltage
5.0 V Version
VOUT
0.1 mA v IOUT v 350 mA (Note 3)
6.0 V v VIN v 16 V
4.900
5.000
5.100
V
Output Voltage
3.3 V Version
VOUT
0.1 mA v IOUT v 350 mA (Note 3)
4.5 V v VIN v 16 V
3.234
3.300
3.366
V
Output Voltage
5.0 V Version
VOUT
0.1 mA v IOUT v 200 mA (Note 3)
6.0 V v VIN v 40 V
4.900
5.000
5.100
V
Output Voltage
3.3 V Version
VOUT
0.1 mA v IOUT v 200 mA (Note 3)
4.5 V v VIN v 40 V
3.234
3.300
3.366
V
Line Regulation
DVOUT
Versus VIN
IOUT = 5 mA
6.0 V v VIN v 28 V
-25
5
+25
mV
Load Regulation
DVOUT
Versus. IOUT
1.0 mA v IOUT v 350 mA (Note 3)
-40
5
+40
mV
Dropout Voltage
5.0 V Version
VIN - VOUT
IOUT = 200 mA (Notes 3 and 4)
IOUT = 350 mA (Notes 3 and 4)
-
215
310
500
600
mV
Dropout Voltage
3.3 V Version
VIN - VOUT
IOUT = 200 mA (Notes 3 and 6)
IOUT = 350 mA (Notes 3 and 6)
-
-
1.266
1.266
V
Iq
IOUT v 100 mA
TJ = 25°C
TJ = -40°C to +85°C
TJ = 125°C
34
34
54
45
50
60
3.5
40
OUTPUT
Quiescent Current
mA
Active ground Current
IG (ON)
IOUT = 50 mA (Note 3)
IOUT = 350 mA (Note 3)
1.8
20
Power Supply Rejection
PSRR
VRIPPLE = 0.5 VPP, F = 100 Hz
70
Output Capacitor for Stability
5.0 V Version
3.3 V Version
%/V
IOUT = 0.1 mA to 350 mA
COUT
ESR
COUT
ESR
mA
22
9
22
7
mF
W
mF
W
RESET TIMING D AND OUTPUT RO
Reset Switching Threshold
VOUT, rt
5.0 V Version
3.3 V Version
4.50
2.97
4.65
3.069
4.80
3.168
V
Reset Output Low Voltage
VROL
RExt > 5.0k, VOUT > 1.0V
-
0.20
0.40
V
Reset Output Leakage Current
IROH
VROH = 5.0 V
VROH = 3.3 V
-
0
0
10
10
mA
Reset Charging Current
ID,C
VD = 1.0 V
2.0
4.0
6.5
mA
Upper Timing Threshold
VDU
-
1.2
1.3
1.4
V
Lower Timing Threshold
VLU
trd
CD = 47 nF
10
10
16
16
22
24
ms
trr
CD = 47 nF
1.5
4.0
ms
Current Limit
IOUT(LIM)
VOUT = 4.5 V (5.0 V Version)
VOUT = 3.0 V (3.3 V Version)
350
350
Short Circuit Current Limit
IOUT(SC)
VOUT = 0 V (Note 3)
100
TTSD
(Note 5)
150
Reset Delay Time
5.0 V Version
3.3 V Version
Reset Reaction Time
1.24
V
PROTECTION
Thermal Shutdown Threshold
mA
600
mA
200
°C
3. Use pulse loading to limit power dissipation.
4. Dropout voltage = (VIN – VOUT), measured when the output voltage has dropped 100 mV relative to the nominal value obtained with
VIN = 13.5 V.
5. Not tested in production. Limits are guaranteed by design.
6. VDO = VIN - VOUT. For output voltage set to < 4.5 V, VDO will be constrained by the minimum input voltage.
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NCV8675
TYPICAL CHARACTERISTIC CURVES - 5 V Version
6
12
Unstable Region
5
OUTPUT VOLTAGE (V)
10
ESR (W)
8
6
4
2
0
100
200
2
Vin = 13.5 V
Load = 5 mA
0
0
300
10
20
30
40
50
OUTPUT LOAD (mA)
INPUT VOLTAGE (V)
Figure 2. NCV8675 Stability Curve
(5 V Version)
Figure 3. NCV8675 Input Voltage vs. Output
Voltage (Full Range) (5 V Version)
6
0.6
5
0.5
DROPOUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
0
3
1
Vin = 13.5 V
CLOAD w 22 mF
Stable Region
4
4
3
2
1
Vin = 13.5 V
Load = 5 mA
0
125°C
0.4
25°C
0.3
-40°C
0.2
0.1
0
0
2
4
6
8
10
0
100
200
300
400
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
Figure 4. NCV8675 Input Voltage vs. Output
Voltage (Low Voltage) (5 V Version)
Figure 5. NCV8675 Dropout Voltage vs. Load
Current (5 V Version)
0.5
25
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)
0.45
20
25°C
125°C
15
-40°C
10
5
Vin = 13.5 V
0
25°C
0.4
125°C
0.35
-40°C
0.3
0.25
0.2
0.15
0.1
Vin = 13.5 V
0.05
0
0
100
200
300
400
0
5
10
15
20
25
LOAD CURRENT (mA)
LOAD CURRENT (mA)
Figure 6. NCV8675 Quiescent Current vs. Load
Current (Full Range) (5 V Version)
Figure 7. NCV8675 Quiescent Current vs. Load
Current (Light Load) (5 V Version)
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NCV8675
TYPICAL CHARACTERISTIC CURVES - 5 V Version
0.07
Load = 50 mA
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)
6
5
4
3
2
1
10
20
30
40
0.05
0.04
0.03
0.02
50
Vin = 13.5 V
Load = 100 mA
0.01
0
-50
0
0
0.06
0
50
100
150
INPUT VOLTAGE (V)
TEMPERATURE (°C)
Figure 8. NCV8675 Quiescent Current vs.
Input Voltage (5 V Version)
Figure 9. NCV8675 Quiescent Current vs.
Temperature (5 V Version)
6
4
3
2
1
Vin =6.0 V
0
0
100
200
300
400
500
OUTPUT LOAD (mA)
Figure 10. NCV8675 Output Voltage vs. Output
Load (5 V Version)
Figure 11. Reset vs. Output Voltage
(Vin Rising) (5 V Version)
80
70
60
MAG (dB)
OUTPUT VOLTAGE (V)
5
50
40
30
20 Iout = 100 mA
Vin = 13.5 V
10 TA = 25°C
Cout = 22 mF
0
10
100
Figure 12. Reset vs. Output Voltage
(Vin Falling) (5 V Version)
1000
FREQUENCY (Hz)
10k
Figure 13. Power Supply Rejection Ratio
(5 V Version)
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5
100k
NCV8675
80
70
70
60
60
50
50
MAG (dB)
80
40
30
Iout = 200 mA
Vin = 13.5 V
TA = 25°C
Cout = 22 mF
20
10
OUTPUT VOLTAGE (V)
0
10
40
30
10
100
1000
10k
0
10
100k
100
1000
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 14. Power Supply Rejection Ratio
(5 V Version)
Figure 15. Power Supply Rejection Ratio
(5 V Version)
5.10
5.10
5.08
5.08
5.06
5.06
5.04
Iout = 100 mA
5.02
5.00
4.98
4.96
Iout = 200 mA
4.94
Iout = 350 mA
4.92
4.90
-50
Iout = 350 mA
Vin = 13.5 V
TA = 25°C
Cout = 22 mF
20
OUTPUT VOLTAGE (V)
MAG (dB)
TYPICAL CHARACTERISTIC CURVES - 5 V Version
100k
5.04
5.02
5.00
25°C
4.98
125°C
4.96
-40°C
4.94
4.92
Vin = 13.5 V
-25
0
25
50
75
100
125
Vin = 6.0 V
4.90
150
0
50
100 150 200 250 300 350 400 450 500
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
Figure 16. NCV8675 Output Voltage vs.
Temperature (5 V Version)
Figure 17. NCV8675 Output Voltage vs. Output
Load (5 V Version)
18
5.10
17.5
5.06
5.04
DELAY TIME (ms)
RESET VOLTAGE (V)
5.08
5.02
5.00
4.98
4.96
4.94
4.90
-50
-25
0
25
50
75
100
TEMPERATURE (°C)
125
16.5
16
15.5
Iout = 100 mA
Vin = 13.5 V
4.92
17
15
-50
150
Figure 18. NCV8675 Reset Voltage vs.
Temperature (5 V Version)
Iout = 100 mA
Vin = 13.5 V
Cdelay = 47 nF
0
50
100
TEMPERATURE (°C)
Figure 19. NCV8675 Reset Delay Time vs.
Temperature (5 V Version)
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6
150
NCV8675
TYPICAL CHARACTERISTIC CURVES - 5 V Version
4.7
860
840
4.66
CURRENT LIMIT (mA)
RESET THRESHOLD (V)
4.68
4.64
4.62
4.6
4.58
4.56
4.54
4.52
-50
Iout = 100 mA
Vin = 13.5 V
Rdelay = 5.0 kW
0
820
800
780
760
740
720
700
680
660
640
620
50
100
150
Vin = 13.5 V
-50
-25
0
25
50
75
100
125
150
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 20. NCV8675 Reset Threshold vs.
Temperature (5 V Version)
Figure 21. NCV8675 Current Limit Threshold
vs. Temperature (5 V Version)
Output Voltage
Cout = 22 mF
Vin = 13.5 V
Output Load
Figure 22. NCV8675 100 mA - 350 mA Load
Transient (5 V Version)
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NCV8675
TYPICAL CHARACTERISTIC CURVES - 3.3 V Version
10
3.5
9.0
Unstable Region
3.0
OUTPUT VOLTAGE (V)
8.0
ESR (W)
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
2.0
1.5
1.0
0.5
Cout = 22 mF
Stable Region
2.5
Load = 5 mA
0
0
50
100
150
200
250
300
350
0
15
30
45
OUTPUT CURRENT (mA)
INPUT VOLTAGE (V)
Figure 23. ESR Stability vs. Output Current
(3.3 V Version)
Figure 24. Input Voltage vs. Output Voltage
(3.3 V Version)
60
Vin
50
40
30
Vout
20
Vin = 13.5 V
Load = 100 mA
10
0
-50
0
50
100
Reset
150
TEMPERATURE (°C)
Figure 26. Reset vs. Output Voltage
(Vin Rising) (3.3 V Version)
Figure 25. Quiescent Current vs. Temperature
(3.3 V Version)
100
90
Vin
80
70
MAG (dB)
QUIESCENT CURRENT (mA)
70
Vout
60
50
40
Iout = 100 mA
Vin = 13.5 V
Tamb = 25°C
Cout = 22 mF
30
Reset
20
10
0
10
Figure 27. Reset vs. Output Voltage
(Vin Falling) (3.3 V Version)
100
1k
10 k
Figure 28. Power Supply Rejection Ratio
(3.3 V Version)
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100 k
NCV8675
100
100
90
90
80
80
70
70
MAG (dB)
MAG (dB)
TYPICAL CHARACTERISTIC CURVES - 3.3 V Version
60
50
40
20
10
0
10
40
Iout = 350 mA
Vin = 13.5 V
Tamb = 25°C
Cout = 22 mF
30
Iout = 250 mA
Vin = 13.5 V
Tamb = 25°C
Cout = 22 mF
30
60
50
20
10
0
100
1k
10 k
10
100 k
3.38
3.38
3.36
3.36
OUTPUT VOLTAGE (V)
3.40
3.34
25°C
125°C
3.28
-40°C
3.26
3.24
3.22
0
100
200
300
400
10 k
100 k
3.34
3.32
3.30
3.28
3.26
3.24
Vin = 13.5 V
Load = 5 mA
3.22
Vin = 13.5 V
3.20
-50
3.20
500
0
50
100
OUTPUT LOAD (mA)
TEMPERATURE (°C)
Figure 31. Output Voltage vs. Output Load
(3.3 V Version)
Figure 32. Output Voltage vs. Temperature
(3.3 V Version)
25
20
DELAY TIME (ms)
OUTPUT VOLTAGE (V)
3.40
3.30
1k
Figure 30. Power Supply Rejection Ratio
(3.3 V Version)
Figure 29. Power Supply Rejection Ratio
(3.3 V Version)
3.32
100
15
10
Vin = 13.5 V
Load = 100 mA
5
0
-50
0
50
100
150
TEMPERATURE (°C)
Figure 33. Reset Delay Time vs. Temperature
(3.3 V Version)
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150
NCV8675
VIN
IN
CIN
IOUT
OUT
VOUT
COUT
100 nF
22 mF
NCV8675
ID
CD
5
1
D
2
4
RO
VRO
IRO
3
47 nF
REXT
5.0 K
GND
IG
Figure 34. Application Circuits
Circuit Description
Figure 2 for specific ESR ratings. The aluminum
electrolytic capacitor is the least expensive solution, but, if
the circuit operates at low temperatures (-25°C to -40°C),
both the capacitance and ESR of the capacitor will vary
considerably. The capacitor manufacturer's data sheet
usually provides this information. The value for the output
capacitor COUT shown in Figure 13, Test Circuit, should
work for most applications; however, it is not necessarily the
optimized solution.
The NCV8675 is an integrated low dropout regulator that
provides 5.0 V 350 mA, or 3.3 V 350 mA protected output
and a signal for power on reset. The regulation is provided
by a PNP pass transistor controlled by an error amplifier
with a bandgap reference, which gives it the lowest possible
drop out voltage and best possible temperature stability. The
output current capability is 350 mA, and the base drive
quiescent current is controlled to prevent over saturation
when the input voltage is low or when the output is
overloaded. The regulator is protected by both current limit
and thermal shutdown. Thermal shutdown occurs above
150°C to protect the IC during overloads and extreme
ambient temperatures. The delay time for the reset output is
adjustable by selection of the timing capacitor. See
Figure 34, Test Circuit, for circuit element nomenclature
illustration.
Reset Output
The reset output is used as the power on indicator to the
microcontroller. This signal indicates when the output
voltage is suitable for reliable operation of the controller. It
pulls low when the output is not considered to be ready. RO
is pulled up to VOUT by an external resistor, typically 5.0 kW
in value. The input and output conditions that control the
Reset Output and the relative timing are illustrated in
Figure 35, Reset Timing. Output voltage regulation must be
maintained for the delay time before the reset output signals
a valid condition. The delay for the reset output is defined as
the amount of time it takes the timing capacitor on the delay
pin to charge from a residual voltage of 0 V to the upper
timing threshold voltage VDU of 1.3 V. The charging current
for this is ID of 4 mA. By using typical IC parameters with
a 47 nF capacitor on the D Pin, the following time delay is
derived:
Regulator
The error amplifier compares the reference voltage to a
sample of the output voltage (VOUT) and drives the base of
a PNP series pass transistor by a buffer. The reference is a
bandgap design to give it a temperature-stable output.
Saturation control of the PNP is a function of the load current
and input voltage. Oversaturation of the output power
device is prevented, and quiescent current in the ground pin
is minimized.
t RD + C D * V DUńI D
Regulator Stability Considerations
The input capacitor (CIN) is necessary to stabilize the
input impedance to avoid voltage line influences. The output
capacitor helps determine three main characteristics of a
linear regulator: startup delay, load transient response and
loop stability. The capacitor value and type should be based
on cost, availability, size and temperature constraints.
Ceramic, tantalum, or electrolytic capacitors of 22 mF, or
greater, are stable with very low ESR values. Refer to
t RD + 47nF * (1.3V)ń4mA + 15.3ms
Other time delays can be obtained by changing the CD
capacitor value. The Delay Time can be reduced by
decreasing the capacitance of CD. Using the formula above,
Delay can be reduced as desired. Leaving the Delay Pin
open is not desirable as it can result in unwanted signals
being coupled onto the pin.
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NCV8675
VI
t
< Reset Reaction Time
VOUT
VOUT,rt
t
ResetChargeCurrent
dVD
+
dt
CD
VD
Upper Timing Threshold VDU
Lower Timing Threshold VDL
t
Reset
Delay Time
VRO
Reset
Reaction
Time
t
Power-on-Reset
Thermal
Shutdown
Voltage Dip
at Input
Undervoltage
Secondary
Spike
Figure 35. Reset Timing
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Overload
at Output
NCV8675
Calculating Power Dissipation
in a Single Output Linear Regulator
Heatsinks
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of RqJA:
The maximum power dissipation for a single output
regulator (Figure 36) is:
PD(max) + [VI(max) * VOUT(min)]IOUT(max)
(1)
) VI(max)Iq
where
is the maximum input voltage,
VI(max)
VOUT(min) is the minimum output voltage,
IOUT(max) is the maximum output current for the
application,
Iq
is the quiescent current the regulator
consumes at IQ(max).
Once the value of PD(max) is known, the maximum
permissible value of RqJA can be calculated:
T
RqJA + 150°C * A
PD
RqJA + RqJC ) RqCS ) RqSA
where
RqJC is the junction-to-case thermal resistance,
RqCS is the case-to-heatsink thermal resistance,
RqSA is the heatsink-to-ambient thermal resistance.
RqJC appears in the package section of the data sheet. Like
RqJA, it too is a function of package type. RqCS and RqSA are
functions of the package type, heatsink and the interface
between them. These values appear in heatsink data sheets
of heatsink manufacturers.
Thermal, mounting, and heatsinking considerations are
discussed in the ON Semiconductor application note
AN1040/D.
(2)
The value of RqJA can then be compared with those in the
package section of the data sheet. Those packages with
RqJA's less than the calculated value in Equation 34 will
keep the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
IOUT
II
SMART
REGULATOR®
VI
(3)
VOUT
} Control
Features
Iq
100
100
75
R(t), (°C/W)
THERMAL RESISTANCE JUNCTION-TO-AIR
(°C/W)
Figure 36. Single Output Regulator with Key
Performance Parameters Labeled
D2PAK 1 oz
50
D2PAK
2 oz
10
D2PAK
1
25
Single Pulse
0
0.1
0
100
200
300
400
500
600
700
800
900
COPPER AREA (mm2)
0.000001
0.0001
0.01
1
PULSE TIME (sec)
100
Figure 38. NCV8675 @ PCB Cu Area 100 mm2
PCB Cu thk 1 oz
Figure 37.
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12
NCV8675
EMC-Characteristics: Conducted Susceptibility
Acceptance Criteria
Amplitude Dev. max 4% of Output Voltage
Reset outputs remain in correct state + -1 V
1. dBm means dB milli-Watts, P(dBm) = 10 log
(P(mW))
2. A global pin carries a signal or power which enters
or leaves the application board
3. A local pin carries a signal or power which does
not leave the application board. It remains on the
application board as a signal between two
components
All EMC-Characteristics are based on limited samples
and no part of production test according to 47A/658/CD
IEC62132-4 (direct Power Injection).
Test Conditions
Supply Voltage Vin = 12 V
Temperature
TA = 23°C + -5°C
Load
RL = 100 W
Direct power Injection
33d Bm (Note 1) forward power CW for global pin (Note 2)
17 dBm (Note 1) forward power CW for local pin (Note 3)
X1
VIN_DC
X2
VIN_HF
L1
L3
FERRITE
FERRITE
C2
15 mF
C4
47 nF
C1
100 nF
NCV8675
1 I
VOUT
GND
3
U1
D
4
L4
FERRITE
FERRITE
X3
RO_DC
X4
RO_HF
X6
VOUT_HF
C5
22 mF
O 5
2 RO
L2
X5
VOUT_DC
R1
4.99k
C6
47 nF
VOUT
Figure 39. Test Circuit
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13
X7
D_DC
X8
D_HF
NCV8675
40
40
Vin Pass 33 dBm
30
(dBm)
(dBm)
30
20
10
20
10
0
0
1
10
100
FREQUENCY (MHz)
1000
1
Figure 40. Typical Vin Pin Susceptibility
25
10
100
FREQUENCY (MHz)
1000
Figure 41. Typical Vout Pin Susceptibility
25
20
20
RO Pass 17 dBm
Delay Pass 17 dBm
15
(dBm)
15
(dBm)
Vout Pass 33 dBm
10
5
10
5
0
0
1
10
100
FREQUENCY (MHz)
1000
1
Figure 42. Typical RO Pin Susceptibility
10
100
FREQUENCY (MHz)
1000
Figure 43. Typical Delay Pin Susceptibility
ORDERING INFORMATION
Package
Shipping†
NCV8675DS50G
D2PAK
(Pb-Free)
50 Units / Rail
NCV8675DS50R4G
D2PAK
(Pb-Free)
800 / Tape & Reel
NCV8675DS33G
D2PAK
(Pb-Free)
50 Units / Rail
NCV8675DS33R4G
D2PAK
(Pb-Free)
800 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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14
NCV8675
PACKAGE DIMENSIONS
D2PAK 5
CASE 936A-02
ISSUE C
-TOPTIONAL
CHAMFER
A
TERMINAL 6
E
U
S
K
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A
AND K.
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 6.
5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED 0.025
(0.635) MAXIMUM.
V
H
1 2 3 4 5
M
D
0.010 (0.254)
M
T
L
P
N
G
INCHES
MIN
MAX
0.386
0.403
0.356
0.368
0.170
0.180
0.026
0.036
0.045
0.055
0.067 BSC
0.539
0.579
0.050 REF
0.000
0.010
0.088
0.102
0.018
0.026
0.058
0.078
5 _ REF
0.116 REF
0.200 MIN
0.250 MIN
DIM
A
B
C
D
E
G
H
K
L
M
N
P
R
S
U
V
R
C
SOLDERING FOOTPRINT*
MILLIMETERS
MIN
MAX
9.804
10.236
9.042
9.347
4.318
4.572
0.660
0.914
1.143
1.397
1.702 BSC
13.691
14.707
1.270 REF
0.000
0.254
2.235
2.591
0.457
0.660
1.473
1.981
5 _ REF
2.946 REF
5.080 MIN
6.350 MIN
8.38
0.33
1.702
0.067
10.66
0.42
3.05
0.12
16.02
0.63
SCALE 3:1
1.016
0.04
mm Ǔ
ǒinches
5-LEAD D2PAK
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada
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15
ON Semiconductor Website: www.onsemi.com
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For additional information, please contact your local
Sales Representative
NCV8675/D