ONSEMI NCV8664DT50RKG

NCV8664
Ultra−Low Iq Low Dropout
Linear Regulator
The NCV8664 is a precision 5.0 V fixed output, low dropout
integrated voltage regulator with an output current capability of
150 mA. Careful management of light load current consumption,
combined with a low leakage process, achieve a typical quiescent
current of 22 mA.
NCV8664 is pin and functionally compatible with NCV4264 and
NCV4264−2, and it could replace these parts when very low
quiescent current is required.
The output voltage is accurate within "2.0%, and maximum
dropout voltage is 600 mV at full rated load current.
It is internally protected against input supply reversal, output
overcurrent faults, and excess die temperature. No external
components are required to enable these features.
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MARKING
DIAGRAMS
TAB
1
2
3
4
Features
•
•
•
•
•
•
•
•
•
5.0 V Fixed Output
"2.0% Output Accuracy, Over Full Temperature Range
30 mA Maximum Quiescent Current at IOUT = 100 mA
600 mV Maximum Dropout Voltage at 150 mA Load Current
Wide Input Voltage Operating Range of 5.5 V to 45 V
Internal Fault Protection
♦ −42 V Reverse Voltage
♦ Short Circuit/Overcurrent
♦ Thermal Overload
NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
AEC−Q100 Qualified
This is a Pb−Free Device
1 2
SOT−223
ST SUFFIX
CASE 318E
AYM
V6645
1
1
DPAK
DT SUFFIX
CASE 369C
V66450G
ALYWW
3
A
L
Y
WW
M
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb−Free Package
PIN CONNECTIONS
PIN
1
2, TAB
3
FUNCTION
VIN
GND
VOUT
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 1
1
Publication Order Number:
NCV8664/D
NCV8664
IN
OUT
Bias Current
Generators
1.3 V
Reference
+
Error
Amp
−
Thermal
Shutdown
GND
Figure 1. Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
Symbol
Function
1
VIN
2
GND
Ground; substrate.
3
VOUT
Regulated output voltage; collector of the internal PNP pass transistor.
TAB
GND
Ground; substrate and best thermal connection to the die.
Unregulated input voltage; 5.5 V to 45 V.
OPERATING RANGE
Pin Symbol, Parameter
Symbol
Min
Max
Unit
VIN, DC Input Operating Voltage
VIN
5.5
+45
V
Junction Temperature Operating Range
TJ
−40
+150
_C
Symbol
Min
Max
Unit
VIN
−42
+45
V
VOUT
−0.3
+16
V
Tstg
−55
+150
_C
ESD Capability, Human Body Model (Note 1)
VESDHB
4000
−
V
ESD Capability, Machine Model (Note 1)
VESDMIM
200
−
V
MAXIMUM RATINGS
Rating
VIN, DC Voltage
VOUT, DC Voltage
Storage Temperature
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series incorporates ESD protection and is tested by the following methods:
ESD HBM tested per AEC−Q100−002 (EIA/JESD22−A 114C)
ESD MM tested per AEC−Q100−003 (EIA/JESD22−A 115C)
Thermal Resistance
Parameter
Symbol
Condition
Min
Max
Unit
Junction−to−Ambient
DPAK
RqJA
−
101 (Note 2)
°C/W
Junction−to−Ambient
SOT−223
RqJA
−
99 (Note 2)
°C/W
Junction−to−Case
DPAK
RqJC
−
9.0
°C/W
Junction−to−Case
SOT−223
RqJC
−
17
°C/W
2. 1 oz., 100 mm2 copper area.
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2
NCV8664
Lead Soldering Temperature and MSL
Rating
Symbol
Lead Temperature Soldering
Reflow (SMD Styles Only), Lead Free (Note 3)
Tsld
Moisture Sensitivity Level
SOT223
DPAK
Min
Max
−
265 pk
1
1
−
−
Unit
_C
MSL
−
3. Lead Free, 60 sec – 150 sec above 217_C, 40 sec max at peak.
ELECTRICAL CHARACTERISTICS (VIN = 13.5 V, Tj = −40_C to +150_C, unless otherwise noted.)
Test Conditions
Min
Typ
Max
Unit
Output Voltage
Symbol
VOUT
0.1 mA v IOUT v 150 mA (Note 4)
6.0 V v VIN v 28 V
4.900
5.000
5.100
V
Line Regulation
DVOUT vs. VIN
IOUT = 5.0 mA
6.0 V v VIN v 28 V
−25
5.0
+25
mV
Load Regulation
DVOUT vs. IOUT
1.0 mA v IOUT v 150 mA (Note 4)
−35
5.0
+35
mV
Dropout Voltage
VIN−VOUT
IQ = 100 mA (Notes 4 & 5)
IQ = 150 mA (Notes 4 & 5)
−
265
315
500
600
mV
Iq
IOUT = 100 mA
TJ = 25_C
TJ = −40_C to +85_C
−
−
21
22
29
30
Active Ground Current
IG(ON)
IOUT = 50 mA (Note 4)
IOUT = 150 mA (Note 4)
−
−
1.3
8.0
3
15
mA
Power Supply Rejection
PSRR
VRIPPLE = 0.5 VP−P, F = 100 Hz
−
TBD
−
%/V
Output Capacitor for Stability
COUT
ESR
IOUT = 0.1 mA to 150 mA
(Note 4)
10
−
−
−
−
9.0
mF
W
Current Limit
IOUT(LIM)
VOUT = 4.5 V (Note 4)
150
−
500
mA
Short Circuit Current Limit
IOUT(SC)
VOUT = 0 V (Note 4)
100
−
500
mA
TTSD
(Note 9)
150
−
200
_C
Characteristic
Quiescent Current
mA
PROTECTION
Thermal Shutdown Threshold
4. Use pulse loading to limit power dissipation.
5. Dropout voltage = (VIN–VOUT), measured when the output voltage has dropped 100 mV relative to the nominal value obtained with VIN = 13.5 V.
6. Not tested in production. Limits are guaranteed by design.
5.5−45 V
Input
II
CI1
1.0 mF
Vin
1
100 nF
8664
3
IQ
Vout
COUT
10 mF
2
Output
RL
GND
Figure 2. Measurement Circuit
5.5−45 V
Input
Vin
Cin
100 nF
1
8664
3
Vout
5.0 V Output
COUT
10 mF
2
GND
Figure 3. Applications Circuit
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3
NCV8664
Typical Curves
1000
5.0
OUTPUT VOLTAGE (V)
100
ESR (W)
6.0
Maximum ESR
Cout = 10, 22 mF
10
1.0
0.1
20
40
60
80
100
120
140
QUIESCENT CURRENT (mA)
8.0
160
1.0
2.0
3.0
4.0
5.0
6.0
7.0
INPUT VOLTAGE (V)
Figure 4. ESR Characterization
Figure 5. Output Voltage vs. Input Voltage
0.40
125°C
Vin = 13.5 V
25°C
7.0
−40°C
6.0
5.0
4.0
3.0
2.0
1.0
0
0
LOAD CURRENT (mA)
50
100
0.35
8.0
125°C
Vin = 13.5 V
25°C
0.30
−40°C
0.25
0.20
0.15
0.10
0.05
0
200
150
0
5.0
10
15
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
Figure 6. Current Consumption vs. Output
Load
Figure 7. Current Consumption vs. Output
Load (Low Load)
45
20
12
Vin = 13.5 V
Iout = 100 mA
40
Vin = 13.5 V
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)
2.0
0
180
QUIESCENT CURRENT (mA)
0
Vin = 13.5 V
9.0
0
3.0
1.0
Stable Region
0.01
4.0
35
30
25
20
15
10
5.0
0
−50
0
50
150
100
10
Iout = 150 mA
8.0
6.0
Iout = 100 mA
4.0
2.0
0
−50
0
50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 8. Quiescent Current vs. Temperature
Figure 9. Quiescent Current vs. Temperature
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4
150
NCV8664
Typical Curves
18
0.45
CURRENT CONSUMPTION (mA)
125°C
0.40
DROPOUT (V)
0.35
0.30
25°C
0.25
−40°C
0.20
0.15
0.10
0.05
0
50
100
12
10
8.0
6.0
0
10
20
30
40
INPUT VOLTAGE (V)
Figure 10. Dropout Voltage vs. Output Load
Figure 11. Current Consumption vs. Input
Voltage
140
5.08
OUTPUT VOLTAGE (V)
5.10
120
100
TA = 25°C
80
TA = 125°C
60
40
20
0
RL = 100 W
2.0
160
0
RL = 50 W
4.0
0
200
150
14
OUTPUT LOAD (mA)
10
20
30
40
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
−50
50
0
50
100
TEMPERATURE (°C)
Figure 12. Output Current vs. Input Voltage
Figure 13. Output Voltage vs. Temperature
400
350
300
250
200
150
100
Vin = 13.5 V
50
0
−50
0
50
100
TEMPERATURE (°C)
Figure 14. Current Limit vs. Temperature
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5
50
Vin = 13.5 V
Load = 10 mA
5.06
INPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
0
16
150
150
NCV8664
Circuit Description
Calculating Power Dissipation in a Single Output
Linear Regulator
The NCV8664 is a precision trimmed 5.0 V fixed output
regulator. Careful management of light load consumption
combined with a low leakage process results in a typical
quiescent current of 22 mA. The device has current
capability of 150 mA, with 600 mV of dropout voltage at
full rated load current. The regulation is provided by a PNP
pass transistor controlled by an error amplifier with a
bandgap reference. The regulator is protected by both
current limit and short circuit protection. Thermal
shutdown occurs above 150°C to protect the IC during
overloads and extreme ambient temperatures.
The maximum power dissipation for a single output
regulator (Figure 3) is:
PD(max) + [VIN(max) * VOUT(min)] @
IQ(max) ) VI(max) @ Iq
(eq. 1)
Where:
VIN(max) is the maximum input voltage,
VOUT(min) is the minimum output voltage,
IQ(max) is the maximum output current for the
application, and Iq is the quiescent current the regulator
consumes at IQ(max).
Once the value of PD(Max) is known, the maximum
permissible value of RqJA can be calculated:
Regulator
The error amplifier compares the reference voltage to a
sample of the output voltage (Vout) and drives the base of
a PNP series pass transistor by a buffer. The reference is a
bandgap design to give it a temperature−stable output.
Saturation control of the PNP is a function of the load
current and input voltage. Over saturation of the output
power device is prevented, and quiescent current in the
ground pin is minimized.
PqJA +
150 oC * TA
PD
(eq. 2)
The value of RqJA can then be compared with those in the
package section of the data sheet. Those packages with
RqJA’s less than the calculated value in Equation 2 will keep
the die temperature below 150°C. In some cases, none of
the packages will be sufficient to dissipate the heat
generated by the IC, and an external heat sink will be
required. The current flow and voltages are shown in the
Measurement Circuit Diagram.
Regulator Stability Considerations
The input capacitor CIN1 in Figure 2 is necessary for
compensating input line reactance. Possible oscillations
caused by input inductance and input capacitance can be
damped by using a resistor of approximately 1 W in series
with CIN2. The output or compensation capacitor, COUT
helps determine three main characteristics of a linear
regulator: startup delay, load transient response and loop
stability. The capacitor value and type should be based on
cost, availability, size and temperature constraints.
Tantalum, aluminum electrolytic, film, or ceramic
capacitors are all acceptable solutions, however, attention
must be paid to ESR constraints. The aluminum
electrolytic capacitor is the least expensive solution, but, if
the circuit operates at low temperatures (−25°C to −40°C),
both the value and ESR of the capacitor will vary
considerably. The capacitor manufacturer’s data sheet
usually provides this information. The value for the output
capacitor COUT shown in Figure 2 should work for most
applications; however, it is not necessarily the optimized
solution. Stability is guaranteed at values COUT ≥ 10 mF and
an ESR ≤ 9 W within the operating temperature range.
Actual limits are shown in a graph in the Typical
Performance Characteristics section.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air. Each material in the heat flow path
between the IC and the outside environment will have a
thermal resistance. Like series electrical resistances, these
resistances are summed to determine the value of RqJA:
RqJA + RqJC ) RqCS ) RqSA
(eq. 3)
Where:
RqJC = the junction−to−case thermal resistance,
RqCS = the case−to−heat sink thermal resistance, and
RqSA = the heat sink−to−ambient thermal resistance.
RqJA appears in the package section of the data sheet.
Like RqJA, it too is a function of package type. RqCS and
RqSA are functions of the package type, heat sink and the
interface between them. These values appear in data sheets
of heat sink manufacturers. Thermal, mounting, and heat
sinking are discussed in the ON Semiconductor application
note AN1040/D, available on the ON Semiconductor
Website.
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6
NCV8664
120
qJA (°C/W)
100
SOT223
80
60
DPAK
40
20
0
0
100
200
300
400
500
600
700
COPPER AREA (mm2)
Figure 15. qJA vs. Copper Spreader Area
100
SOT223
R(t) (°C/W)
10
DPAK
1.0
0.1
0.000001 0.00001
0.0001
0.001
0.01
0.1
1.0
10
100
1000
PULSE TIME (sec)
Figure 16. Single−Pulse Heating Curves
ORDERING INFORMATION
Device
Marking
Package
Shipping†
NCV8664DT50RKG
V66450G
DPAK
2500/Tape & Reel
NCV8664ST50T3G
V6645
SOT−223
4000/Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
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7
NCV8664
PACKAGE DIMENSIONS
SOT−223 (TO−261)
ST SUFFIX
CASE 318E−04
ISSUE L
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
D
b1
4
HE
1
2
3
b
e1
e
C
q
A
0.08 (0003)
DIM
A
A1
b
b1
c
D
E
e
e1
L1
HE
E
A1
q
MIN
1.50
0.02
0.60
2.90
0.24
6.30
3.30
2.20
0.85
1.50
6.70
0°
MILLIMETERS
NOM
MAX
1.63
1.75
0.06
0.10
0.75
0.89
3.06
3.20
0.29
0.35
6.50
6.70
3.50
3.70
2.30
2.40
0.94
1.05
1.75
2.00
7.00
7.30
10°
−
L1
SOLDERING FOOTPRINT*
3.8
0.15
2.0
0.079
2.3
0.091
2.3
0.091
6.3
0.248
2.0
0.079
1.5
0.059
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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8
MIN
0.060
0.001
0.024
0.115
0.009
0.249
0.130
0.087
0.033
0.060
0.264
0°
INCHES
NOM
0.064
0.002
0.030
0.121
0.012
0.256
0.138
0.091
0.037
0.069
0.276
−
MAX
0.068
0.004
0.035
0.126
0.014
0.263
0.145
0.094
0.041
0.078
0.287
10°
NCV8664
PACKAGE DIMENSIONS
DPAK (Single Gauge)
DT SUFFIX
CASE 369C
ISSUE O
−T−
C
B
V
E
R
4
1
2
DIM
A
B
C
D
E
F
G
H
J
K
L
R
S
U
V
Z
Z
A
S
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
PLANE
3
U
K
F
J
L
H
D
G
2 PL
0.13 (0.005)
M
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.090 BSC
0.180 0.215
0.025 0.040
0.020
−−−
0.035 0.050
0.155
−−−
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
4.58 BSC
0.87
1.01
0.46
0.58
2.60
2.89
2.29 BSC
4.57
5.45
0.63
1.01
0.51
−−−
0.89
1.27
3.93
−−−
T
RECOMMENDED FOOTPRINT
6.20
0.244
2.58
0.101
5.80
0.228
3.0
0.118
1.6
0.063
6.172
0.243
SCALE 3:1
mm Ǔ
ǒinches
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
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damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
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For additional information, please contact your local
Sales Representative
NCV8664/D