FAIRCHILD FDC3601N

FDC3601N
Dual N-Channel 100V Specified PowerTrenchMOSFET
Features
• 1.0 A, 100 V.
General Description
These N-Channel 100V specified MOSFETs are
produced using Fairchild Semiconductor's advanced
PowerTrench process that has been especially tailored
to minimize on-state resistance and yet maintain low
gate charge for superior switching performance.
RDS(ON)= 500 mΩ @ VGS = 10 V
RDS(ON)= 550 mΩ @ VGS = 6.0 V
• Low gate charge (3.7nC typical)
• Fast switching speed.
These devices have been designed to offer exceptional
power dissipation in a very small footprint for
applications where the bigger more expensive SO-8
and TSSOP-8 packages are impractical.
• High performance trench technology for extremely
low R DS(ON) .
• SuperSOTTM-6 package: small footprint 72%
Applications
• Load switch
• Battery protection
• Power management
(smaller than standard SO-8); low profile (1mm thick).
D2
S1
D1
G2
SuperSOT TM -6
S2
3
5
2
6
1
G1
Absolute Maximum Ratings
Symbol
4
TA=25oC unless otherwise noted
Ratings
Units
VDSS
Drain-Source Voltage
Parameter
100
V
VGSS
Gate-Source Voltage
±20
V
ID
Drain Current
1.0
A
– Continuous
(Note 1a)
– Pulsed
4.0
Power Dissipation for Single Operation
PD
TJ, TSTG
(Note 1a)
0.96
(Note 1b)
0.9
(Note 1c)
0.7
W
−55 to +150
°C
(Note 1a)
130
°C/W
(Note 1)
60
°C/W
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
.601
FDC3601N
7’’
8mm
3000 units
2001 Fairchild Semiconductor Corporation
FDC3601N Rev C(W)
FDC3601N
August 2001
Symbol
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max Units
Off Characteristics
ID = 250 µA
100
V
BVDSS
Drain–Source Breakdown Voltage
VGS = 0 V,
∆BVDSS
∆TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
ID = 250 µA,Referenced to 25°C
VDS = 80 V,
VGS = 0 V
10
µA
IGSSF
Gate–Body Leakage, Forward
VGS = 20 V,
VDS = 0 V
100
nA
IGSSR
Gate–Body Leakage, Reverse
VGS = –20 V,
VDS = 0 V
–100
nA
4
V
On Characteristics
105
mV/°C
(Note 2)
ID = 250 µA
2
2.6
VGS(th)
Gate Threshold Voltage
VDS = VGS,
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID = 250 µA,Referenced to 25°C
ID(on)
On–State Drain Current
VGS = 10 V,
ID = 1.0 A
ID = 0.9 A
VGS = 6 V,
VGS = 10 V, ID = 1.0 A, TJ = 125°C
VGS = 10 V,
VDS = 10 V
gFS
Forward Transconductance
VDS = 5V,
ID = 1.0 A
3.6
VDS = 50 V,
f = 1.0 MHz
V GS = 0 V,
153
pF
5
pF
1
pF
–5
370
396
685
mV/°C
500
550
976
3
mΩ
A
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
tf
Qg
Total Gate Charge
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
(Note 2)
8
16
ns
4
8
ns
Turn–Off Delay Time
11
20
ns
Turn–Off Fall Time
6
12
ns
3.7
5
nC
VDD = 50 V,
VGS = 10 V,
VDS = 50 V,
VGS = 10 V
ID = 1 A,
RGEN = 6 Ω
ID = 1.0 A,
0.8
nC
1
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V,
IS = 0.8 A
0.8
(Note 2)
0.8
A
1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a)
130 °C/W when
mounted on a 0.125
2
in pad of 2 oz.
copper.
b)
140°C/W when
mounted on a .004 in2
pad of 2 oz copper
c)
180°C/W when mounted on a
minimum pad.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDC3601N Rev C(W)
FDC3601N
Electrical Characteristics
FDC3601N
Typical Characteristics
1.6
4
VGS = 10V
ID, DRAIN CURRENT (A)
6.0V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
5.0V
4.5V
3
4.0V
2
1
VGS = 4.0V
1.4
4.5V
1.2
5.0V
6.0V
10V
1
0.8
0
0
2
4
6
0
8
1
Figure 1. On-Region Characteristics.
3
4
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.25
2.6
ID = 1.0A
VGS =10V
2.2
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
2
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
1.8
1.4
1
0.6
0.2
-50
-25
0
25
50
75
100
125
ID = 0.5A
1
TA = 125oC
0.75
0.5
TA = 25oC
0.25
150
2
4
6
8
10
o
TJ, JUNCTION TEMPERATURE ( C)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
IS, REVERSE DRAIN CURRENT (A)
6
ID, DRAIN CURRENT (A)
VDS = 5V
4.5
3
TA = 125oC
25oC
1.5
-55oC
VGS = 0V
1
TA = 125oC
0.1
25oC
-55oC
0.01
0.001
0.0001
0
1.5
2.5
3.5
4.5
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
5.5
0
0.2
0.4
0.6
0.8
1
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC3601N Rev C(W)
FDC3601N
Typical Characteristics
200
VDS = 30V
ID = 1.0A
70V
6
4
150
100
50
2
COSS
CRSS
0
0
0
1
2
3
4
0
10
Qg, GATE CHARGE (nC)
30
40
50
Figure 8. Capacitance Characteristics.
50
P(pk), PEAK TRANSIENT POWER (W)
10
100µs
RDS(ON) LIMIT
1ms
1
10ms
100ms
1s
DC
0.1
VGS = 10V
SINGLE PULSE
RθJA = 180oC/W
0.01
TA = 25oC
0.001
0.1
1
10
100
SINGLE PULSE
RθJA = 180°C/W
TA = 25°C
40
30
20
10
0
0.001
1000
0.01
VDS, DRAIN-SOURCE VOLTAGE (V)
0.1
1
10
100
1000
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
20
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
ID, DRAIN CURRENT (A)
f = 1MHz
VGS = 0 V
CISS
50V
8
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
10
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) + RθJA
RθJA = 180°C/W
0.2
0.1
0.1
0.05
P(pk)
0.02
0.01
0.01
0.001
0.0001
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDC3601N Rev C(W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST 
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench 
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER 
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET 
VCX™
STAR*POWER is used under license
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NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H3