Datasheet TLE 6214 L Smart Dual Current Sense Switch Basic Features Product Summary • Overload Protection Supply voltage • DMOS Overtemperature protection Drain source voltage • Overvoltage protection • Open load detection On resistance • Current limitation • Low quiescent current mode • 3,3V µC compatible input • Electrostatic discharge (ESD) protection VS VDS(AZ) RON 4.5 – 5.5 V 48 - 60 V 0.18 Ω P-DSO-12-4 Specific Features • Proportional load current sense • IC Overtemperature warning • 8-Bit SPI (for diagnosis and control) • Short to GND detection • Programmable overload behaviour Ordering Code : Q67007-A9698 General Description Dual Current Sense Low-Side Switch in Smart Power Technology (SPT) with two open drain DMOS output stages. The TLE 6214 L is protected by embedded protection functions and designed for automotive applications. The output stages can be controlled directly by parallel inputs for PWM applications (e.g. Oxygen Probe Heater, Stepper Motor) or by SPI. All output stages can provide a load current proportional sense signal. Diagnosis is done by an 8 bit SPI or by one status output per channel. Block Diagram VS IS1/ IS2/ Channel 1 M ux Fault / ST1 Output Stage OUT1 IN1 IN2 SI Normal function SO / ST2 SCB/Overload Open load SCLK SPI Interface 8 bit Short to ground Overtemperature Channel 2 CS GND V3.0 OUT2 Page 1 GND 18.10.2004 Datasheet TLE 6214 L Pin Description Pin Symbol 1 IN2 2 SI 3 OUT2 4 CO1 5 6 7 8 9 10 11 12 SCLK GND IN1 CS OUT1 VS CO2 GND Pin Configuration (Top view) Function Input Channel 2 SPI Signal In Power Output Channel 2 Current Sense 1/2 / Fault / Status Ch1 SPI Clock Ground Input Channel 1 SPI Chip Select Power Output Channel 1 Supply Voltage SPI Signal Out / Status Ch2 Ground 1• 2 3 4 5 6 IN 2 SI OUT2 CO 1 SCLK GND 12 11 10 9 8 7 GND CO 2 Vs OUT1 CS IN 1 Power P-DSO -12 Both GND pins and heat sink must be connected to GND externally. Maximum Ratings for Tj = – 40°C to 150°C Parameter Supply Voltage Symbol VS Continuous Drain Source Voltage (OUT1...OUT2) VDS -0.3 ... +48 V Input Voltage, All Inputs and Data outputs, Sense Lines Output Current per Channel 1) VIN - 0.3 ... + 7 V ID ID(lim1,2) min. A Reverse Current per channel Irev -3 A 75 mJ Output Clamping Energy (single event); linear decreasing current ID = 2A, TJ start = 150°C; max. 100 cycles over lifetime EAS Maximum Voltage for short circuit Protection (single event) 2 Current Limit 2, slew rate 1 (default setting) Current Limit 2, slew rate 2 Current Limit 1, slew rate 1 / 2 VSC, single Electrostatic Discharge Voltage (human body model) according to EIA/JESD22-A114-E Output Pins All other Pins VESD Values -0.3 ... +7 Unit V V 48 32 18 DIN Humidity Category, DIN 40 040 4000 2000 E IEC Climatic Category, DIN IEC 68-1 40/150/56 V V ) Output current rating as long as maximum junction temperature is not exceeded. The maximum output current has to be calculated using 1 RthJA according mounting conditions. Device mounted on PCB (50mm x 50mm x 1,5mm epoxy, FR4) with 6cm2 copper heatsink area (one layer, 70µm thick); PCB in test chamber with blown air 2 V3.0 Page 2 18.10.2004 Datasheet TLE 6214 L Thermal resistance junction - case junction - ambient @ min. footprint junction - ambient @ 6 cm2 cooling area1 PCB with min footprint RthJC RthJA 2 105 45 K/W K/W K/W PCB with 6 cm² copper cooling area Electrical Characteristics Parameter and Conditions VS = 4.5V – 5.5V ; Tj = - 40 °C to + 150 °C (unless otherwise specified) Symbol Values min Unit typ max 1. Power Supply Supply Voltage VS 4.5 Supply Current IS -- IS(sleep) -- Supply Current in Sleep Mode (CS = H) Wake up Time (after sleep mode) 2 --- twake V 5.5 5 mA 10 µA 100 µs Ω 2. Power Outputs ON Resistance VS = 5 V; ID = 2 A TJ = 25°C TJ = 125°C TJ = 150°C RDS(ON) output OFF -- 0.18 -- 0.27 -- 0.3 0.22 0.32 0.36 VDS(AZ) 48 -- 60 V Current Limit 1: Current limitation ID(lim1) 5 6.5 8 A Current Limit 2 :Overload switch off ID(lim2) Output Clamping Voltage VS >= 5V 9 9 8 VS < 5V, TJ <= 125°C VS < 5V, TJ > 125°C 2 Reverse Current per channel2,3 Output Leakage Current A 10,5 Irev Sleep mode active Turn-On Time 1 ID = 2 A, resistive load Turn-On Time 2 ID = 2 A, resistive load Turn-Off Time 1 ID = 2 A, resistive load Turn-Off Time 2 ID = 2 A, resistive load 12 12 12 2 A ID(lkg) -- -- 5 µA tON -- 5 20 10 50 µs tOFF -- 5 20 10 50 µs 1 Device mounted on PCB (50mm x 50mm x 1,5mm epoxy, FR4) with 6cm2 copper heatsink area (one layer, 70µm thick); PCB in test chamber with blown air 2 This parameter is not subject to production test 3 without loss of function, supply current can be IS > 5mA V3.0 Page 3 18.10.2004 Datasheet TLE 6214 L Turn On slew rate UDS 80% to 30%, Vbat = 14V Slew rate 1 ID = 2 A, resistive load Slew rate 2 ID = 2 A, resistive load Turn Off slew rate UDS 30% to 80%, Vbat = 14V V/µs sON 1 5 1 20 5 V/µs sOFF 1 5 1 20 5 VINL -- -- 1.0 V VINH 2.0 -- -- V VINHys 100 200 400 mV Input Pull Down Current (IN1 ... IN2) IIN(1..2) 20 50 100 µA Input Pull Down Current (SI, SCLK) IIN(SI,SCLK) 10 20 50 µA Input Pull Up Current (CS) IIN(CS) 10 20 50 µA 4. Digital Outputs (SO, FAULT , Status 1/2) SO High State Output Voltage ISOH = 2 mA VSOH -- V SO Low State Output Voltage ISOL = 2.5 mA VSOL -- -- 0.4 V CS = H, 0 ≤ VSO ≤ VS ISOlkg -10 0 10 µA VFAULTL -- -- 0.4 V 0.4 V Slew rate 1 ID = 2 A, resistive load Slew rate 2 ID = 2 A, resistive load 3. Digital Inputs Input Low Voltage Input High Voltage Input Voltage Hysteresis 2 Output Tri-state Leakage Current FAULT Output Low Voltage IFAULT = 1.6 mA Status Output Low Voltage IST = 1.6 mA VS - 0.4 -- VST 5. SPI Serial Clock Frequency (depending on SO load) fSCK DC -- 5 MHz Serial Clock Period (1/fsclk) tp(SCK) 200 -- -- ns Serial Clock High Time tSCKH 80 -- -- ns Serial Clock Low Time tSCKL 80 -- -- ns Enable Lead Time (falling edge of CS to rising edge of SCLK) tlead 200 -- -- ns Enable Lag Time (falling edge of SCLK to rising edge of CS) tlag 200 --- -- ns Data Setup Time (required time SI to falling of SCLK) tSU 20 -- -- ns Data Hold Time (falling edge of SCLK to SI) tH 20 -- -- ns tDIS -- -- 150 ns tdt 300 -- -- ns tvalid --- --- 120 150 ns VDS(OL) 0.5* Vs 0.6* Vs 0.7* Vs Disable Time 2 1 Transfer Delay Time (CS high time between two accesses) Data Valid Time CL = 50 pF2 CL = 100 pF2 6. Diagnostic Functions Open Load Detection Voltage (Channel OFF) V 1 This time is necessary between two write accesses. To get the correct diagnostic information, the transfer delay time has to be extended to the maximum fault delay time td(fault)max = 200µs. 2 This parameter is not subject to production test V3.0 Page 4 18.10.2004 Datasheet TLE 6214 L Output Pull Down Current (Channel OFF) IPD(OL) 25 50 100 µA Fault Filtering Time td(fault) 50 100 200 µs Overload switch off delay time (only current limit 2) Td(off) µs 10 10 Slew rate 1 Slew rate 2 50 150 Short to Ground Detection Voltage VDS(SHG) 0.3* Vs 0.4* Vs 0.5* Vs V Output Pull Up Current (Channel OFF) IPU(SHG) -50 -100 -150 µA Under Current Detection Threshold (Channel ON) ID(OL) 100 170 300 mA Current Limit1; Overload Threshold Current1 ID(lim1) 5 6.5 8 Current Limit2; Overload Threshold Current2 ID(lim2) A 9 9 8 VS >= 5V VS < 5V, TJ <= 125°C VS < 5V, TJ > 125°C2 A IC Overtemperature Warning2 Hysteresis2 Tw T(w) hys 155 -- Channel Overtemperature Shutdown2 Hysteresis2 Tth(sd) T(sd)hys 170 -- Current Sense Precision (single channel)1 I FB / I OUT ID = 200mA – 1A; UCO1 ≥ 2V PIS 0.8 Current Sense Precision (single channel)1 ID = 1A – 5A; UCO1 ≥ 2V PIS 10,5 -10 12 12 12 185 -- °C K -10 200 -- °C K 1.0 1.2 mA /A 7. Analog Current Sense Output (IS1 / IS2) I FB / I OUT 0.9 2 Current Sense Temperature Deviation Vs = 5V; ID = 200mA to 5A; UCO1 ≥ 2V 2 IStemp 1.0 mA /A 1.1 PIS(25° -10 C, ID) +10 % Current Sense Settle time UCO1 ≥ 2V, Rsense = 2,5kΩ (ID max = 1A) tIS 4 µs Current Sense Settle time 2 UCO1 ≥ 2V, Rsense = 500Ω (ID max = 5A) tIS 2 µs 1 2 If the summed current is sensed the tolerances of the single channels are added. This parameter is not subject to production test V3.0 Page 5 18.10.2004 Datasheet TLE 6214 L Functional Description The TLE 6214 L is a dual-low-side power switch which has two parallel inputs to control the 2 power DMOS switches, as well as by an 8-Bit SPI for control and diagnostic feedback. The power transistors are protected1) against short circuit, overload (current limitation), overtemperature and against overvoltage by an active zener clamp. The IC has a load current proportional current output for current control applications. The diagnostic logic recognises a fault condition which can be read out via the SPI or the parallel status outputs (depending on the IC configuration). Output Stage Control: Parallel Control or SPI Control The Output stages can be controlled by parallel Inputs or by SPI command. The IC can be programmed (by SPI) to switch the outputs according to the parallel input signal, to the corresponding SPI command bit or to a combination of these two signals. Both, parallel inputs and respective SPI databits are high active. IN 1,2 AND Output Driver Truth table for Output control Input control signal Channel n parallel SPI Input Bit 0 0 0 1 1 0 1 1 OR Output Channel n parallel control off off on on serial control off on off on logic OR off on on on logic AND off off off on Serial Input bits command „channels on / off“ Each output is independently controlled by an output latch. A logic high input ‘data bit’ turns the respective output channel ON, a logic low ‘data bit’ turns it OFF. Switching speed / Slew rate: The switching speed / slew rate of both channels can be configured by SPI for slow or fast switching speed (1:5) for each channel individually. Overtemperature Behaviour: Each channel has an overtemperature sensor and is individually protected against overtemperature. As soon as overtemperature occurs the channel is immediately turned off (without fault filtering time) and the overtmperature information is reported by diagnosis. In this case there are two different behaviours of the affected channel that can be selected by SPI (for all channels generally). Autorestart: as long as the input signal of the channel remains on (e.g. parallel input high) the channel turns automatically on again after cooling down. Latching: After overtemperature shutdown the channel stays off until the overtemperature latch is reset by a new L!H transition of the input signal. Note: The overtemperature sensors of the output channels are only active if the channel is turned on. As soon as the IC temperature (Temperature of the whole IC) reaches a specified level an overtemperature warning will be indicated. Low Quiescent current mode (Sleep mode) : By SPI Command the device can be set to Sleep mode. In this mode all outputs are turned off, the diagnosis and biasing is disabled, the diagnosis and 1 )The integrated protection functions prevent an IC destruction under fault conditions and may not be used in normal operation or permanently. V3.0 Page 6 18.10.2004 Datasheet TLE 6214 L the on/off register are reseted and the current consumption drastically reduced. A wake up is done by sending a wake up command by SPI. A specified time (twake) after this command the IC is fully functional. The configuraton register (exception channel on/off register) values are not influenced by the sleep mode. After wake up the outputs are Off, except the outputs are controlled by parallel inputs. Overload Protection: The IC can be programmed to react in different ways to overload. Current limit 1: In this mode the IC active limits the current to the specified “Current Limit 1”. If the current limitation is active for longer than the fault filtering time this fault is reported and stored in the Fault register. Current limit 2: If this current limit is active for more than the specified “Overload switch off delay time” the affected channel is turned off and the fault is reported and stored in the fault register. To turn on the channel again this overload latch has to be reset before with an L! H transition of the input signal (parallel /SPI depending on the programmed operation). The two operation modes can be changed during operation of the channel. Pin description: OUTPUT 1,2 – Drain pins of the two channels. Output pins and connected to the load. GND – Ground pins. IN 1,2 – Parallel Input Pins of the two channels IS / Fault / ST1 –Configurable output pin. Depending on the configuration (done by SPI command) it has three basic functions: a) General Fault pin. This is a general fault pin (open drain) which shows a high to low transition as soon as an error is latched into the diagnosis register. When the diagnosis register is cleared this flag is also reset (high state). This fault indication can be used to generate a µC interrupt. b) Sense Function. In this configuration the analog output signal represents the value of the load current: Sense Current proportional load current channel 1 Sense Current proportional load current channel 2 Sense Current proportional load current of both channels (ID1 + ID2) c) Status Output for channel 1: The Status output shows the same level as the input signal of channel 1 as long as there is no error and the inverted input signal when any kind of error occurs at channel 1 VS – Logic Supply pin. Used to supply the integrated circuitry. CS – Chip Select of the SPI (low active) SO / ST2 – Configurable output pin. Depending on the configuration (done by SPI command) it has two functions: a) Signal Output of the Serial Peripheral Interface b) Status Output for channel 2: The Status output shows the same level as the input signal of channel 2 as long as there is no error and the inverted input signal when any kind of error occurs at channel 2 SI – Signal Input of the Serial Peripheral Interface. The pin has an internal pull down structure. SCKL – Clock Input of the Serial Peripheral Interface. The pin has an internal pull down structure V3.0 Page 7 18.10.2004 Datasheet TLE 6214 L SPI The SPI is a Serial Peripheral Interface with 4 digital pins CS and an 8 bit shift register. The SPI is used to configure and SCLK program the device, turn on and off channels and to read SI detailed diagnostic information. SO Note: The default setting of the TLE614L is to use the the SO/ST2 pin as status output pin for channel 2. To activate the SO function of the SPI the command "I/O Configure" (see. SPI commands: No.3) has to be used to reconfigure the IC. (e.g. 0111 xxxx) SPI SPI Signal Description: CS - Chip Select. The system microcontroller selects the TLE 6214 L by means of the CS pin. Whenever the pin is in a logic low state, data can be transferred from the µC and vice versa. LSB CS = H : Any signals at the SCLK and SI pins are ignored and SO is forced into a high impedance state. MSB internal logic registers CS SI Serial input data MSB first 8 bit SPI shift register CS diagnosis register LSB SO Serial output (diagnosis) MSB first MSB to logic high or low state corresponding to the SO bits CS = H!L : • diagnostic information is transferred from the diagnosis register into the SPI shift register. (in sleep mode no tranfer of diagnostic information) • serial input data can be clocked into the SPI shift register from then on • SO changes from high impedance state CS = L : SPI is working like a shift register. With each clock signal at the SCLK pin the state of the SI is read into the SPI shift-register (falling clock edge) and one diagnosis bit is written out of SO (rising rising edge). CS = L!H: • transfer of SI bits from SPI shift register into the internal logic registers • reset of diagnosis register if command was valid To avoid any false clocking the serial clock input pin SCLK should be logic low state during high to low transition of CS. SCLK - Serial Clock. The serial clock pin clocks the internal SPI shift register of the TLE 6214 L. The serial input (SI) accepts data into the input SPI shift register on the falling edge if while the serial output (SO) shifts diagnostic information out of the SPI shift register on the rising edge of serial clock. It is essential that the SCLK pin is in a logic low state whenever chip select CS makes any transition. SI - Serial Input. Serial data bits are shifted in at this pin, the most significant bit (MSB) first. SI information is read in on the falling edge . Input data is latched in the SPI shift register and then transferred to the internal registers of the logic. The input data consist of 8 bit, made up of x control bits and y data bits. The control word is used to program the device, to operate it in a certain mode as well as providing diagnostic information (see SPI Commands). SO - Serial Output. Diagnostic data bits are shifted out serially at this pin, the most significant bit (MSB) first. SO is in a high impedance state until the CS pin goes to a logic low state. New diagnostic data will appear at the SO pin following the rising edge. V3.0 Page 8 18.10.2004 Datasheet TLE 6214 L SPI Commands: No Command MSB 6 5 4 3 Command Bits 1 2 Diagnosis only Output Configure 0 0 0 1 1 0 X Ilim Ch2 3 I/O Configure 0 1 1 4 5 6 7 Reset Registers Sleep Mode Wake Up Channels on (1) / off (0) No command 1 1 1 1 0 0 1 1 0 1 0 1 Status / SPI X X X Ch2 0 0 0 X 8 2 1 LSB Data Bits X Ilim Ch1 X Restart /Latch Parallel / Serial Input X X X X X X Ch1 X X X X X Slewrate Slewrate Ch2 Ch1 Fault / Sense X X X X X X X X X X Command description: (default values are bold print) 1. Diagnosis Only : Reads out the diagnosis register. This command has no other influence on the device. 2. Output Configure : Configures the behaviour of the Power Outputs. Ilim Ch1: overload behaviour of channel 1 0: Current limit 2 is activated (default) 1: Current limit 1 is activated Ilim Ch2: overload behaviour of channel 2 0: Current limit 2 is activated(default) 1: Current limit 1 is activated Restart / Latch: overtemperature behaviour of the IC 0: Automatic autorestart of a channel after cooling down(default) 1: Latching "off" of a channel at overtemperature Slew rate: Switching slew rate of channel 1 and 2 0: fast switching (slew rate 1) (default) 1: slow switching (slew rate 2) 3. I/O Configure : Configures the behaviour of the I/O Ports. Status / SPI : Output of diagnostic information of the IC 0: Diagnosis output serial with one status output per channel (ST1, ST2) 1: Diagnosis output with SPI (SO) and Fault Pin / Sense Pin Parallel / Serial Input : Control of the output channels bit3 bit2 0 0 : Control of channel 1 and 2 with parallel input (IN1, IN2) (default) 0 1 : Control of channel 1 and 2 with combination (OR) of serial and parallel input signal 1 0 : Control of channel 1 and 2 with combination (AND) of serial and parallel input signal 1 1 : Control of channel 1 and 2 only with SPI Sense / Fault : Function of the Sense / Fault / ST1 output bit1 bit0 0 0 : Pin function is "general Fault pin"(default) 0 1 : Pin function is current sense output channel 1 (IIS1) 1 0 : Pin function is current sense output channel 2 (IIS2) 1 1 : Pin function is current sense output channel 1 + 2 (IIS1 + IIS2) V3.0 Page 9 18.10.2004 Datasheet TLE 6214 L 4. Reset Registers : Sets back all internal registers. Logic registers to default and Fault registers to no error. Default settings after Reset: Parallel Input control Autorestart Status Outputs ST1 and ST2 active Current Limit 2 Channel ON/OFF register “OFF” Slew rate fast 5. Sleep mode : Activates the low quiescent mode. In sleep mode only the command “wake up” is valid. Other commands will not lead to any reactions. Wake up is done by the Wake Up command or by undervoltage reset. 6. Wake Up : Deactivates the low quiescent mode. A specified time (twake) after this command the IC is fully functional. 7. Channels on / off : Turns on / off the power outputs (if configured for serial control) Ch1 : Serial control bit of channel 1 0: Output off(default) 1: Output on Ch2 : Serial control bit of channel 2 0: Output off(default) 1: Output on After activation of the low quiescent mode by the “sleep” command, the outputs are turned off and the serial control register is set to default values. 8. No Command : No valid command and will not lead to an reaction (register value change, switching channels, ...) of the IC. After Chip Select giong L!H the diagnosis register will not be reset. SPI Diagnostics: As soon as a fault occurs for longer than the fault filtering time (exept Overtemperature; no filtering time), the fault information is latched into the diagnosis register (and the Fault pin will change from high to low state). A new error on the same channel will over-write the old error report. Serial data out pin (SO) is in a high impedance state when CS is high. If CS receives a LOW signal, all diagnosis bits can be shifted out serially. If the sent command was valid the rising edge of CS will reset all diagnosis registers and restart the fault filtering time. In case of an invalid command the device will ignore the data bits and the diagnosis register will not be reset at the rising CS edge. V3.0 Page 10 18.10.2004 Datasheet TLE 6214 L Fig. 1 : Two bits per channel diagnostic feedback plus two overtemperature flags Diagnostic Serial Data O ut SO LSB M SB 7 6 5 4 C h .2 3 2 1 C h.1 Channel O vertem perature Flag HH HL LH LL 0 IC Overtem perature Flag N orm al function O verload , Shorted Load or O verte m perature O pen Load (off), U nder C u rrent (on) Short to G N D For Full Diagnosis there are two diagnostic bits per channel configured as shown in Figure 1. Bit 6 and bit 7 of the diagnostic register are not used and always H. Normal function: The bit combination HH indicates that there is no fault condition, i.e. normal function. Overload, Shorted Load or Overtemperature: HL is set when the current limitation gets active, i.e. there is a overload, short to supply or overtemperature condition. The second reason for this bit combination is overtemperature of the corresponding channel. Open load/ Under current: LH is set when open load (in off state of the channel) or under current (in on state of the channel) is detected Short to GND : LL is set when this condition is detected (in off state) Channel Overtemperature Flag: In case of overtemperature in any output channel in on state the overtemperature Flag in the SPI diagnosis register is set. This Bit can be used to distinguish between Overload and Overtemperature (both HL combination). IC Overtemperature Warning Flag: When the IC logic temperature exceeds typ.170° the IC Overtemperature Warning Flag will be set in the SPI diagnosis register. Parallel Status Output Diagnostics : Parallel diagnostic outputs (open drain) change state according to the input signal of the corresponding channel. As soon as an error occurs at the corresponding channel ( Overload, Overtemperature and Under current is detected in on state and Open load, short to GND also in off state) the Status output shows the inverted input signal. A fault is detected only if it lasts for longer than the fault filtering time. This fault information is not latched. If a CS Low to High transition is received the fault filtering time for parallel status output diagnostic is restarted (If a valid command was in the SPI register). V3.0 Page 11 18.10.2004 Datasheet TLE 6214 L Diagnostic Table In general the status follows the input signal in normal operating conditions. If any error is detected the status is inverted. Control Input Operating Condition Power Output Filter time Status FAULT Output Output SPI diagnostic feedback Channel Diagnostic bits MSB Channel overtemp . flag LSB Sleep Mode X off L H - - - Normal function L H off on L H H H H H H H L L Short to ground1) “off” L H off on td(fault) td(fault) H L L L L L L H L L Open load1) Under current1) “off” “on” L H off on td(fault) td(fault) H L L L L L H H L L Overload or short to supply1) (Current limit 1 / Limitation) H on td(fault) L L H L L Overload or short to supply2) (Current limit 2 / Shutoff) H off td(off) L L H L L Overtemperature (Restart mode) H off 3) no L L H L H Overtemperature (Latch mode) H off 4) no L L H L H Note 1) Short to ground/open load/ under current /overload/short-to-supply - events shorter than min. time td(fault) will not be latched and not reported at the diagnosis pins. Note 2) Overload/short-to-supply - events shorter than min. time td(off) will not be latched and not reported at the diagnosis pins. Note 3) Off as long as overtemperature occurs, restart after cooling down. Note 4) Shutdown latch reset by falling input edge Analog Current Sensing : The TLE6214L provides an analog current sensing function for both output channels. By SPI configuration the multifunctional pin CO1 can sink a sense current proportional to the load current of one/ both of the two output channels1). The specified current range and accuracy is described in the electrical characteristics “5.Analog Current Sense Output”. To achieve the specified accuracy for current sensing the voltage at the CO1 pin must always be UCO1 ≥ 2V. The specified current sense temperature deviation is related to the typical 25°C 1) At a low load current (<<200mA) and IC configured for current sense function an offset current at the CO1 occurs (typ. IS= 40µA @ ID=0A). V3.0 Page 12 18.10.2004 Datasheet TLE 6214 L Timing Figures Fig. 2 : Power Outputs and Status V IN t tON V DS tO FF 80% 20% t V ST t t d(fa ult) d (fau lt) Fig. 3 : Diagnostic at “Overload” Condition (programmed for “Current Limit 1”) O VL NO OVL OVL C ondition IN ON O FF ID(lim 1) IO U T Inom Inom t d(fault) V Bat V O UT t d(fault) t d(fault) t<t d(fault) t d(fault) I*R O N set ST reset reset set FA U LT SO CS V3.0 HH (N orm al F unction) set reset HL (O V L) HH HL HH HL HH HL HH reset V alid S P I c ycles Page 13 18.10.2004 Datasheet TLE 6214 L Fig. 4 : Diagnostic at “Overload” Condition (programmed for “Current Limit 2”) OVL OVL Condition IN ON OFF ILIM 2 Failure latched ID(lim 2) Inom ILIM 2 Failure latched ILIM 2 Failure latched I O UT t d(off) V Bat V O UT t d(off) shutdown t d(off) shutdown shutdown I*R O N set ST reset set FAULT SO HH (Norm al Function) set reset HL (OVL) HH HL HH HL HH reset CS Valid SP I c ycles Fig. 5 : Diagnostic at “Open Load/Under Current” Condition OL/ UC O L(“O FF”)/UC (“O N ”) C ondition IN ON I O UT V Bat O FF Inom ID(UC) t d(fault) t d(fault) t d(fault) V O UT t d(fault) t d(fault) t<t d(fault) reset reset reset FAULT rewritten set V3.0 t d(fault) I*R O N reset ST CS t d(fault) V DS(O L) set SO NO O L/UC reset HH LH HH (Normal reset Function) rewritten LH (UC) LH (O L) HH LH LH HH LH HH LH HH Valid SP I c ycles Page 14 18.10.2004 Datasheet TLE 6214 L Fig. 6 : Diagnostic at “Short to GND/Under Current” Condition SHG/ UC SHG(“OFF”) /UC(“ON”) Condition IN ON NO SHG/UC OFF Inom I OUT ID(UC) V Bat t d(fault) td(fault) td(fault) V OUT td(fault) t d(fault) td(fault) t<td(fault) I*R ON V DS(SHG) set reset ST td(fault) reset reset reset set FAULT rewritten reset set SO HH LH HH (Normal Function) reset rewritten LH LL (UC) HH LL LH HH LH HH LL HH (SHG) CS Valid SPI cycles Fig. 7 : Diagnostic at “Overtemperature” Condition (programmed for “OT Restart”) O utput channel with O T condition OT O FF IN N o O T condition ON T herm al toggling T herm al toggling T herm al toggling IO U T V OUT set (without delay tim e) ST rewritten set FA U LT T wo B it S O D iagnostic: O T F lag: HH L H L (O V L) H (O T ) reset HH HL HL HL H H (N orm al Function) L H H H L (N o O T condition) reset V alid S P I c ycles CS V3.0 Page 15 18.10.2004 Datasheet TLE 6214 L Fig. 8 : Diagnostic at “Overtemperature” Condition (IC programmed for “OT Latch”) Output channel with OT condition OT IN OFF No OT condition ON OT Failure latched IOUT Thermal shutdown V OUT set ST reset set rewritten FAULT SO Two Bit Diagnostic: HH L OT Flag: HL (OVL) H (OT) reset HH HL H L HL H reset CS HH (Normal Function) L (No OT condition) Valid SPI cycles Fig. 9 : Open load (off) and Short to GND Diagnostics I DIAG 50µA U OUT -100µA SCG V3.0 OL normal operation Page 16 18.10.2004 Datasheet TLE 6214 L Fig. 10 : Serial Interface Timing Diagram CS 0.7VS tdt 0.2 VS tlag tSCKH SCLK tlead 0.7VS 0.2VS tSCKL tSU tH 0.7VS SI 0.2VS Fig. 11 : Input Timing Diagram 0 .7 V S SCLK CS 0 .2 V S t va lid t D is SO 0 .7 V S 0 .2 V S SO SO 0 .7 V S 0 .2 V S SO Valid Time Waveforms V3.0 Enable and Disable Time Waveforms Page 17 18.10.2004 Datasheet TLE 6214 L Application Circuits Application Circuit using Status Outputs only VBB VS VS OUT1 10k OUT2 Status1 ST1 Status2 ST2 CS SCLK SI µC e.g. C166 TLE 6214 L IN1 IN2 GND Application Circuit using SPI and Current Sense Output VBB VS VS OUT1 OUT2 ADC IS 1/2 Rx D SO CS CLK Tx D CS SCLK SI TLE 6214 L µC e.g. C166 IN1 IN2 GND Application Circuit using SPI and Fault Flag V3.0 Page 18 18.10.2004 Datasheet TLE 6214 L VBB VS VS OUT1 10k OUT2 ADC Fault Rx D SO CS CLK Tx D CS SCLK SI TLE 6214 L µC e.g. C166 IN1 IN2 GND V3.0 Page 19 18.10.2004 Datasheet TLE 6214 L Typical Characteristics Maximum Sense Resistor vs. Load Current Rs max Upu = 5V ; Pis = 1 Upu = 4,5V ; Pis = 1,2 100E+3 Resistance [Ohm] 10E+3 1E+3 100E+0 0 1 2 3 4 5 6 7 8 Load Current [A] Circuit proposal for current sensing Upu Rs Is CO1 UCO1 V3.0 TLE 6214 L Page 20 18.10.2004 Datasheet TLE 6214 L Package and Ordering Code (all dimensions in mm) P - DSO - 12 - 4 TLE 6214 L V3.0 Ordering Code Q67007-A9698 Page 21 18.10.2004 Datasheet TLE 6214 L Edition 2004-06-08 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 München, Germany © Infineon Technologies AG 2004. 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Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. V3.0 Page 22 18.10.2004