UNISONIC TECHNOLOGIES CO., LTD TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT LOW VOLTAGE TELEPHONE TRANSMISSION CIRCUIT WITH DIALLER INTERFACE SOP-16 DESCRIPTION The UTC TEA1062N/TEA1062AN is a bipolar integrated circuit performing all speech and line interface function, required in the fully electronic telephone sets. It performs electronic switching between dialing speech. The circuit is able to operate down to D.C. line voltage of 1.6V (with reduced performance) to facilitate the use of more telephone sets in parallel. FEATURES * Low d.c. line voltage; operates down to 1.6V (excluding polarity guard). * Voltage regulator with adjustment static resistance. * Provides supply with limited current for external circuitry. * Symmetrical high-impedance inputs (64kΩ) for dynamic, magnetic or piezoelectric microphones. * Asymmetrical high-impedance inputs (32kΩ) for electrets microphones. * DTMF signal input with confidence tone. * Mute input for pulse or DTMF dialing. * Receivering amplifier for several types of earphones. * Large amplification setting range on microphone and earpiece amplifiers. * Line loss compensation facility, line current depedant (microphone and earpiece amplifiers). * Gain control adaptable to exchange supply. * Possibility to adjust the d.c. line voltage DIP-16 Lead-free: TEN1062NL/TEN1062ANL Halogen-free: TEN1062NG/TEN1062ANG ORDERING INFORMATION Normal TEA1062N-D16-T TEA1062N-S16-R TEA1062AN-D16-T TEA1062AN-S16-R Order Number Lead Free TEA1062NL-D16-T TEA1062NL-S16-R TEA1062ANL-D16-T TEA1062ANL-S16-R Halogen Free TEA1062NG-D16-T TEA1062NG-S16-R TEA1062ANG-D16-T TEA1062ANG-S16-R www.unisonic.com.tw Copyright © 2009 Unisonic Technologies Co., Ltd Package Packing DIP-16 SOP-16 DIP-16 SOP-16 Tube Tape Reel Tube Tape Reel 1 of 13 QW-R108-011.C TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT PIN CONFIGURATIONS Fig. 1 Pin Configurations PIN DESCRIPTIONS PIN NO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 PIN NAME LN GAS1 GAS2 QR GAR MICMIC+ STAB VEE IR DTMF MUTE/MUTE I/O I I I O I I I I I I I Vcc REG AGC SLPE I I I DESCRIPTION Positive line terminal Gain adjustment; transmitting amplifier Gain adjustment; transmitting amplifier Non-inverting output, receiving amplifier Gain adjustment; receiving amplifier Inverting microphone input On-inverting microphone input Current stabilizer Negative line terminal Receiving amplifier input Dual-tone multi-frequency input Mute input; TEA1062N high actived TEA1062AN low actived Positive supply decoupling Voltage regulator decoupling Automatic gain control input Slope (DC resistance) adjustment UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 13 QW-R108-011.C TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT BLOCK DIAGRAM VCC 13 LN 1 5 GAR IR 10 4 QR 2 MIC+ 7 GAS1 MIC- 6 3 GAS2 DTMF 11 dB MUTE/MUTE 12 SUPPLY AND REFERENCE CONTROL CURRENT CURRENT REFERENCE 9 VEE 14 REG 15 AGC 8 STAB LOW VOLTAGE CIRCUIT 16 SLPE Fig. 2 Block Diagram UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 13 QW-R108-011.C TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATINGS UNIT Positive Continuous Line Voltage VLN 12 V 13.2 Repetitive Line Voltage During VLN(RL) V Switch-On Or Line Interruption Repetitive Peak Line Voltage for a 1 ms Pulse/5s(R10=13Ω, 28 VLN(RPL) V R9=20Ω(see Fig.15)) Line Current (Note1) (R9=20Ω) ILINE 140 mA VI(+) VCC+0.7 V Voltage on All Other Pins VI(-) -0.7 V Total Power Dissipation (Note2) (R9=20Ω) PD 640 mW Junction Temperature TJ +125 °C Operating Ambient Temperature Range TOPR -25 ~ +75 °C Storage Temperature Range TSTG -40 ~ +125 °C Note: 1. Mostly dependent on the maximum required Ta and the voltage between LN and SLPE (see Figs 6 ). 2. Calculated for the maximum ambient temperature specified Ta=75°C and a maximum junction temperature of 125°C. 3. Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. THERMAL DATA PARAMETER Thermal Resistance From Junction to Ambient in Free Air SYMBOL θJA RATING 75 UNIT °C/W ELECTRICAL CHARACTERISTICS (ILINE=11~140mA; VEE=0V; f=800Hz; Ta=25°C; unless otherwise specified) PARAMETER SYMBOL SUPPLY; LN AND VCC(PINS 1 AND 13) Voltage Drop Over Circuit, Between LN and VEE VLN TEST CONDITIONS MIC inputs open ILINE =1mA ILINE =4mA ILINE =15mA ILINE =100mA ILINE =140mA ΔVLN/ΔT ILINE =15mA ILINE =15mA, RVA(LN to REG) =68kΩ ILINE =15mA, RVA(REG to SLPE) =39kΩ ICC VCC=2.8V Ip=1.2mA; MUTE=HIGH TEA1062N ILINE=15mA Supply Voltage lp=0mA; MUTE=HIGH Available for VCC Ip=1.2mA; MUTE=LOW Peripheral Circuitry TEA1062AN ILINE=15mA lp=0mA; MUTE=LOW MICROPHONE INPUTS MIC+ AND MIC- (PINS 6 AND 7) Input impedance (differential) Between MIC- and MIC+ ∣Zi∣ Input impedance (sigle-ended) MIC- or MIC+ to VEE Common Mode Rejection Ratio CMRR Voltage Gain MIC+ or MIC- to LN Gv ILINE=15mA, R7=68kΩ Gain Variation with Frequency ΔGvf w.r.t.800Hz at f=300Hz and f=3400Hz Gain Variation with Temperature ΔGvT w.r.t.25°C, without R6; ILINE =50mA at -25°C and +75°C MIN TYP 3.55 4.9 1.6 1.9 4.0 5.7 Variation with Temperature Voltage Drop Over Circuit, Between LN and VEE with External Resistor RVA Supply Current UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2.2 2.2 50.5 MAX UNIT 4.25 6.5 7.5 -0.3 3.5 V V V V V mV/K V 4.5 V 0.9 2.7 3.4 2.7 3.4 1.35 mA V V V V 64 kΩ 32 kΩ 82 52.0 53.5 dB dB ±0.2 dB ±0.2 dB 4 of 13 QW-R108-011.C TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT ELECTRICAL CHARACTERISTICS(Cont.) PARAMETER SYMBOL TEST CONDITIONS DUAL-TONE MULTI-FREQUENCY INPUT DTMF (PIN 11) ∣Zi∣ Input Impedance ILINE =15mA, R7=68kΩ MIN TYP MAX 20.7 24 kΩ Voltage Gain From DTMF to LN Gv Gain Variation With Frequency at f=300Hz and f=3400Hz ΔGvf w.r.t.800Hz ±0.2 dB Gain Variation With Temperature at -25°C and +75°C ΔGvT w.r.t.25°C, ILINE =50mA ±0.2 dB GAIN ADJUSTMENT GAS1 AND GAS2 (PINS 2 AND 3) Gain Variation Of The Ransmitting Amplifier By Varying R7 Between ΔGv -8 GAS1 And GAS2 Sending Amplifier Output LN (pin 1) ILINE =15mA, THD=10% 1.7 VLN(rms) Output Voltage ILINE =4mA, THD=10% ILINE =15mA; R7=68kΩ; 200Ω Noise Output Voltage VNO(rms) between MIC- and MIC+; psophometrically weighted RECEIVING AMPLIFIER INPUT IR (PIN 10) ∣Zi∣ Input Impedance RECEIVING AMPLIFIER OUTPUT QR (PIN 4) ∣ZO∣ ILINE =15mA; RL(from pin 9 to pin Output Impedance Voltage Gain From IR To QR 4 )=300Ω Gv 29.5 Gain Variation With Frequency ΔGvf w.r.t.800Hz at f=300Hz and f=3400Hz Gain Variation With Temperature ΔGvT w.r.t.25°C without R6 ILINE =50mA at-25°C and +75°C sinwave drive, RL=150Ω 0.22 THD=2% Ip=0mA, R4=100kΩ; RL=450Ω 0.3 Output Voltage VO(rms) ILINE =15mA R4=100kΩ RL=150Ω THD=10% ILINE =4mA ILINE=15mA, R4=100kΩ, IR open – Noise Output Voltage VNO(rms) circuit psophometrically weighted RL=300Ω GAIN ADJUSTMENT GAR (PIN 5) Gain Variation Of Receiving Amplifier Achievable By ΔGv -11 Varying R4 Between GAR And QR MUTE INPUT (PIN 12) Input Voltage(HIGH) VIH 1.5 Input Voltage(LOW) VIL Input Current IMUTE REDUCTION OF GAIN TEA1062N MUTE=HIGH MIC+ Or MIC- To LN ΔGv TEA1062AN MUTE=LOW Voltage Gain From DTMF To QR Gv R4=100kΩ, RL=300Ω UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 25.5 UNIT 27 0 dB dB 2.3 0.8 V V -69 dBmp 21 kΩ 4 31 32.5 Ω dB ±0.2 dB ±0.2 dB 0.33 V 0.48 V 15 mV 50 μV 8 0 dB VCC 0.3 15 V V μA 70 dB -19 dB 5 of 13 QW-R108-011.C TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT ELECTRICAL CHARACTERISTICS(Cont.) PARAMETER SYMBOL TEST CONDITIONS AUTOMATIC GAIN CONTROL INPUT AGC ( PIN 15) Controlling The Gain From lR To QR And The Gain From MIC+/MICΔGv R6=110kΩ, ILINE =70mA to LN; R6 Between AGC And VEE Gain Control Range Highest Line Current For Maximum Gain ILINE Lowest Line Current For Minimum Gain UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN TYP MAX UNIT -5.8 dB 23 mA 61 mA 6 of 13 QW-R108-011.C TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT FUNCTIONAL DESCRIPTION Supply: VCC, LN, SLPE, REG and STAB Power for the UTC TEA1062N/TEA1062AN and its peripheral circuits is usually obtained from the telephone line. The IC supply voltage is derived from the line via a dropping resistor and regulated by the UTC TEA1062N/TEA1062AN. The supply voltage Vcc may also be used to supply external circuits e.g. dialling and control circuits. Decoupling of the supply voltage is performed by a capacitor between Vcc and VEE while the internal voltage regulator is decoupled by a capacitor between REG and VEE. The DC current drawn by the device will vary in accordance with varying values of the exchange voltage (Vexch), the feeding bridge resistance (Rexch) and the DC resistance of the telephone line (RLINE). The UTC TEA1062N/TEA1062AN has an internal current stabilizer operating at a level determined by a 3.6kΩ resistor connected between STAB and VEE (see Fig.8). When the line current(ILINE) is more than 0.5mA greater than the sum of the IC supply current (Icc) and the current drawn by the peripheral circuitry connected to VCC(lp) the excess current is shunted to VEE via LN. The regulated voltage on the line terminal(VLN) can be calculated as: VLN=Vref+ISLPE*R9 or; VLN=Vref+[( ILINE – ICC - 0.5*10-3A)－IP]*R9 where: Vref is an internally generated temperature compensated reference voltage of 3.7V and R9 is an external resistor connected between SLPE and VEE. In normal use the value of R9 would be 20Ω. Changing the value of R9 will also affect microphone gain, DTMF gain, gain control characteristics, side tone level, maximum output swing on LN and the DC characteristics (especially at the lower voltages). Under normal conditions, when ISLPE≧ICC+0.5mA + IP, the static behavior of the circuit is that of a 3.7V regulator diode with an internal resistance equal to that of R9. In the audio frequency range the dynamic impedance is largely determined by R1. Fig.3 shows the equivalent impedance of the circuit. At line currents below 9mA the internal reference voltage is automatically adjusted to a lower value(typically 1.6V at 1mA) This means that more sets can be operated in parallel with DC line voltages (excluding the polarity guard) down to an absolute minimum voltage of 1.6V. With line currents below 9mA the circuit has limited sending and receiving levels. The internal reference voltage can be adjusted by means of an external resistor(RVA). This resistor when connected between LN and REG will decrease the internal reference voltage and when connected between REG and SLPE will increase the internal reference voltage. Current(IP) available from VCC for peripheral circuits depends on the external components used. Fig.9 shows this current for VCC > 2.2V. If MUTE of TEA1062N is LOW (TEA1062AN is HIGH) when the receiving amplifier is driven the available current is further reduced. Current availability can be increased by connecting the supply IC(1081) in parallel with R1, as shown in Fig.16, or, by increasing the DC line voltage by means of an external resistor(RVA) connected between REG and SLPE. MICROPHONE INPUTS(MIC+ AND MIC-) AND GAIN PINS (GAS1 AND GAS2) The UTC TEA1062N/TEA1062AN has symmetrical inputs. Its input impedance is 64kΩ (2*32kΩ) and its voltage gain is typically 52 dB (when R7=68kΩ. see Fig.13). Dynamic, magnetic, piezoelectric or electret (with built-in FET source followers) can be used. Microphone arrangements are illustrated in Fig.10. The gain of the microphone amplifier can be adjusted between 44dB and 52dB to suit the sensitivity of the transducer in use. The gain is proportional to the value of R7 which is connected between GAS1 and GAS2. Stability is ensured by the external capacitors, C6 connected between GAS1 and SLPE and C8 connected between GAS1 and VEE. The value of C6 is 100pF but this may be increased to obtain a first-order low-pass filter. The value of C8 is 10 times the value of C6. The cut-off frequency corresponds to the time constant R7*C6. MUTE INPUT (MUTE/MUTE) A LOW (UTC TEA1062N is HIGH) level at UTC TEA1062AN MUTE enables DTMF input and inhibited the microphone inputs and the receiving amplifier inputs; a HIGH (UTC TEA1062N is LOW) level or an open circuit does the reverse. Switching the mute input will cause negligible clicks at the telephone outputs and on the line. In case the line current drops below 6mA (parallal opration of more sets) the circuit is always in speech condition independant of the DC level applied to the MUTE/MUTE input. DUAL-TONE MULTI-FREQUENCY INPUT (DTMF) When the DTMF input is enabled dialling tones may be sent onto the line. The voltage gain from DTMF to LN is typically 25.5dB(when R7=68kΩ) and varies with R7 in the same way as the microphone gain. The signalling tones can be heard in the earpiece at a low level (confidence tone). UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 13 QW-R108-011.C TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT FUNCTIONAL DESCRIPTION(Cont.) RECEIVING AMPLIFIER (IR,QR AND GAR) The receiving amplifier has one input (IR) and a non-inverting output (QR). Earpiece arrangements are illustrated in Fig.11. The IR to QR gain is typically 31dB (when R4=100kΩ). It can be adjusted between 20 and 31dB to match the sensitivity of the transducer in use. The gain is set with the value of R4 which is connected between GAR and QR. The overall receive gain, between LN and QR, is calculated by subtracting the anti-sidetone network attenuation (32dB) from the amplifier gain. Two external capacitors, C4 and C7, ensure stability. C4 is normally 100pF and C7 is 10 times the value of C4. The value of C4 may be increased to obtain a first-order low-pass filter. The cut-off frequency will depend on the time constant R4*C4. The output voltage of the receiving amplifier is specified for continuous-wave drive. The maximum output voltage will be higher under speech conditions where the peak to RMS ratio is higher. AUTOMATIC GAIN CONTROL INPUT (AGC) Automatic line loss compensation is achieved by connecting a resistor(R6) between AGC and VEE. The automatic gain control varies the gain of the microphone amplifier and the receiving amplifier in accordance with the DC line current. The control range is 5.8dB which corresponds to a line length of 5km for a 0.5mm diameter twisted pair copper cable with a DC resistance of 176Ω/km and average attenuation of 1.2dB/km. Resistor R6 should be chosen in accordance with the exchange supply voltage and its feeding bridge resistance(see Fig.12 and Table 1). The ratio of start and stop currents of the AGC curve is independent of the value of R6. If no automatic line loss compensation is required the AGC may be left open-circuit. The amplifier, in this condition, will give their maximum specified gain. SIDE-TONE SUPPRESSION The anti-sidetone network, R1//ZLINE, R2, R3, R8, R9 and ZBAL, (see Fig.4) suppresses the transmitted signal in the earpiece. Compensation is maximum when the following conditions are fulfilled: If fixed values are chosen for R1, R2, R3 and R9 then condition(a) will always be fulfilled when ︱R8//ZBAL︱<<R3. To obtain optimum side-tone suppression condition(b) has to be fulfilled which results in: ZBAL=(R8/R1) ZLINE =k*ZLINE where k is a scale factor; K=(R8/R1). The scale factor (k), dependent on the value of R8, is chosen to meet following criteria: (a) Compatibility with a standard capacitor from the E6 or E12 range for ZBAL, (b) ︱ZBAL//R8︱<<R3 fulfilling condition (a) and thus ensuring correct anti-sidetone bridge operation, (c) ︱ZBAL+R8︱>>R9 to avoid influencing the trans-mitter gain. In practice ZLINE varies considerably with the type and length. The value chosen for ZBAL should therefore be for an average line length thus giving optimum setting for short or long lines. EXAMPLE: The balance impedance ZBAL at which the optimum suppression is present can be calculated by: Suppose ZILINE = 210Ω+(1265Ω//140nF) representing a 5km line of 0.5 mm diameter, copper, twisted pair cable matched to 600Ω(176Ω/km;38nF/km). When k=0.64 then R8=390Ω, ZBAL=130Ω+(820Ω//220nF). UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 8 of 13 QW-R108-011.C TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT LN Leq Rp R1 REG VCC C3 C1 Vref 4.7 μF R9 100 μF 20Ω Rp=16.2kΩ Leq=C3*R9*Rp VEE Fig.3 Equivalent impedance circuit The anti-sidetone network for the UTCTEA1062N/TEA1062AN family shown in Fig.4 attenuates the signl received from the line by 32 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole audio frequency range. Fig.5 shows a convertional Wheatstone bridge anti-sidetone circuit that can be used as an alternative. Both bridge types can be used with either resistive or complex set impedances. Fig. 4 Equivalent circuit of UTC TEA1062N/TEA1062AN anti-sidetone bridge Fig. 5 Equivalent circuit of an anti-sidetone network in a wheatstone bridge configuration Iline 150 (mA) 130 (1) 110 (2) 90 (3) 70 Tamb (4) (1) 45°C (2) 55°C (3) 65°C (4) 75°C 50 30 2 4 6 8 10 Ptot 1068mW 934mW 800mW 666mW 12 VLN-VSLPE(V) Fig.6 UTC TEA1062N/TEA1062AN safe operating area UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 9 of 13 QW-R108-011.C TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT Fig.8 Supply arrangement Fig.9 Typical current Ip available from Vcc peripheral circuitry with Vcc≧2.2V. curve (a) is valid when the receiving amplifier is not driven or when MUTE =LOW (UTC TEA1062N is HIGH) .curve(b) is valid when MUTE=HIGH(UTC TEA1062N is LOW) and the receiving amplifier is driven; Vo(rms)=150mV,RL=150Ω.The supply possibilities can be increased simply by setting the voltage drop over the circuit VLN to a high value by means of resistor RVA connected between REG and SLPE. 7 7 MIC+ MIC+ 13 VCC (1) 7 MIC+ 6 MIC- VEE 6 MIC- (a) 6 9 (b) MIC- (c) Fig. 10 Alternative microphone arrangement (a) Magnetic or dynamic microphone. The resistor marked(1) may be connected to decrease the terminating impedance. (b) Electret microphone. (c) Piezoelectric microphone. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 10 of 13 QW-R108-011.C TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT (1) QR 4 QR 4 VEE 9 QR 4 VEE 9 (a) (2) VEE 9 (b) (c) Fig.11 Alternative receiver arrangement (a) Dynamic earpiece. (b) Magnetic earpiece. The resistor marked(1) may be connected to prevent distortion(inductive load) (c) Piezoelectric earpiece. The earpiece marked(2) is required to increase the phase margin (capacitive load) →Gv (dB) R6=∞ 0 -2 R9=20 (1) R6= 78.7k -4 (1) (2) (3) (2) R6= 110k -6 (3) R6= 140k 0 20 40 60 80 100 120 140 Iline (mA) Fig. 12 Variation of gain with line current, with R6 as a parameter. Rexch(Ω) 400 600 800 1000 R6(kΩ) 36 100 78.7 × × Vexch(V) 48 140 110 93.1 82 60 × × 120 102 Table 1 Values of resistor R6 for optimum line loss compensation for various usual values of exchange supply voltage (Vexch) and exchange feeding bridge resistance(Rexch);R9=20Ω. R1 620Ω 13 10 IR VCC 7 MIC+ Vi C1 100 μF 100 μF 1 LN QR 6 MIC- 5 GAR 11 DTMF 4 2 GAS1 12 MUTE 10 μF GAS2 3 VEE REG AGC STAB SLPE 9 Vi C3 4.7 μF 14 15 8 16 R6 R5 3.6kΩ R4 100kΩ C4 100pF C7 1nF R7 68kΩ RL 600Ω Vo 10 TO 140 mA C8 1nF C6 100pF R9 20Ω Fig.13 Test circuit defining voltage gain of MIC+, MIC- and DTMF inputs. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 11 of 13 QW-R108-011.C TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT Voltage gain is defined as: GV=20*log(|VO/VI|). For measuring the gain from MIC+ and MIC- the MUTE input should be HIGH(UTC TEA1062N is LOW) or open-circuit, for measuring the DTMF input MUTE should be LOW(UTC TEA1062N is HIGH) .Inputs not under test should be open-circuit. R1=620Ω 100 μF 1 13 VCC C2 LN 10 IR 7 MIC+ QR 10 μF R7 68kΩ GAS2 3 VEE REG AGC STAB Vi 10 TO 140 mA C7 1nF MUTE 9 600Ω C4 Vo 100pF R4 100kΩ GAS1 2 11 DTMF 12 4 GAR 5 6 MIC- C1 100μF ZL C3 4.7 μF 14 C8 1nF C6 100pF SLPE 15 8 16 R6 R5 3.6kΩ R9 20Ω Fig.14 Test circuit for defining voltage gain of the receiving amplifier. Voltage gain is defined as: GV=20*log(|VO/VI|). R1 620Ω R10 130Ω BAS11 (x2) Telephone Line BZX79 C12 R2 132kΩ C5 100nF C1 100 μF 13 1 LN 10 VCC IR C2 4 BZW14 (x2) R4 R3 3.92kΩ QR C4 100pF 5 GAR 7 C7 1nF 6 12 MUTE MICGAS1 2 C6 100pF GAS2 3 REG 14 AGC 15 R9 20Ω C8 1nF STAB VEE 8 9 R7 RVA(R16.R14) Zbal 11 From dial and control circuits MIC+ SLPE 16 R8 390Ω DTMF UTC TEAI062N UTC TEA1062AN C3 4.7 μF R6 R5 3.6kΩ Fig.15 Typical application of the UTC TEA1062AN, shown here with a piezoelectric earpiece and DTMF dialling. The bridge to the left, the Zener diode and R10 limit the current into the circuit and the voltage across the circuit during line transients. Pulse dialling or register recall required a different protection arrangement. The DC line voltage can be set to a higher value by resistor RVA(REG to SLPE). Fig.16 Typical applications of the UTC TEA1062N/TEA1062AN (simplified) The dashed lines show an optional flash (register recall by timed loop break). UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 12 of 13 QW-R108-011.C TEA1062N/TEA1062AN LINEAR INTEGRATED CIRCUIT UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 13 of 13 QW-R108-011.C