IRF IRF6802SDPBF

PD - 97769
IRF6802SDPbF
IRF6802SDTRPbF
DirectFET®plus Power MOSFET ‚
Typical values (unless otherwise specified)
RoHs Compliant Containing No Lead and Bromide 
VDSS
VGS
RDS(on)
RDS(on)
l Low Profile (<0.7 mm)
25V max ±16V max 3.2m@ 10V 4.5m@ 4.5V
l Dual Sided Cooling Compatible 
l Low Package Inductance
Qg tot Qgd
Qgs2
Qrr
Qoss Vgs(th)
l Optimized for High Frequency Switching 
8.8nC 3.1nC 1.1nC
22nC
13nC
1.6V
l Ideal for CPU Core DC-DC Converters
l Optimized for Control FET socket of Sync. Buck Converter
l Low Conduction and Switching Losses
G
G
D
D
l Compatible with existing Surface Mount Techniques 
S
S
l 100% Rg tested
l
DirectFET®plus ISOMETRIC
SA
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
SA
MQ
MX
MT
MP
MB
Description
The IRF6802SDTRPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET® packaging to
achieve improved performance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET® package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET®
package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6802SDTRPbF has low gate resistance and low charge along with ultra low package inductance providing significant reduction in
switching losses. The reduced losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6802SDTRPbF has been optimized for the control FET socket of synchronous buck
operating from 12 volt bus converters.
Absolute Maximum Ratings
Parameter
VDS
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
g
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
h
VGS, Gate-to-Source Voltage (V)
Typical RDS(on) (m)
10
ID = 16A
8
6
T J = 125°C
4
2
T J = 25°C
0
2
4
6
8
10
12
14
16
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
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e
e
f
14.0
ID= 13A
12.0
10.0
Max.
Units
25
±16
16
13
57
130
66
13
V
A
mJ
A
VDS= 20V
VDS= 13V
VDS= 6.0V
8.0
6.0
4.0
2.0
0.0
0
5
10
15
20
25
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 0.78mH, RG = 50, IAS = 13A.
1
03/21/12
IRF6802SDTRPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
VGS = 0V, ID = 250μA
Reference
to 25°C, ID = 1.0mA
V/°C
m VGS = 10V, ID = 16A
VGS = 4.5V, ID = 13A
Drain-to-Source Breakdown Voltage
25
–––
–––
VDSS/TJ
RDS(on)
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
–––
–––
0.02
3.2
–––
4.2
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
–––
1.1
–––
4.5
1.6
-5.9
5.9
2.1
–––
Drain-to-Source Leakage Current
–––
–––
–––
–––
1.0
150
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
–––
–––
160
–––
–––
–––
100
-100
–––
Total Gate Charge
Pre-Vth Gate-to-Source Charge
–––
–––
8.8
2.3
13
–––
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
–––
–––
1.1
3.1
2.3
–––
–––
–––
Output Charge
–––
–––
4.2
13
–––
–––
Gate Resistance
Turn-On Delay Time
Rise Time
–––
–––
–––
0.70
9.7
50
–––
–––
–––
Turn-Off Delay Time
Fall Time
–––
–––
13
23
–––
–––
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
1350
400
97
–––
–––
–––
Min.
Typ. Max. Units
VGS(th)
VGS(th)/TJ
IDSS
IGSS
gfs
Qg
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
RG
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Conditions
Typ. Max. Units
BVDSS
V
i
i
VDS = VGS, ID = 35μA
V
mV/°C VDS = VGS, ID = 35μA
μA VDS = 20V, VGS = 0V
nA
VDS = 20V, VGS = 0V, TJ = 125°C
VGS = 16V
VGS = -16V
S
VDS =13V, ID = 13A
nC
VDS = 13V
VGS = 4.5V
ID = 13A
See Fig.15
nC
VDS = 20V, VGS = 0V

ns
VDD = 13V, VGS = 4.5V
ID = 13A
i
RG= 1.5
See Fig.17
VGS = 0V
pF
VDS = 13V
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
VSD
trr
Qrr
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
g
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
26
–––
–––
130
–––
–––
1.0
V
–––
–––
18
22
27
33
ns
nC
A
Conditions
MOSFET symbol
showing the
D
G
integral reverse
p-n junction diode.
TJ = 25°C, IS = 13A, VGS = 0V
TJ = 25°C, IF = 13A
di/dt = 260A/μs
S
i
i
Notes:
‡ Pulse width  400μs; duty cycle  2%.
2
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IRF6802SDTRPbF
Absolute Maximum Ratings
Max.
Units
1.7
1.1
21
270
-40 to + 150
W
Parameter
el
el
f
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
°C
Thermal Resistance
Parameter
RJA
RJA
RJA
RJC
RJ-PCB
el
jl
kl
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Linear Derating Factor
f
e
Typ.
Max.
Units
–––
12.5
20
–––
1.0
72
–––
–––
5.9
–––
°C/W
0.014
W/°C
100
Thermal Response ( Z thJA )
D = 0.50
10
1
0.20
0.10
0.05
0.02
0.01
J
0.1
R1
R1
J
1
R2
R2
R3
R3
Ri (°C/W) i (sec)
R4
R4
A
2
1
2
3
3
4
A
4
Ci= iRi
Ci= iRi
0.01
0.001
1E-006
0.0001
6.820693
28.050
0.918995
2.9126
0.001521
11.738
0.074589
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-005
29.131
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient ƒ
Notes:
ˆ Used double sided cooling , mounting pad with large heatsink.
‰ Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
ƒ Surface mounted on 1 in. square Cu
(still air).
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Š R is measured at TJ of approximately 90°C.
‰ Mounted to a PCB with
small clip heatsink (still air)
‰ Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF6802SDTRPbF
1000
1000
ID, Drain-to-Source Current (A)
100
BOTTOM
10
TOP
ID, Drain-to-Source Current (A)
TOP
VGS
10V
5.0V
4.5V
3.5V
3.0V
2.8V
2.5V
2.3V
100
1
0.1
BOTTOM
10
60μs PULSE WIDTH
2.3V
0.01
0.1
1
10
100
0.1
10
100
Fig 5. Typical Output Characteristics
1000
1.6
VDS = 15V
60μs PULSE WIDTH
ID = 16A
Typical RDS(on) (Normalized)
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
100
10
T J = 150°C
T J = 25°C
T J = -40°C
1
0.1
1.4
V GS = 10V
V GS = 4.5V
1.2
1.0
0.8
0.6
1
2
3
4
5
-60 -40 -20 0
Fig 6. Typical Transfer Characteristics
100000
Fig 7. Normalized On-Resistance vs. Temperature
12
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
T J = 25°C
Typical RDS(on) ( m)
Ciss
1000
Coss
Crss
100
Vgs = 3.5V
Vgs = 4.0V
Vgs = 5.0V
Vgs = 7.0V
Vgs = 8.0V
Vgs = 10V
Vgs = 12V
Vgs = 15V
10
C oss = C ds + C gd
10000
20 40 60 80 100 120 140 160
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance(pF)
Tj = 150°C
1
VDS, Drain-to-Source Voltage (V)
8
6
4
2
10
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
60μs PULSE WIDTH
2.3V
Tj = 25°C
VGS
10V
5.0V
4.5V
3.5V
3.0V
2.8V
2.5V
2.3V
0
20
40
60
80
100
120
140
ID, Drain Current (A)
Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage
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IRF6802SDTRPbF
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
T J = 150°C
T J = 25°C
T J = -40°C
100
10
1
VGS = 0V
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
1msec
100μsec
10
DC
1
Ta = 25°C
Tj = 150°C
Single Pulse
0.1
0
0.01
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
0.1
1
10
100
VDS , Drain-toSource Voltage (V)
VSD, Source-to-Drain Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig 11. Maximum Safe Operating Area
2.2
Typical VGS(th) Gate threshold Voltage (V)
60
50
ID, Drain Current (A)
10msec
40
30
20
10
0
2.0
1.8
1.6
ID = 35μA
1.4
1.2
1.0
0.8
25
50
75
100
125
150
-75 -50 -25
T C , Case Temperature (°C)
0
25
50
75 100 125 150
T J , Temperature ( °C )
Fig 12. Maximum Drain Current vs. Case Temperature
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
EAS , Single Pulse Avalanche Energy (mJ)
300
ID
1.8A
2.6A
BOTTOM 13A
TOP
250
200
150
100
50
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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5
IRF6802SDTRPbF
Id
Vds
Vgs
L
VCC
DUT
0
20K
1K
Vgs(th)
S
Qgodr
Fig 15a. Gate Charge Test Circuit
Qgd
Qgs2 Qgs1
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
D.U.T
V
RGSG
20V
DRIVER
L
VDS
tp
+
- VDD
IAS
A
I AS
0.01
tp
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
VDS
VGS
RG
RD
VDS
90%
D.U.T.
+
- V DD
VGS
Pulse Width µs
Duty Factor 
10%
VGS
td(on)
Fig 17a. Switching Time Test Circuit
6
tr
t d(off) tf
Fig 17b. Switching Time Waveforms
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IRF6802SDTRPbF
Driver Gate Drive
D.U.T
ƒ
+
‚
RG
*
„
P.W.
Period
***
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D=
Period
VGS=10V
Circuit Layout Considerations
 Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
-
-

P.W.
+
V DD
**
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple  5%
* Use P-Channel Driver for P-Channel Measurements
** Reverse Polarity for P-Channel
ISD
*** VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for HEXFET® Power MOSFETs
DirectFET®plus Board Footprint, SA Outline
(Small Size Can, A-Designation).
Please see application note AN-1035 for all details regarding the assembly of DirectFET®plus.
This includes all recommendations for stencil and substrate designs.
G=GATE
D=DRAIN
S=SOURCE
D
D
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S
G
S
G
D
D
7
IRF6802SDTRPbF
DirectFET®plus Outline Dimension, SA Outline
(Small Size Can, A-Designation).
Please see application note AN-1035 for all details regarding the assembly of DirectFET®plus. This includes all
recommendations for stencil and substrate designs.
DIMENSIONS
METRIC
IMPERIAL
CODE MIN MAX MIN
MAX
A
4.75 4.85 0.187 0.191
B
3.70 3.95 0.146 0.156
C
2.75 2.85 0.108 0.112
D
0.35 0.45 0.014 0.018
0.48 0.52 0.019 0.020
E
0.48 0.52 0.019 0.020
F
0.68 0.72 0.027 0.028
G
0.83 0.87 0.033 0.034
H
J
0.38 0.42 0.015 0.016
J1
1.08 1.12 0.043 0.044
0.95 1.05 0.037 0.041
K
2.05 2.15 0.081 0.085
L
0.52 0.62 0.020 0.024
M
P
0.08 0.17 0.003 0.007
R
0.02 0.08 0.0008 0.0031
DirectFET®plus Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
Note: For the most current drawing please refer to IR website at http://www.irf.com/package
8
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IRF6802SDTRPbF
DirectFET®plus Tape & Reel Dimension (Showing component orientation).
E
A
B
D
C
F
G
H
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6802SDTRPBF). For 1000 parts on
7" reel, order IRF6802SDTR1PBF
REEL DIMENSIONS
STANDARD OPTION (QTY 4800)
TR1 OPTION (QTY 1000)
IMPERIAL
IMPERIAL
METRIC
METRIC
CODE
MIN
MIN
MAX
MIN
MIN
MAX
MAX
MAX
A
12.992
6.9
N.C
177.77
330.0
N.C
N.C
N.C
B
0.795
0.75
N.C
19.06
20.2
N.C
N.C
N.C
C
0.504
0.53
13.5
12.8
0.520
0.50
13.2
12.8
D
0.059
0.059
1.5
1.5
N.C
N.C
N.C
N.C
E
3.937
2.31
58.72
100.0
N.C
N.C
N.C
N.C
F
N.C
N.C
N.C
N.C
0.53
18.4
0.724
13.50
G
0.488
0.47
11.9
12.4
N.C
14.4
0.567
12.01
H
0.469
0.47
11.9
11.9
N.C
15.4
0.606
12.01
LOADED TAPE FEED DIRECTION
A
H
F
C
D
B
E
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
G
DIMENSIONS
IMPERIAL
METRIC
MIN
MIN
MAX
MAX
0.319
0.311
7.90
8.10
0.154
3.90
0.161
4.10
0.469
11.90
0.484
12.30
0.215
5.45
0.219
5.55
0.165
0.158
4.00
4.20
0.197
5.00
0.205
5.20
0.059
1.50
N.C
N.C
0.059
1.50
0.063
1.60
Note: For the most current drawing please refer to IR website at http://www.irf.com/package
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 03/2012
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9