GA50JT17-CAL Normally – OFF Silicon Carbide Junction Transistor VDS RDS(ON) ID (Tc = 25°C) hFE (Tc = 25°C) = = = = 1700 V 25 mΩ 100 A 95 Features 250°C maximum operating temperature Gate Oxide Free SiC switch Exceptional Safe Operating Area Excellent Gain Linearity Temperature Independent Switching Performance Low Output Capacitance Positive Temperature Co-efficient of RDS,ON Suitable for connecting an anti-parallel diode Advantages Applications Compatible with Si MOSFET/IGBT gate-drivers > 20 µs Short-Withstand Capability Lowest-in-class Conduction Losses High Circuit Efficiency Minimal Input Signal Distortion High Amplifier Bandwidth Down Hole Oil Drilling, Geothermal Instrumentation Hybrid Electric Vehicles (HEV) Solar Inverters Switched-Mode Power Supply (SMPS) Power Factor Correction (PFC) Induction Heating Uninterruptible Power Supply (UPS) Motor Drives Table of Contents Section I: Absolute Maximum Ratings .......................................................................................................... 1 Section II: Static Electrical Characteristics................................................................................................... 2 Section III: Dynamic Electrical Characteristics ............................................................................................ 2 Section IV: Figures .......................................................................................................................................... 3 Section V: Gate Drive Theory of Operation ................................................................................................... 5 Section VI: Mechanical Specifications .......................................................................................................... 6 Section VII: SPICE Model Parameters ........................................................................................................... 8 Section I: Absolute Maximum Ratings Parameter Drain – Source Voltage Continuous Drain Current Continuous Drain Current Continuous Gate Current Symbol VDS ID ID IG Turn-Off Safe Operating Area RBSOA Short Circuit Safe Operating Area SCSOA Reverse Gate – Source Voltage Reverse Drain – Source Voltage Storage Temperature VSG VSD Tstg Aug 2014 Conditions VGS = 0 V TC = 25°C TC = 145°C TVJ = 250 oC, Clamped Inductive Load TVJ = 250 oC, IG = 1 A, VDS = 1200 V, Non Repetitive Value 1700 100 50 3.5 ID,max = 50 @ VDS ≤ VDSmax Unit V A A A >20 µs 30 25 -55 to 250 V V °C http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ A Pg 1 of 7 Notes GA50JT17-CAL Section II: Static Electrical Characteristics Parameter Symbol Conditions Min. Value Typical Max. Unit Notes mΩ Fig. 5 V Fig. 4 – Fig. 5 μA Fig. 6 A: On State Drain – Source On Resistance RDS(ON) ID = 50 A, Tj = 25 °C ID = 50 A, Tj = 125 °C ID = 50 A, Tj = 250 °C Gate On Voltage VGS,ON ID = 50 A, VDS = 23 V, Tj = 25 °C ID = 50 A, VDS = 23 V, Tj = 250 °C hFE VDS = 5 V, ID = 50 A, Tj = 25 °C VDS = 5 V, ID = 50 A, Tj = 125 °C VDS = 5 V, ID = 50 A, Tj = 250 °C Drain Leakage Current IDSS VDS = 1700 V, VGS = 0 V, Tj = 25 °C VDS = 1700 V, VGS = 0 V, Tj = 125 °C VDS = 1700 V, VGS = 0 V, Tj = 250 °C Gate Leakage Current ISG VSG = 20 V, Tj = 25 °C DC Current Gain 25 33 43 3.5 3.3 95 56 49 B: Off State 1 1 1 20 nA Section III: Dynamic Electrical Characteristics Parameter Input Capacitance Reverse Transfer/Output Capacitance Output Capacitance Stored Energy Effective Output Capacitance, time related Effective Output Capacitance, energy related Gate-Source Charge Gate-Drain Charge Gate Charge - Total Symbol Ciss Crss/Coss EOSS Conditions VGS = 0 V, VDS = 1200 V, f = 1 MHz VDS = 1200 V, f = 1 MHz VGS = 0 V, VDS = 1200 V, f = 1 MHz Aug 2014 Value Typical 7205 120 86 Max. Unit Notes pF pF µJ Fig. 9 Fig. 9 Fig. 10 Coss,tr ID = constant, VGS = 0 V, VDS = 0…1200 V 194 pF Coss,er VGS = 0 V, VDS = 0…1200 V 139 pF QGS QGD QG VGS = -5…3 V VGS = 0 V, VDS = 0…1200 V 55 233 288 nC nC nC 0.59 Ω 0.09 Ω f = 1 MHz, V Gate Resistance, Internal Min. = 50 mV, V = 0 V, DS RG(INT-ZERO) V = 0 V, T AC GS j = 250 ºC RG(INT-ON) VGS > 2.5 V, VDS = 0 V, Tj = 250 ºC http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Pg 2 of 7 GA50JT17-CAL Section IV: Figures Figure 1: Typical Output Characteristics at 25 °C Figure 2: Typical Output Characteristics at 125 °C Figure 3: Typical Output Characteristics at 250 °C Figure 4: Drain-Source Voltage vs. Gate Current Figure 5: DC Current Gain and Normalized On-Resistance vs. Temperature Figure 6: DC Current Gain vs. Drain Current Aug 2014 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Pg 3 of 7 GA50JT17-CAL Figure 7: Typical Transfer Characteristics Figure 8: Typical Blocking Characteristics A: Dynamic Characteristic Figures Figure 9: Input, Output, and Reverse Transfer Capacitance Aug 2014 Figure 10: Output Capacitance Stored Energy http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Pg 4 of 7 GA50JT17-CAL Section V: Gate Drive Theory of Operation The SJT transistor is a current controlled transistor which requires a positive gate current for turn-on as well as to remain in on-state. An ideal gate current waveform for ultra-fast switching of the SJT, while maintaining low gate drive losses, is shown in Figure 11. Figure 11: Idealized Gate Current Waveform Gate Currents, IG,pk/-IG,pk and Voltages during Turn-On and Turn-Off An SJT is rapidly switched from its blocking state to on-state, when the necessary gate charge, QG, for turn-on is supplied by a burst of high gate current, IG,on, until the gate-source capacitance, CGS, and gate-drain capacitance, CGD, are fully charged. , The IG,pon pulse should ideally terminate, when the drain voltage falls to its on-state value, in order to avoid unnecessary drive losses during the steady on-state. In practice, the rise time of the IG,on pulse is affected by the parasitic inductances, Lpar in the package and drive circuit. A voltage developed across the parasitic inductance in the source path, Ls, can de-bias the gate-source junction, when high drain currents begin to flow through the device. The applied gate voltage should be maintained high enough, above the VGS,ON level to counter these effects. A high negative peak current, -IG,off is recommended at the start of the turn-off transition, in order to rapidly sweep out the injected carriers from the gate, and achieve rapid turn-off. While satisfactory turn off can be achieved with VGS = 0 V, a negative gate voltage VGS may be used in order to speed up the turn-off transition. Steady On-State After the device is turned on, IG may be advantageously lowered to IG,steady for reducing unnecessary gate drive losses. The IG,steady is determined by noting the DC current gain, hFE, of the device The desired IG,steady is determined by the peak device junction temperature TJ during operation, drain current ID, DC current gain hFE, and a 50 % safety margin to ensure operating the device in the saturation region with low on-state voltage drop by the equation: , Aug 2014 , 1.5 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Pg 5 of 7 GA50JT17-CAL Section VI: Mechanical Specifications Raster Size 4.35 x 4.35 mm 2 171 x 171 mil 2 Area total / active 18.92/16.56 mm 2 29330/25677 mil 2 Thickness 360 µm 14 mil Wafer Size 100 mm 3937 mil Flat Position 0 deg 0 deg Passivation frontside Polyimide Pad Metal (Anode) 4000 nm Al Backside Metal (Cathode) 400 nm Ni + 200 nm Au -system Die Bond Electrically conductive glue or solder Wire Bond Al ≤ 10 mil (Source) Al ≤ 5 mil (Gate) Reject ink dot size Φ ≥ 0.3 mm Store in original container, in dry nitrogen, Recommended storage environment < 6 months at an ambient temperature of 23 °C Chip Dimensions: A C D mm mil A 4.35 171 B 4.35 171 C 3.30 130 D 1.75 69 E 0.24 9 GATE F 0.46 18 WIREBONDABLE G 0.57 22 DIE SOURCE F B E WIREBONDABLE G D Aug 2014 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Pg 6 of 7 GA50JT17-CAL Revision History Date Revision Comments 2014/08/26 1 Updated Electrical Characteristics 2014/06/20 0 Initial release Supersedes Published by GeneSiC Semiconductor, Inc. 43670 Trade Center Place Suite 155 Dulles, VA 20166 GeneSiC Semiconductor, Inc. reserves right to make changes to the product specifications and data in this document without notice. GeneSiC disclaims all and any warranty and liability arising out of use or application of any product. No license, express or implied to any intellectual property rights is granted by this document. Unless otherwise expressly indicated, GeneSiC products are not designed, tested or authorized for use in life-saving, medical, aircraft navigation, communication, air traffic control and weapons systems, nor in applications where their failure may result in death, personal injury and/or property damage. Aug 2014 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Pg 7 of 7 GA50JT17-CAL Section VII: SPICE Model Parameters This is a secure document. Please copy this code from the SPICE model PDF file on our website (http://www.genesicsemi.com/images/products_sic/sjt/GA50JT17-CAL_SPICE.pdf) into LTSPICE (version 4) software for simulation of the GA50JT17-CAL. * MODEL OF GeneSiC Semiconductor Inc. * * $Revision: 2.0 $ * $Date: 25-AUG-2014 $ * * GeneSiC Semiconductor Inc. * 43670 Trade Center Place Ste. 155 * Dulles, VA 20166 * * COPYRIGHT (C) 2014 GeneSiC Semiconductor Inc. * ALL RIGHTS RESERVED * * These models are provided "AS IS, WHERE IS, AND WITH NO WARRANTY * OF ANY KIND EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED * TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE." * Models accurate up to 2 times rated drain current. * .model GA50JT17 NPN + IS 5.00E-47 + ISE 1.26E-28 + EG 3.23 + BF 91 + BR 0.55 + IKF 9000 + NF 1 + NE 2 + RB 0.95 + IRB 0.005 + RBM 0.073 + RE 0.005 + RC 0.014 + CJC 2.398E-9 + VJC 2.8346 + MJC 0.4846 + CJE 6.026E-09 + VJE 3.1791 + MJE 0.5295 + XTI 3 + XTB -1.5 + TRC1 9.00E-3 + VCEO 1700 + ICRATING 50 + MFG GeneSiC_Semiconductor * * End of GA50JT17 SPICE Model Aug 2014 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Pg1 of 1