SiP2204 www.vishay.com Vishay Siliconix Quad Channel Monolithic Power Stage DESCRIPTION FEATURES The SiP2204 is a quad channel, fully-integrated monolithic power stage optimized for multi-phase synchronous buck applications. The part has very fast propagation to enable switching frequencies of up to 10 MHz/channel and offers a high power density design for use in applications such as envelope tracking power supplies for RF Power amplifiers used in next generation 4G base stations. • QFN32 5x5 package Packaged in QFN32 5x5, SiP2204 supports input voltages up to 24 V and delivers 500 mA continuous current for each channel. • Low PWM propagation delay (typical 13 ns) The SiP2204 incorporates four independent MOSFET gate driver ICs that work with both 3.3 V and 5 V PWM inputs. • Power stage input up to 24 V • 500 mA per channel continuous current • 2 A per channel peak current capability • High frequency operation beyond 5 MHz • 3.3 V / 5 V PWM logic • Enable feature to put the output at high impedance when disabled • Junction temperature: -40 °C to +125 °C APPLICATIONS • Envelope tracking (ET) supplies for RF power amplifiers (LDMOS, GaAs FET, GaAs HBT or GaN based) • Synchronous buck converters TYPICAL APPLICATION CIRCUIT VIN12 VDRV12 VZ12 VCIN EN SW1 PWM1 AGND PGND Fig. 1 - Typical Application Circuit for SiP2204 (channel 1 shown) S15-0515-Rev. A, 23-Mar-15 Document Number: 62619 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP2204 www.vishay.com Vishay Siliconix ABSOLUTE MAXIMUM RATINGS ELECTRICAL PARAMETER CONDITIONS LIMIT VINx -0.3 to +26 VCIN -0.3 to +6 Input Voltage Control Logic Supply Voltage Low-side Driver Supply Voltage VDRVx Switch Node (DC voltage) -0.3 to +6 -0.3 to +26 SWX Switch Node (AC voltage) (1) High-side Regulator Output Monitor Voltage V 29 VZX (VINX - 6) to VINX and VZx > -0.3 V All Logic Inputs and Outputs (PWMX and EN) -0.3 to VCIN + 0.3 Max. Operating Junction Temperature TJ 150 Ambient Temperature TA -40 to +125 Storage Temperature Tstg -65 to +150 Human body model, JESD22-A114 3000 Charged device model, JESD22-C101 1000 Electrostatic Discharge Protection UNIT °C V Notes • Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. (1) The specification values indicated “AC” is SW to P X GND, 29 V (< 50 ns), max. RECOMMENDED OPERATING RANGE ELECTRICAL PARAMETER Input Voltage (VINx) MINIMUM TYPICAL MAXIMUM 10 - 24 Low-side Driver Supply Voltage (VDRVx) 4.5 5 5.5 Control Logic Supply Voltage (VCIN) 4.5 5 5.5 Thermal Resistance from Junction to PCB - 25 - Thermal Resistance from Junction to Case - 1 - S15-0515-Rev. A, 23-Mar-15 UNIT V °C/W Document Number: 62619 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP2204 www.vishay.com Vishay Siliconix PIN CONFIGURATION VZ 12 - 25 PGND - 27 VDRV 12 - 26 PGND - 28 SW - 30 SW 1 - 29 VIN 12 - 31 VIN 12 - 32 24 - AGND SW 2 - 1 SW 2 - 2 PGND - 3 PGND - 4 PGND - 5 PGND - 6 SW 3 - 7 SW 3 - 8 23 - VCIN 22 - PWM 1 33 - AGND 21 - PWM 2 20 - PWM 3 19 - PWM 4 18 - EN VZ 34 - 16 PGND - 14 VDRV 34 - 15 PGND - 13 SW 4 - 12 SW 4 - 11 VIN 34 - 9 VIN 34 - 10 17 - AGND Fig. 2 - Pin Configuration for SiP2204 PIN CONFIGURATION PIN NUMBER PIN NAME 1, 2 SW2 Channel 2 driver output PIN DESCRIPTION 3 to 6, 13, 14, 27, 28 PGND Low-side driver power return for all channels Channel 3 driver output 7, 8 SW3 9, 10 VIN34 Power stage input voltage and high-side driver power supply for channel 3 and 4 11, 12 SW4 Channel 4 driver output 15 VDRV34 16 VZ34 18 EN 19 PWM4 Channel 4 PWM input (In phase with SW) 20 PWM3 Channel 3 PWM input (In phase with SW) 21 PWM2 Channel 2 PWM input (In phase with SW) 22 PWM1 Channel 1 PWM input (In phase with SW) 23 VCIN Supply voltage for internal logic circuitry 17, 24, 33 AGND Analog ground 25 VZ12 26 VDRV12 Low-side driver power supply for channel 3 and 4 High-side regulator output monitor for channel 3 and 4 Global enable pin. Active high. High-side regulator output monitor for channel 1 and 2 Low-side driver power supply for channel 1 and 2 29, 30 SW1 Channel 1 driver output 31, 32 VIN12 Power stage input voltage and high-side driver power supply for channel 1 and 2 S15-0515-Rev. A, 23-Mar-15 Document Number: 62619 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP2204 www.vishay.com Vishay Siliconix ELECTRICAL SPECIFICATIONS PARAMETER SYMBOL TEST CONDITION UNLESS OTHERWISE SPECIFIED VDRVX = VCIN = EN = 5 V, VINX = 15 V, VINX - VZX = 5 V, no load, PWM rise and fall time = 2 ns TA = 25 °C for typical value JUNCTION TEMPERATURE -40 °C to +125 °C unless otherwise specified MIN. TYP. UNIT MAX. POWER SUPPLY Power Stage Input and High-side Driver Supply Current Control Logic and Low-side Driver Supply Current IVIN IVCIN + IVDRV EN = 0 V, PWMX = 0 V - - 1 PWMX = 0 V - 90 130 PWMX = 3.3 V (80k pull-up on high-side gate) - 230 330 Fsw = 4 MHz, D = 10 %, one channel - 14 27.5 EN = 0 V, no switching, PWM = 0 - - 1 PWMX = 0 V (80k pull-down on low-side gate) - 370 530 PWMX = 3.3 V - 90 130 Fsw = 4 MHz, D = 10 %, one channel - 5 8 μA mA μA mA PWMx/EN LOGIC (ALSO SEE TIMING DIAGRAM BELOW FOR ILLUSTRATION) PWMx/EN Rising Threshold VTH_R 2.4 - - PWMx/EN Falling Threshold VTH_F - - 0.8 PWMX Supply Current IPWM PWMX = 5 V - - 1 EN Supply Current IEN REN = 1 MΩ to AGND - - 8 PWM ON Time (1) tPWM_ON 12 - - 8 15 22 PWM Rising Propagation Delay tPD_R_PWM From PWM rises to 1.7 V to SW rises to 1.5 V; 25 °C From PWM rises to 1.7 V to SW rises to 1.5 V - - 25 From PWM falls to 1.7 V to SW falls to 1.5 V; 25 °C 7 18 26 From PWM falls to 1.7 V to SW falls to 1.5 V - - 30 From PWM rises to 1.7 V to SW rises to 1.5 V; 25 °C - 0.4 0.75 From PWM rises to 1.7 V to SW rises to 1.5 V - - 1 tPD_EN From EN rise to VCIN to SW start switching - 5 - Low-side ON Resistance RDS(on)_N Isw = 0.1 A - 0.35 0.56 High-side ON Resistance RDS(on)_P Isw = 0.1 A, VIN - VZ = 5 V - 0.55 0.92 PWM Falling Propagation Delay tPD_F_PWM PWM Propagation Delay Matching (2) tPD_M_PWM EN Propagation Delay V μA ns μs OUTPUT DRIVER Ω Notes (1) Guaranteed by design. (2) Difference between the maximum and minimum PWM propagation delay among 4 channels. S15-0515-Rev. A, 23-Mar-15 Document Number: 62619 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP2204 www.vishay.com Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM VINX High Slide Regular VCIN VZX Control and BBM EN SWX VDRVX PWMX AGND PGND Device includes four equivalent blocks Fig. 3 - Functional Block Diagram for SiP2204 ORDERING INFORMATION PART NUMBER PACKAGE MARKING (LINE 2: P/N) SiP2204EMP-T1-GE4 QFN32 5x5 SiP2204 SiP2204DB Reference board P/N FYWLL Format: Line 1: Dot Line 2: Part number code Line 2: Siliconix logo + ESD symbol Line 3: Factory code + year code + work week code + lot code S15-0515-Rev. A, 23-Mar-15 Document Number: 62619 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP2204 www.vishay.com Vishay Siliconix TIMING WAVEFORMS VIN = 15 V SWX tR = 2 ns VCIN = 5 V PWM high = 3.3 V PWM low = 0 V tR= 2 ns PWMX EN ENTDR PWMTDR 1.7 V 10 % VIN SWX Fig. 4 - Timing Waveform for SiP2204 Fig. 5 - Timing Waveform for SiP2204 DETAILED OPERATIONAL DESCRIPTION PWM Input Ground Connections (AGND and PGND) The PWM input receives the PWM control signal from the VR controller IC. The PWM input is designed to be compatible with standard controllers using two state logic (H and L) on the PWM output. For two state logic, the PWM input operates as follows. When PWM is driven above VTH_PWM_R the low-side is turned OFF and the high-side is turned ON. When PWM input is driven below VTH_PWM_F the high-side turns OFF and the Low-side turns ON. The SiP2204 incorporates PWM voltage thresholds that is compatible with 3.3 V and 5 V logic. PGND (power ground) should be externally connected to AGND (analog ground). The layout of the printed circuit board should be such that the inductance separating the AGND and PGND should be a minimum. Transient differences due to inductance effects between these two pins should not exceed 0.5 V. Enable (EN) In the low state, the EN pin shuts down the device. In this state, standby current is minimized. If EN is left unconnected, an internal pull-down resistor will pull the pin to AGND and shuts down the device. The EN pin is a global enable for all four channels when driven above VTH_EN_R. Control and Drive Supply Voltage Input (VDRV, VCIN) VCIN is the bias supply for the logic control circuitry of the IC. VDRVx is the bias supply for the low-side gate drivers. It is recommended to separate these pins through a resistor. This creates a low pass filtering effect to avoid coupling of high frequency gate drive noise into the logic circuitry. High-Side Regulator Output Monitor (VZ) VZ12 and VZ34 are the output monitors for the high-side regulators. VZX is regulated to 5 V below VIN (typical). Voltage Input (VIN) The power input to the drain of the high-side power MOSFET and the high-side driver supply. This pin is connected to the high power intermediate BUS rail. An 80 kΩ resistor is connected between the high-side gate and VIN. Switch Node (SWX) The switch node, SW, is the circuit power stage output. This is the output applied to the power inductor and output filter to deliver the output for the buck converter. S15-0515-Rev. A, 23-Mar-15 Document Number: 62619 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP2204 www.vishay.com Vishay Siliconix ELECTRICAL CHARACTERISTICS (VOUT = 2 V, VCIN = VDRVx = 5 V, L = 4.7 μH, unless otherwise noted) 100 100 90 90 80 Efficiency (%) Efficiency (%) 80 70 60 50 70 60 50 40 40 30 30 20 20 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 0 2 0.2 0.4 0.6 0.8 IOUT (A) Fig. 6 - Efficiency vs. IOUT VIN = 8 V, fSW = 1 MHz 1 1.2 IOUT (A) 1.4 1.6 1.8 2 Fig. 9 - Efficiency vs. IOUT VIN = 10 V, fSW = 5 MHz 100 100 90 90 80 Efficiency (%) Efficiency (%) 80 70 60 50 70 60 50 40 40 30 30 20 0 20 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 0.2 0.4 0.6 2 1 1.2 1.4 1.6 1.8 2 1.6 1.8 2 IOUT (A) IOUT (A) Fig. 7 - Efficiency vs. IOUT VIN = 8 V, fSW = 5 MHz Fig. 10 - Efficiency vs. IOUT VIN = 12 V, fSW = 1 MHz 100 100 90 90 80 80 Efficiency (%) Efficiency (%) 0.8 70 60 50 70 60 50 40 40 30 30 20 20 0 0.2 0.4 0.6 0.8 1 1.2 1.4 IOUT (A) Fig. 8 - Efficiency vs. IOUT VIN = 10 V, fSW = 1 MHz S15-0515-Rev. A, 23-Mar-15 1.6 1.8 2 0 0.2 0.4 0.6 0.8 1 1.2 IOUT (A) 1.4 Fig. 11 - Efficiency vs. IOUT VIN = 12 V, fSW = 5 MHz Document Number: 62619 7 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP2204 www.vishay.com Vishay Siliconix 100 100 90 90 80 80 Efficiency (%) Efficiency (%) ELECTRICAL CHARACTERISTICS (VOUT = 2 V, VCIN = VDRVx = 5 V, L = 4.7 μH, unless otherwise noted) 70 60 70 60 50 50 40 40 30 30 20 20 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 0 2 0.2 0.4 0.6 0.8 IOUT (A) 1.4 1.6 1.8 2 1.6 1.8 2 Fig. 14 - Efficiency vs. IOUT VIN = 18 V, fSW = 1 MHz Fig. 12 - Efficiency vs. IOUT VIN = 15 V, fSW = 1 MHz 100 100 90 90 80 80 Efficiency (%) Efficiency (%) 1 1.2 IOUT (A) 70 60 50 70 60 50 40 40 30 30 20 20 0 0.2 0.4 0.6 0.8 1 1.2 1.4 IOUT (A) Fig. 13 - Efficiency vs. IOUT VIN = 15 V, fSW = 5 MHz S15-0515-Rev. A, 23-Mar-15 1.6 1.8 2 0 0.2 0.4 0.6 0.8 1 1.2 IOUT (A) 1.4 Fig. 15 - Efficiency vs. IOUT VIN = 18 V, fSW = 5 MHz Document Number: 62619 8 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP2204 www.vishay.com Vishay Siliconix ELECTRICAL CHARACTERISTICS (VIN = 15 V, VOUT = 2 V, VCIN = VDRVx = 5 V, IOUT = 0.5 A, fSW = 5 MHz, L = 4.7 μH, unless otherwise noted) CH1 CH3 Fig. 16 - Output Switching Waveform CH1 (YLLW) = SW1 (5 V/div.), Time = 10 ns/div. CH2 Fig. 19 - Output Switching Waveform CH3 (YLLW) = SW3 (5 V/div.), Time = 10 ns/div. CH4 Fig. 17 - Output Switching Waveform CH2 (YLLW) = SW2 (5 V/div.), Time = 10 ns/div. Fig. 20 - Output Switching Waveform CH4 (YLLW) = SW4 (5 V/div.), Time = 10 ns/div. PWMX PWMX CH 1, 2, 3, 4 CH 1, 2, 3, 4 Fig. 18 - Propagation Delay - Rising (all channels) CH1 = (VLT) = SW1 (5 V/div.), CH2 = (RED) = SW2 (5 V/div.), CH3 = (BLU) = SW3 (5 V/div.), CH4 = (GRN) = SW4 (5 V/div.), PWMX (YLLW) = 2 V/div., Time = 5 ns/div. S15-0515-Rev. A, 23-Mar-15 Fig. 21 - Propagation Delay - Falling (all channels) CH1 = (VLT) = SW1 (5 V/div.), CH2 = (RED) = SW2 (5 V/div.), CH3 = (BLU) = SW3 (5 V/div.), CH4 = (GRN) = SW4 (5 V/div.), PWMX (YLLW) = 2 V/div., Time = 5 ns/div. Document Number: 62619 9 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 - JUMPER 2 1 1uF 2 50 R12 J14 JUMPER C25 50 R11 10k R8 10k R7 DNP Y Vcc Y Y Vcc NC7SZ125 DNP R17 DNP Vee A OE U4 R16 Vee A OE Vcc U3 NC7SZ125 R15 Vee A OE U2 NC7SZ125 R13 0 C34 1uF Vcin 1 2 JUMPER J18 1uF GND TP4 17 18 19 20 21 22 23 24 Vin GND J5 DNP C29 AGND EN PWM4 PWM3 PWM2 PWM1 CIN AGND C1 R1 C10 1uF R4 TBA 2.2uF 2.2uF TBA C18 TP13 C17 GND 2.2uF TBA C21 10uF C8 2.2uF C7 TBA Vo1 TP7 10uF SiP2204 16 J17 1 J13 JUMPER 1uF 50 R10 10k R6 R14 DNP Y Vcc 14 + + J16 2 Vee A Vcc U1 NC7SZ125 OE C13 15 JUMPER C24 1 1uF J12 JUMPER C23 50 R9 10k R5 Vcin 1uF C9 C2 C14 13 - - + JUMPER J15 2 Vcc TP2 TP3 DNP C28 GND 12 PWM4 - 1 1uF J11 JUMPER C22 IC1 Vin GND VZ34 11 PWM3 PWM2 PWM1 + 2 1 1 TP8 VDVR34 Vcin 2 VZ12 PGND 1 VDVR12 SW4 1 1 1 SW4 2 PGND PGND 1 SW1 1 25 SW1 Vo4 TP14 1 0.68uH L4 10 9 8 7 6 5 4 3 2 1 32 Vin C30 GND TP16 Vin 10nF Vin TP5 10uF C32 TBA TP15 C11 1 0.68uH L3 GND TP6 C19 10uF 0.68uH L2 C20 TBA R3 TBA TBA R2 10nF 31 C26 C12 10nF Vo4 J4 VIN34 VIN34 SW3 SW3 PGND PGND PGND PGND SW2 SW2 VIN12 VIN12 0.68uH L1 Vo1 J1 1 10nF 10uF C31 2.2uF C5 2.2uF C3 Vin C27 1 1 Vcin 26 PGND 1 27 10uF C33 2.2uF C6 2.2uF C4 Vin J9 GND J10 10uF C16 10uF C15 Vo2 TP10 GND TP9 1 28 1 29 GND J6 Vo2 J2 GND TP11 1 S15-0515-Rev. A, 23-Mar-15 30 Vo3 TP12 1 J8 J7 Vo3 J3 GND SiP2204 www.vishay.com Vishay Siliconix DEMO BOARD SCHEMATIC Fig. 22 - Reference Board Schematic for SiP2204 Document Number: 62619 10 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP2204 www.vishay.com Vishay Siliconix BILL OF MATERIALS ITEM QTY. REFERENCE COMPONENT VALUE PCB FOOTPRINT 1 8 C1, C2, C3, C4, C5, C6, C7, C8 2.2 μF, 6.3 V 0805 2 4 C9, C10, C13, C34 1 μF, 6.3 V 0402 3 4 C11, C12, C26, C27 10 nF, 25 V 0805 4 4 C14, C15, C16, C17 10 μF, 6.3 V 1206 5 4 C18, C19, C20, C21 DNP 0603 6 4 C22, C23, C24, C25 1 μF, 10 V 0603 7 2 C28, C29 DNP 0603 8 4 C30, C31, C32, C33 10 μF, 25 V 1210 9 1 IC1 SiP2204 QFN5x5-32 10 1 J1 Vo1 Banana 11 1 J2 Vo2 Banana 12 1 J3 Vo3 Banana 13 1 J4 Vo4 Banana 14 5 J5, J6, J7, J8, J10 GND Banana 15 1 J9 VIN Banana 16 8 J11, J12, J13, J14, J15, J16, J17, J18 JUMPER Jumper2 17 4 L1, L2, L3, L4 4.7 μH IHLP2525A 18 4 PWM1, PWM2, PWM3, PWM4 SMA connect SMA 19 4 R1, R2, R3, R4 DNP R0805-Vishay 20 4 R5, R6, R7, R8 10K R0805-Vishay 21 4 R9, R10, R11, R12 50 R1206-Vishay 22 1 R13 0 R0805-Vishay 23 4 R14, R15, R16, R17 DNP R0603-Vishay 24 1 TP2 Vcin TP30 25 1 TP3 VCC TP30 26 7 TP4, TP6, TP8, TP9, TP11, TP13, TP16 GND TP30 27 2 TP5, TP15 VIN TP30 28 1 TP7 Vo1 TP30 29 1 TP10 Vo2 TP30 30 1 TP12 Vo3 TP30 31 1 TP14 Vo4 TP30 32 4 U1, U2, U3, U4 NC7SZ125 SOT23-5 S15-0515-Rev. A, 23-Mar-15 Document Number: 62619 11 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP2204 www.vishay.com Vishay Siliconix PCB LAYOUT OF REFERENCE BOARD Fig. 23 - Top Layer Fig. 25 - Inner 2 Fig. 24 - Inner 1 Fig. 26 - Bottom S15-0515-Rev. A, 23-Mar-15 Document Number: 62619 12 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP2204 www.vishay.com Vishay Siliconix RECOMMANDED PADS FOR QFN32 5 x 5 5.3 3.2 32 x 0.63 3.2 32 x 0.28 5.3 0.5 pitch Dimension are in millimeters S15-0515-Rev. A, 23-Mar-15 Document Number: 62619 13 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP2204 www.vishay.com Vishay Siliconix PACKAGE DRAWING D2 A D Pin 1 location indentifier (5) B 32 31 30 29 28 27 26 25 K Pin 1 location indentifier (5) 25 26 27 28 29 30 31 32 0.1 C L 1 24 24 1 2 23 23 2 3 22 22 3 4 21 21 4 5 20 20 5 E 6 19 19 6 7 18 18 7 8 17 17 8 9 10 11 12 13 14 15 16 Terminal Tip (4) 0.1 C 16 15 14 13 12 11 10 e 9 E2 b 0.1 M C A B Bottom view Top view 0.1 C C A 0.1 C Seating plane Side view DIM. A1 A3 MILLIMETERS INCHES MIN. NOM. MAX. MIN. NOM. MAX. A 0.75 0.85 0.95 0.029 0.033 0.037 A1 0.00 - 0.05 0.000 - 0.002 A3 b 0.20 ref. 0.18 D D2 0.25 0.008 ref. 0.30 0.007 5.00 BSC 3.00 3.10 0.010 0.012 0.197 BSC 3.20 0.118 0.122 e 0.50 BSC 0.020 BSC E 5.00 BSC 0.197 BSC 0.126 E2 3.00 3.10 3.20 0.118 0.122 0.126 K 0.20 - - 0.008 - - L 0.30 0.40 0.50 0.012 0.016 0.020 N (3) 32 32 Nd (3) 8 8 Ne (3) 8 8 Notes (1) Use millimeters as the primary measurement (2) Dimensioning and tolerances conform to ASME Y14.5M. - 1994 (3) N is the number of terminals, Nd is the number of terminals in X-direction and Ne is the number of terminals in Y-direction. (4) Dimension b applies to plated terminal and is measured between 0.15 mm and 0.30 mm from terminal tip (5) The pin #1 identifier must be existed on the top surface of the package by using indentation mark or other feature of package body (6) Package warpage max. 0.05 mm Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?62619. S15-0515-Rev. A, 23-Mar-15 Document Number: 62619 14 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix QFN32 5 x 5 Case Outline D2 A D Pin 1 location indentifier (5) B 32 31 30 29 28 27 26 25 K Pin 1 location indentifier (5) 25 26 27 28 29 30 31 32 0.1 C L 1 24 24 1 2 23 23 2 3 22 22 3 4 21 21 4 5 20 20 5 E 6 19 19 6 7 18 18 7 8 17 17 8 9 10 11 12 13 14 15 16 Terminal Tip (4) 0.1 C 16 15 14 13 12 11 10 e 9 E2 b 0.1 M C A B Bottom view Top view 0.1 C C A 0.1 C Seating plane Side view DIM. A1 A3 MILLIMETERS INCHES MIN. NOM. MAX. MIN. NOM. MAX. A 0.75 0.85 0.95 0.029 0.033 0.037 A1 0.00 - 0.05 0.000 - 0.002 0.30 0.007 A3 b 0.20 ref. 0.18 D D2 0.25 0.008 ref. 5.00 BSC 3.00 3.10 0.010 0.012 0.197 BSC 3.20 0.118 0.122 e 0.50 BSC 0.020 BSC E 5.00 BSC 0.197 BSC 0.126 E2 3.00 3.10 3.20 0.118 0.122 0.126 K 0.20 - - 0.008 - - L 0.30 0.40 0.50 0.012 0.016 0.020 N (3) 32 32 Nd (3) 8 8 Ne (3) 8 8 Notes (1) Use millimeters as the primary measurement (2) Dimensioning and tolerances conform to ASME Y14.5M. - 1994 (3) N is the number of terminals, Nd is the number of terminals in X-direction and Ne is the number of terminals in Y-direction. (4) Dimension b applies to plated terminal and is measured between 0.15 mm and 0.30 mm from terminal tip (5) The pin #1 identifier must be existed on the top surface of the package by using indentation mark or other feature of package body (6) Package warpage max. 0.05 mm S14-2079-Rev. A, 20-Oct-14 DWG: 6027 Document Number: 67244 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Revision: 20-Oct-14 PAD Pattern www.vishay.com Vishay Siliconix Recommended Land Pattern QFN32 5 x 5 5.3 3.2 32 x 0.63 3.2 32 x 0.28 5.3 0.5 x pitch Dimensions are in millimeters Revision: 02-Oct-14 Document Number: 63414 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Material Category Policy Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000