5 4 3 2 1 D D DM5865 C ~ 4 Channel 720H Video Decoder ~ Pin Compatible with TW2865 C B B A A DAVICOM Semiconductor,Inc. Title DM5865_REF 5 4 3 Size A4 DM5865 Date: Thursday, November 07, 2013 2 Document Number Rev 1.0 1 Sheet 1 of 3 5 4 3 VDD_3V3 VDD_1V8 VDD_1V8VD VDD_1V8A 1 VDD_1V8PLL C5 C6 C7 C8 4 2 J2 J1 RCA JACK_0 1 C2 R1 13 4 39 AGND INA0 R2 34 28 11 1 20 19 12 27 0.1uF AVDD_2 AVDD_1 C4 VDDA VDDA C3 VDDV VDDV VDDV VDDV + C1 47uF/16V 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF VDDI VDDI VDDI VDDI VDDI VDDI BEAD VDDO VDDO VDDO VDDO VDDO 3 L1 D 78 60 41 94 110 128 VDD_1V8 120 53 68 84 102 1V8 2 39 VDD_1V8VD 2 1 3 L2 5 4 + C10 C11 C12 C13 C14 J3 RCA JACK_0 1 AGND C9 R3 17 S-VIDEO 2 BEAD 47uF/16V 0.1uF 0.1uF 0.1uF 0.1uF 39 AGND 3 4 C17 C18 J5 2 + C16 47uF/16V 0.1uF 0.1uF 4 oCCIRD_2[7] oCCIRD_2[6] oCCIRD_2[5] oCCIRD_2[4] oCCIRD_2[3] oCCIRD_2[2] oCCIRD_2[1] oCCIRD_2[0] J4 RCA JACK_0 1 AGND R5 C15 14 39 AGND INB0 R6 0.1uF VDD_1V8A 5 4 J6 RCA JACK_0 1 AGND R7 C19 18 + C20 C21 2 S-VIDEO BEAD oCCIRD_1[7] oCCIRD_1[6] oCCIRD_1[5] oCCIRD_1[4] oCCIRD_1[3] oCCIRD_1[2] oCCIRD_1[1] oCCIRD_1[0] 1 3 2 L4 VD3_7 VD3_6 VD3_5 VD3_4 VD3_3 VD3_2 VD3_1 VD3_0 69 70 71 72 74 75 76 77 VD2_7 VD2_6 VD2_5 VD2_4 VD2_3 VD2_2 VD2_1 VD2_0 85 86 87 88 90 91 92 93 VD1_7 VD1_6 VD1_5 VD1_4 VD1_3 VD1_2 VD1_1 VD1_0 98 99 100 101 103 104 105 106 VD0_7 VD0_6 VD0_5 VD0_4 VD0_3 VD0_2 VD0_1 VD0_0 3 39 AGND 56 57 58 59 61 62 63 64 C22 47uF/16V 0.1uF 0.1uF 39 AGND 0.1uF 39 3 4 2 J8 4 3 2 1 INB1 R8 AGND AGND VD3[7:0] Note 1. VD0[7:0] 2. VD1[7:0] 3. VD2[7:0] 4. VD3[7:0] 0.1uF 39 VDD_1V8PLL AGND BEAD INA1 R4 AGND L3 D oCCIRD_3[7] oCCIRD_3[6] oCCIRD_3[5] oCCIRD_3[4] oCCIRD_3[3] oCCIRD_3[2] oCCIRD_3[1] oCCIRD_3[0] 3 J7 RCA JACK_0 1 AGND R9 21 39 AGND oCCIRD_0[7] oCCIRD_0[6] oCCIRD_0[5] oCCIRD_0[4] oCCIRD_0[3] oCCIRD_0[2] oCCIRD_0[1] oCCIRD_0[0] C23 INA2 R10 0.1uF VD2[7:0] & & & & VD0_CLK走線盡量等長 VD1_CLK走線盡量等長 VD2_CLK走線盡量等長 VD3_CLK走線盡量等長 27MHz TDM54 TDM108 oCCIRD_0[7:0] V V V oCCIRD_1[7:0] V V oCCIRD_2[7:0] V oCCIRD_3[7:0] V VD1[7:0] VD0[7:0] 39 C 4 J9 RCA JACK_0 1 AGND R11 C24 25 VDD_3V3 2 3V3 39 AGND R12 0.1uF 39 AGND 3 L5 BEAD + C26 C28 C29 C30 C31 C32 4 47uF/16V 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 2 J11 4 3 2 1 INA3 J10 RCA JACK_0 1 AGND R13 AGND C27 39 R15 22 DM5865 X1 3 5 4 R16 2 INB3 NC NC NC NC NC NC NC NC NC SADD0 SADD1 R17 0.1uF 39 C352.2uF 1 2 3 PHONEJACK C36 AGND 2.2uF 5 6 R20 AINN AIN1 B J14 1 AGND 2 3 PHONEJACK BEAD AGND R23 ALINO C37 2.2uF 7 C33 10pF 54 52 51 50 49 48 47 46 45 39 38 Device ID Table C0 C2 C4 C6 SP0 L/NC L H H SP1 L/NC H L H 3V3 3V3 SP0 SP1 ALINKI 122 40 ALINKI ALINKO R19 NC/4.7K Note ALINKI connect to GND if not used. SP0 NC/4.7K SP1 VDD_3V3 R21 R22 NC/4.7K NC/4.7K B J15 1 AGND 2 3 PHONEJACK IRQ AGND R26 C38 2.2uF 8 AGND AGND 1 2 3 PHONEJACK AIN3 SI2CLK SI2CD C39 2.2uF 9 R27 CLKNO1 CLKPO1 CLKNO2 CLKPO2 CLKNO3 CLKPO3 CLKNO4 CLKPO4 AIN4 4.7K J17 1 AGND 2 3 PHONEJACK AGND R28 C40 2.2uF 10 119 R24R25 1.2K1.2K 4.7K AIN5 MI2CD3 MI2CD2 MI2CD1 MI2CD0 43 42 109 108 96 95 80 79 67 66 SCL SDA VD0_CLK VD1_CLK VD2_CLK VD3_CLK 124 125 126 127 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSA VSSA HRSTZ TEST_EN 121 RESET 37 55 36 44 65 73 81 89 97 107 115 123 AOUT AGND VSSV VSSV VSSV 2 4 3 10pF 2 4.7K 24 23 16 15 2 C42 35 30 AGND 1 R29 100uF NC NC NC NC C41 AGND 33 32 31 29 1 AVSS_2 AVSS_1 4.7K 3 J18 4 83 AIN2 4.7K AGND J16 10pF X1 27MHZ R18 4.7K L6 C25 R14 C34 26 39 AGND J13 82 INB2 XO AGND ACLKR ASYNR ADATR ADATM ACLKP ASYNP ADATP 1M S-VIDEO AGND 111 112 113 114 116 117 118 0.1uF 39 J12 RCA JACK_0 1 ACLKR ASYNR ADATR ADATM ACLKP ASYNP ADATP 3 5 S-VIDEO 1 3 C AGND AGND AGND A A DAVICOM Semiconductor,Inc. Title DM5866_REF 5 4 3 2 Size A2 MAIN CHIP Document Number Date: Thursday, November 07, 2013 Rev 1.0 1 Sheet 2 of 3 5 VER 1.0 4 DATE ENGINEER 3 2 1 NOTE 07/11/2013 CONNOR HONG NEW CIRCUIT DM5865 D D C C B B A A DAVICOM Semiconductor,Inc. Title DM5865_REF 5 4 3 Size A4 HISTORY Date: Thursday, November 07, 2013 2 Document Number Rev 1.0 3 Sheet 1 of 3