APPLICATION NOTE
Plastic Package Device Thermal Resistance
Introduction
This document discusses the thermal characteristics of Macronix plastic packaged devices in order to help system
designers avoid exceeding the maximum temperature specification of a flash memory device.
Terms and definitions
[ref1]
- TJ: Die Junction Temperature (°C)
- TA: Ambient Temperature or Local Environment Temperature (°C)
- TC: Case Temperature or Top Center of Package Surface Temperature (°C)
- PD: Power Dissipation (W)
- ΘJA: Junction-to-Ambient Thermal Resistance (°C/W)
- ΘJC: Junction-to-Case Thermal Resistance (°C/W)
- ΘCA: Case-to-Ambient Thermal Resistance (°C/W)
Background
Thermal system design needs to account for heat transfer at many levels: device, board, and system level
("Figure 1. Thermal Factors at Different System Levels"). In this document we focus on device level thermal
resistance, the relationship between TJ and TC, and how heat is dispersed through the air and board.
Figure 1. Thermal Factors at Different System Levels
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APPLICATION NOTE
Plastic Package Device Thermal Resistance
Thermal Resistance and Heat Transfer
Good thermal system design is critical to ensure proper system performance, reliability, and lifetime.
As shown in "Figure 1. Thermal Factors at Different System Levels" above, PCB design (layer, pad size.) and air
flow are major factors affecting heat dissipation. At the component level, many factors can affect thermal
resistance such as package type, package material, chip size, power dissipation, etc.
"Figure 2. Forms of Heat Transfer." shows a schematic of heat dissipation paths at the device level. The primary
mechanisms for heat transfer at the component level are Convection (heat transfer from the surface of the
package to the ambient typically through air flow) and Conduction (heat transfer from the die surface
through bond wires and lead frame to PC board). Heat transfer by Radiation (electromagnetic energy transfer)
is typically negligible at the temperature range used by flash memory devices. In the plastic packages used by
Macronix for flash memory, generally 5~20% of the heat dissipated is through the top of the package via
convection while the remaining 80~95% is through the PCB via conduction. "Figure 3. a). Thermal Resistance vs
Laminar Air Flow", "Figure 3. b). Thermal Resistance vs Chip Size", and "Figure 3. c). Thermal Resistance vs PCB
Design" show the effects of various factors on thermal resistance.
Figure 2. Forms of Heat Transfer.
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APPLICATION NOTE
Plastic Package Device Thermal Resistance
Figure 3. a). Thermal Resistance vs Laminar Air Flow
Note: 14x20mm 56 TSOP package with a power dissipation of 0.36W
Figure 3. b). Thermal Resistance vs Chip Size
Note: 14x20mm 56 TSOP package with a power dissipation of 0.36W.
Figure 3. c). Thermal Resistance vs PCB Design
Note: 352ball PBGA with a power dissipation of 1.5W.
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APPLICATION NOTE
Plastic Package Device Thermal Resistance
In general, flash performance and lifetime is reduced as die junction temperature is increased ("Figure 4.
Relationship between Device Lifetime and Die Junction Temperature.").
Figure 4. Relationship between Device Lifetime and Die Junction Temperature.
Source from GEC Research
Therefore, it is best to keep die junction temperatures at the low end of datasheet limits as much as possible. The
die Junction temperature (Tj) can be calculated by adding the Self Heating of the die (due to internal power
dissipation during device operation) to the ambient temperature (Ta) surrounding the flash in the system.
Tj = Self Heating + Ta (where: Self Heating=(ΘJA * P), ΘJA = ΘJC + ΘCA, P=V * I)
After expanding the equation:
Tj = (ΘJC + ΘCA) * V * I + Ta
[eq 1]
From equation 1, we can see that in order to reduce the die junction temperature, we should try to reduce the
system ambient temperature and/or reduce the flash self-heating.
To reduce the ambient temperature and reduce the case-to-ambient thermal resistance, we can improve air flow
with additional ventilation, the addition of fans, or the introduction of other types of system cooling mechanisms,
for example, water, fins, etc. These solutions may not be practical due to increased system cost and size. We can
also move the flash memory away from other heat producing chips such as high powered controllers.
Unfortunately this may not be practical due to signal integrity issues where it is beneficial to have the flash
memory as close to the controller as possible for high speed operation.
The self-heating of flash memory die can be reduced by reducing the operating voltage and/or clock frequency.
However, this may lead to a negative impact on the system performance. Even the reduction of clock
frequency may only have a minimal effect, as both the Program and Erase functions in many flash memories
are executed with internal self-timed algorithms, independent of clock frequency.
Lastly, let’s discuss ΘJC, which is the thermal resistance of the package containing the flash.
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APPLICATION NOTE
Plastic Package Device Thermal Resistance
ΘJC Derivation
From Fourier’s Law for thermal conduction:
P = -kA(dT/dx)
Where:
dT/dx = temperature gradient (°C/m)
k = material thermal conductivity (W/m °C) P=Heat
^2
Flow (W) normal to transfer area A (m )
[ref2]
=
-kA(dT/dx)
P
ʃ dT =
ʃ (P/kA) dx
∆T
=
(L/kA) * P
∆T
=
Θ*P
Tjc
=
(ΘJC) * P (where: ΘJC is Thermal Resistance (°C/W) from junction to case)
or:
ΘJC = (TJ – TC) / PD
[eq 2]
[eq 3]
ΘJC can be calculated and used to assess ability of heat spreading out through top or bottom of package.
From a package level viewpoint:
From equation 2 above, we can see that in order to reduce the package thermal resistance (ΘJC) we can
either reduce the thickness (L) of the package material, increase the cross section area of the die (A),
or select a more thermally conductive plastic mold compound (k). Adding thermal vias, a heat slug in the package,
or even more device pins can help reduce the package thermal resistance by providing a lower thermal
resistance path from the die surface through the package. Package type, material, device size, and PCB design
all have some effect on the die junction temperature. For example, with the same level of power dissipation, the
same chip with a different package type (ex: TSOP vs. PDIP) may produce a different die junction temperature.
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APPLICATION NOTE
Plastic Package Device Thermal Resistance
Thermal Resistance Measurement and Application
"Figure 5. Diagram of Thermal Resistance Relationships (ΘJC, ΘCA, & ΘJA)." shows the relationship
between the thermal resistances, the die junction, the package case, and the surrounding ambient
temperature.
Figure 5. Diagram of Thermal Resistance Relationships (ΘJC, ΘCA, & ΘJA).
If we measure Tj and Ta with a thermal couple in a standard test environment, ΘJA can be calculated per
equation 4, where PD = Power Dissipation in test.
ΘJA = (Tj - Ta) / PD
[eq 4]
A lower ΘJA means that the heat generated by the chip while in operation is more easily removed through the top of
the package into the surrounding ambient air and through the leads to the PC board. If two different packages
have the same ΘJA, it means they have equal thermal performance in the same operating environment.
If ΘJA in a given application is known, the die junction temperature can be calculated for any ambient
temperature using the same equation.
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Plastic Package Device Thermal Resistance
Thermal Temperature Specification
Macronix flash memory device power dissipation, under normal conditions, is relatively small and therefore the
resulting die junction temperatures are typically well below junction breakdown temperatures that can cause
reliability concerns. Please refer to JEDEC standard JESD51 for the measurement methodology used to
generate the thermal temperature data in "Table-2: Die Junction to Ambient and Junction to Case Typical
Thermal Resistance (ΘJA & ΘJC)". For more accurate or special requirements, Finite Element Analysis (FEA)
should be used.
Table-1 Ambient, Die Junction, and Device Storage Maximum Temperature Range
Package
Type
Application
All
Commercial
Industrial
Automotive S Grade
Automotive R Grade
Ambient Operating Die Junction Functional
Storage
Temperature Range
Temperature Range
Temperature
( °C )
(TJ , °C )
(Ta , °C )
0 ~ 70
-40 ~ 85
-40 ~ 85
-40 ~ 105
-40
-40
-40
-40
~ 125
~ 125
~ 125
~ 125
-60
-60
-60
-60
~ 150
~ 150
~ 150
~ 150
Table-2 Die Junction to Ambient and Junction to Case Typical Thermal Resistance (ΘJA & ΘJC)
Lead/Ball
Package size
Thermal Resistance1
( ΘJA , °C /W )
Thermal Resistance1
( ΘJC , °C /W )
PDIP
8
SOP
SOP
SOP
VSOP
VSOP
USON
USON
USON
WSON
WSON
TSOP
TSOP
BGA
BGA
BGA
BGA
BGA
BGA
BGA
8
8
16
8
8
8
8
8
8
8
48
56
24
48
56
63
64
130
162
300mil
150mil
209mil
300mil
150mil
209mil
2x3mm
4x3mm
4x4mm
6x5mm
8x6mm
Type-I
Type-I
6x8mm
6x8mm
7x9mm
9x11mm
11x13mm
8x9mm
8x10.5mm
67.5
116.6
77.5
84.9
111.23
93.8
84.8
87.8
41.4
39.2
44.8
90.0
64.4
65.7
57.3
29.4
24.2
57.3
32.3
30.4
36.7
44.0
45.2
20.6
24.02
20.62
30.4
40.1
14.3
29.1
14.6
16.0
9.4
19.2
19.2
7.3
3.9
17.6
6.1
4.1
Package type
*Note-1: Thermal Resistance values provided in "Table-2 Die Junction to Ambient and Junction to Case Typical Thermal
Resistance (ΘJA & ΘJC)" are typical values obtained while device operates within datasheet voltage/current power limits in
still air (air flow = 0m/sec). Implementing a heat dissipating design (ex: additional air flow / heat sink / PCB layers, etc.) is
recommend in high temperature applications.
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APPLICATION NOTE
Plastic Package Device Thermal Resistance
Example Die Junction and Case Temperature Calculation
In this example we will calculate the maximum die junction temperature and case temperature seen by an
MX25L8006EM1I-12G, which is an Industrial grade, 3V, Macronix Serial NOR Flash memory in a 150mil
8SOP package.
The MX25L8006EM1I-12G has the following thermal resistances: ΘJA
= 116.6°C/W and ΘJC = 44°C/W
The thermal resistance numbers in our example are for our example calculation purposes only. Please
contact your Macronix Sales if thermal resistance numbers are needed for the Macronix package and die
density you are using because the thermal resistance values may be different.
According to the MX25L8006EM1I-12G datasheet:
Max Power Dissipation (PD) = V * I = 3.6V * 20mA = 72mW Max
Ambient Temperature (Ta) = 85°C
Tj = Ta + (PD * ΘJA) = 85°C + (72mW * 116.6°C/W) = 85°C + 8.4°C = 93.4 °C
Tc = Tj - (PD * ΘJC) = 93.4°C - (72mW * 44°C/W) = 93.4°C - 3.2°C = 90. 2°C
References
[1] JESD88E ”JEDEC Dictionary of Terms for Solid-State Technology — 6th Edition” June 2013
[2] R. R. Tummala and E.J. Rymaszewski. Microelectronics Packaging Handbook” Copyright 1989 Van
Norstrand Reinholdt. p171.
EIAJ/JEDEC EIA/JESD51-1: INTEGRATED CIRCUIT THERMAL MEASUREMENT METHOD-ELECTRICAL
TEST METHOD (SINGLE SEMICONDUCTOR DEVICE)
EIAJ/JEDEC EIA/JESD51-2: INTEGRATED CIRCUIT THERMAL TEST METHOD ENVIROMENTAL
CONDITIONS-NATURAL CONVENCTION (STILL AIR)
SEMI G42-96: SPECIFICATION FOR THERMAL TEST BOARD STANDARIZATION FOR MEASURING
JUNCTION-TO-AMBIENT THERMAL RESISTANCE OF SEMICONDUCTOR PACKAGES
SEMI G38-96: TEST METHOD FOR STILL- AND FORCE-AIR JUNCTION-TO-AMBIENT THERMAL
RESISTANCE MEASUREMENTS OF INTEGRATED CIRCUIT PACKAGES.
Revision History
Revision No. Date
Description
REV. 1
Nov. 2013
Initial Release.
REV. 2
May 2014
Allocate "Table-1 Ambient, Die Junction, and Device Storage Maximum Temperature
Range" to page-7. Add "Table-2 Die Junction to Ambient and Junction to Case
Typical Thermal Resistance (ΘJA & ΘJC)" with thermal resistance number.
REV. 3
Jun. 2014
Add the 48-BGA data.
REV. 4
Jul. 2015
Modified “Example Die Junction and Case Temperature Calculation”
Add the 8-USON (4x3mm), 8-VSOP (150mil & 209mil), 130-BGA and 162-BGA data.
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APPLICATION NOTE
Plastic Package Device Thermal Resistance
Except for customized products which have been expressly identified in the applicable agreement, Macronix's
products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or
household applica- tions only, and not for use in any applications which may, directly or indirectly, cause death,
personal injury, or severe property damages. In the event Macronix products are used in contradicted to their
target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its
actual use in accordance with the applicable laws and regulations; and Macronix as well as it’s suppliers and/or
distributors shall be released from any and all liabil- ity arisen therefrom.
Copyright© Macronix International Co., Ltd. 2015. All rights reserved, including the trademarks and tradename
thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, NBit, Nbit, NBiit,
Macronix NBit, eLiteFlash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo, BE-SONOS, KSMC,
Kingtech, MXSMIO, Macronix vEE, Macronix MAP, Rich Audio, Rich Book, Rich TV, and FitCAM. The names and brands of third party
referred thereto (if any) are for identification purposes only.
For the contact and order information, please visit Macronix’s Web site at: http://www.macronix.com
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