EL4583, EL4584, EL4585 Demo Board ® Technical Brief Video Sync Separator, Horiz Genlock EL4583 and EL4584 The EL4583, EL4584, EL4585 demo board is designed to demonstrate the operations of Intersil’s family of sync separators and horizontal genlocks. The board as assembled is designed to accept NTSC standard video through A4, Video In. The EL4583 separates H-sync and sends it through jumper R10 to the EL4584. H-sync can be monitored at A1, H-sync. On the board settings, the internal divider mode is selected and the divider N is set to 910. The EL4584 uses its internal divider to extract a clock pulse of the same H-sync input frequency from the oscillator and adjusts the on-board LC VCO to phase lock this signal to the input horizontal frequency. This divided clock signal can be monitored at A2, EXT DIV. The full clock frequency (which should equal to H-sync (15.734kHz)*divider (910) = 14.318MHz) is available at A3, CLK OUT. Each board has been tested with a NTSC signal and C17 adjusted so EXT DIV locks to the H-sync. SW1 has 3 positions. LEFT grounds COAST and puts the EL4584 into normal mode (see data sheet for mode descriptions). CENTER floats COAST and is fast lock mode, and RIGHT pulls COAST to VDD and is coast mode. The signal should lock in normal mode. The DIP switches at the top of the board works as follows: from right to left, the 1 February 24, 2004 TB430 switches should be labeled 1, 2, 3, 4. Dip-SW4 controls pin B, SW3 controls C, SW2 controls A, and SW1 controls DIV SEL pin 7 on the EL4584. Refer to the data sheet for a table of divisors for each switch setting and the operation of DIV SEL. If using a NTSC signal, setting all switches ON will produce a CLK OUT frequency of 14.318MHz, and an EXT DIV frequency of 15.734kHz, and the EL4584 will lock. To convert the oscillator to work with the standard PAL frequency of 17.734MHz, simply substitute an inductor of about 8.2µH to bring the center frequency up closer to PAL frequency of 17.734MHz, and reset the dip switches to A = 0, B = 1, C = 1. Remember that LC VCOs have a wide pull range so they are very tolerant of component variations. In some cases the 10µH inductor may be able to produce the necessary PAL frequency as well as the NTSC frequency. Crystal VCXOs and 4-pin VCXO hybrids can also be used. See the accompanying schematics and data sheet for more info. EL4585 An EL4585 can be used in place of the EL4584 provided. With R1 changed to 3.3µH and the same settings as in the EL4584 section, The signal frequency at CLK OUT is 28.636MHz. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners. Technical Brief 430 EL4583, EL4584, EL4585 Schematic 4 3 2 1 VDD 5 6 7 8 SW2 PROGRAM R8 10K U2 R5 1 10K R7 2 10K C17 3 L1/R2 OPEN Y1 5pF-30pF VDD Note: Values for L1 For EL4584, L1=10uH, Fosc = 14.318MHz. For EL4585, L1=3.3uH, Fosc = 28.636MHz 10uH C10 PROG A C HSYNC OSC OUT DIG GND ANALOG VDC EXT DET 16 R9 10K A3 CLK-OUT 15 14 4 A2 EXT-DIV 13 0.1uF OSC IN LOCK DET 12 TP7 8 VDD GNDOUT 14 VcomVCC C6 B VDD 5 220pF EL4584CS/EL4585CS Y2 VCXO 6 ANALOG GND DG VDD C12 11 A1 0.1uF OPEN 7 CHARGE PUMP HSYNC IN H-SYNC 10 7 1 VDD 8 SMV1212-001 R4 R12 13K 1 FLT CUT OFF ANALOG GND 100K DV SEL COAST 9 SW1 2 R10 0 1 3 C5 0.01uF V1 R1 30K C1 0.001uF 16 R13 82K C7 A4 VIDEO IN R3 R6 75 0 0.1uF 2 LEV DET HSYNC 15 VDD 3 TP1 CSYNC C8 4 0.1uF C2 5 OPENTP2 VSYNC 6 CSYNC U1 EL4583CS FLTER IN VDD ODD/EVEN 13 7 GND C11 0.1uF 8 2 TP3 0.1uF ODD/EVEN VSYNC GND RSET BP CLAMP 12 11 TP6 BP CLAMP VDD VDD C14 14 FILTER OUT NO SIGNAL VIDEO IN LEVEL OUT 10 9 R15 680K C9 0.1uF Error : intersil.bmp file not found. Title TP5 NO SIGNAL TP4 LEVEL OUT Size: EL1881/4581/3/4/5 DEMO BOARD Revision: A Date: 12/17/03 File: EL4583 4 Sch 1 Sheet Drawn By: of 1 B Technical Brief 430 The VCO and loop filter section of the EL4583/4/5 demo board can be implemented in the following configurations: (1) VCXO VSUPPLY CONTROL Charge Pump Output R4 C5 C1 GND R1 1 14 7 8 IN PIN 5 (2) XTAL TO OSC IN PIN 5 OUT PIN 3 R2 Y1 Charge Pump Output C6 R4 PIN 7 C17 R1 C5 C1 V1 IN PIN 5 (3) LC Tank OUT PIN 3 L1 C6 220pF Charge Pump Output 10µH R4 PIN 7 C5 0.01µF R1 30K C17 100K C1 0.001µF 5.5 - 30pF V1 SMV1212-001 Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 3