Standard ICs 8-bit serial in, parallel out driver IC BU2050F The BU2050F is a driver IC that is comprised of an 8-bit shift register and a latch (serial in / parallel out). The data read into the shift register can be asynchronously latched. The CMOS outputs can provide 25mA (Max.) of current per output, making this IC ideal for a wide range of applications including driving LEDS. Applications •Printers, mini-component stereo systems, car audio systems, and musical instruments •1)Features Regardless of the clock and data input, the CLR pin 3) Input pin hysteresis: 0.5V (Typ.). resets the latch circuit, and sets all outputs to the low level. 2) Output drive capacity: 25mA / output (Max.). •Block diagram VDD P2 P1 CLR STB CLK DATA 14 13 12 11 10 9 8 CTRL SHIFT REGISTER LATCH OUTPUT Driver 1 2 3 4 5 6 7 P3 P4 P5 VSS P6 P7 P8 1 Standard ICs BU2050F •Pin descriptions Function Pin No. Pin name 1 P3 Parallel data output 2 P4 Parallel data output 3 P5 Parallel data output 4 VSS GND 5 P6 Parallel data output 6 P7 Parallel data output 7 P8 Parallel data output 8 DATA 9 CLK Clock signal input 10 STB Strobe signal input When STB is low, the contents of the shift register are output. When STB is high, the contents of the latch circuit and output do not change. 11 CLR Reset signal input When CLR is low, the latch circuit is reset, and all outputs (P1 to P8) are set to low. Normally, CLR is high. 12 P1 Parallel data output 13 P2 Parallel data output 14 VDD Power supply voltage Serial data input •Absolute maximum ratings (Ta = 25°C) Parameter Symbol Limits Unit Power supply voltage VDD – 0.3 ~ + 7.0 V Input voltage ISINK VSS – 0.3 ~ VDD + 0.5 mA output voltage Vo VSS – 0.3 ~ VDD + 0.5 V Power dissipation∗1 Pd 450 mW Operating temperature Topr – 25 ~ + 85 °C Storage temperature Tstg – 55 ~ + 125 °C Note: These voltage value ranges are the destruction limits for the IC. They are not the guaranteed operating ranges for the IC. ∗1 Reduced by 4.5mW for each increase in Ta of 1°C over 25°C. / output circuits •(1)Input DATA, CLK, STB, CLR 2 (2) P1 ~ P8 Standard ICs BU2050F •Electrical characteristics (unless otherwise noted, V Parameter Symbol Min. Typ. = 4.5V ~ 5.5V, Ta = 25°C) DD Max. Unit Conditions Power supply current IDD — — 0.1 mA Input high level voltage VIH 0.7VDD — VDD V — Input low level voltage VIL VSS — 0.3VDD V — Input leak current ILI Output high level voltage Output low level voltage VOHD VOLD – 10 — 10 µA V1 = 0 ~ VDD VDD – 1.5 — VDD V IOH = – 25mA VDD – 1.0 — VDD V IOH = – 15mA VDD – 0.5 — VDD V IOH = – 10mA VSS — 1.5 V IOL = + 25mA VSS — 0.8 V IOL = + 15mA VSS — 0.4 V IOL = + 10mA •Switching characteristics (unless otherwise noted, V Parameter VIH = VDD, VIL = VSS DD = 4.5V ~ 5.5V, Ta = 25°C) Symbol Min. Typ. Max. Unit Conditions Setup time (DATA-CLK) tSD 20 — — ns — Hold time (DATA-CLK) tHD 20 — — ns — Setup time (STB-CLK) tSSTB 30 — — ns — Hold time (STB-CLK) tHSTB 30 — — ns — Transmission delay time (CLK-P1 ~ P8) tPDPCK — — 100 ns — Transmission delay time (STB-P1 ~ P8) tPDPSTB — — 80 ns — Transmission delay time (CLR-P1 ~ P8) tPDPCLR — — 80 ns — Max. operating frequency fMAX 5 — — MHz — 3 Standard ICs BU2050F •Switching characteristics f MAX CLK 1 2 8 9 10 11 t SD DATA t HD STB t HSTB t SSTB CLR P8 t PDPST t PDPCR P1 t PDPCK 4 12 Standard ICs BU2050F •Timing chart CLK CLR STB DATA P1 P2 P3 P4 P5 P6 P7 P8 operation •ThisCircuit IC is made up of an 8-bit shift register, a latch, and an output driver. The four input pins (data (DATA), strobe (STB), latch reset (CLR), and ckock (CLK)) are all hysteresis inputs (0.5V Typ.). The reset function applies to all bits in the latch circuit. When CLR is low, the latch circuit is reset asynchronously, regardless of the other inputs, and all outputs are set to low. The CLR pin is normally high. The serial data input to the data pin is synchronously read into the shift register on the rising edge of the clock. When STB is low (CLR is high), the data in the shift register is transferred to the latch circuit, and output on the parallel data output pins (P1 ~ P8). When STB is high, the latch circuit and output data does not change. 5 Standard ICs BU2050F •Electrical characteristic curves 400 300 200 100 0 0 25 50 75 100 125 150 25 20 15 10 5 0 4.2 AMBIENT TEMPERATURE: Ta (°C) Fig. 1 Thermal derating characteristics OUTPUT CURRENT “LOW” LEVEL: IOL (mA) 500 30 OUTPUT CURRENT “HIGH” LEVEL: IOH (mA) POWER DISSIPATION: Pd (mw) 600 4.3 1.27 0.15 ± 0.1 6.2 ± 0.3 7 4.4 ± 0.2 0.11 1.5 ± 0.1 1 0.4 ± 0.1 0.3Min. 0.15 SOP14 6 4.6 4.7 4.8 4.9 Fig. 2 Output high level current vs. output high level voltage 8.7 ± 0.2 8 4.5 5 OUTPUT VOLTAGE “HIGH” LEVEL: VOH (V) •External dimensions (Units: mm) 14 4.4 30 25 20 15 VDD = 5V 10 5 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 OUTPUT VOLTAGE “LOW” LEVEL: VOL (V) Fig. 3 Output low level current vs. output low level voltage