Data Sheet

ESW5210/5211
27MHz FSK Receiver
Product
Specification
DOC. VERSION 1.0
ELAN MICROELECTRONICS CORP.
June 2008
Trademark Acknowledgments:
IBM is a registered trademark and PS/2 is a trademark of IBM.
Windows is a trademark of Microsoft Corporation.
ELAN and ELAN logo
are trademarks of ELAN Microelectronics Corporation.
Copyright © 2008 by ELAN Microelectronics Corporation
All Rights Reserved
Printed in Taiwan
The contents of this specification are subject to change without further notice. ELAN Microelectronics
assumes no responsibility concerning the accuracy, adequacy, or completeness of this specification. ELAN
Microelectronics makes no commitment to update, or to keep current the information and material contained in
this specification. Such information and material may change to conform to each confirmed order.
In no event shall ELAN Microelectronics be made responsible for any claims attributed to errors, omissions, or
other inaccuracies in the information or material contained in this specification. ELAN Microelectronics shall
not be liable for direct, indirect, special incidental, or consequential damages arising from the use of such
information or material.
The software (if any) described in this specification is furnished under a license or nondisclosure agreement, and
may be used or copied only in accordance with the terms of such agreement.
ELAN Microelectronics products are not intended for use in life support appliances, devices, or systems. Use
of ELAN Microelectronics product in such applications is not supported and is prohibited.
NO PART OF THIS SPECIFICATION MAY BE REPRODUCED OR TRANSMITTED IN ANY FORM OR BY
ANY MEANS WITHOUT THE EXPRESSED WRITTEN PERMISSION OF ELAN MICROELECTRONICS.
ELAN
MICROELECTRONICS
CORPORATION
Headquarters:
Hong Kong:
USA:
No. 12, Innovation Road 1
Hsinchu Science Park
Hsinchu, TAIWAN 308
Tel: +886 3 563-9977
Fax: +886 3 563-9966
http://www.emc.com.tw
Elan (HK) Microelectronics
Corporation, Ltd.
Flat A, 19F., World Tech Centre
95 How Ming Street, Kwun Tong
Kowloon, HONG KONG
Tel: +852 2723-3376
Fax: +852 2723-7780
Elan Information
Technology Group (U.S.A.)
Shenzhen:
Shanghai:
Elan Microelectronics
Shenzhen, Ltd.
Elan Microelectronics
Shanghai, Ltd.
3F, SSMEC Bldg., Gaoxin S. Ave. I
Shenzhen Hi-tech Industrial Park
(South Area), Shenzhen
CHINA 518057
Tel: +86 755 2601-0565
Fax: +86 755 2601-0500
elan-sz@elanic.com.cn
#23, Zone 115, Lane 572, Bibo Rd.
Zhangjiang Hi-Tech Park
Shanghai, CHINA 201203
Tel: +86 21 5080-3866
Fax: +86 21 5080-4600
elan-sh@elanic.com.cn
P.O. Box 601
Cupertino, CA 95015
U.S.A.
Tel: +1 408 366-8225
Fax: +1 408 366-8225
Contents
Contents
2 Feature Description............................................................................................ 1
3 Application.......................................................................................................... 1
4 Block Diagram .................................................................................................... 1
5 Pin Configuration ............................................................................................... 2
5.1
5.2
Pin Assignment....................................................................................................................... 2
Pin Descriptions ..................................................................................................................... 2
6 Function Description.......................................................................................... 3
6.1
6.2
6.3
6.4
Mixer and Limiter.................................................................................................................... 3
VCO........................................................................................................................................ 3
PLL ......................................................................................................................................... 3
Channel Selections ................................................................................................................ 4
6.4.1 ESW5210 ................................................................................................................... 4
6.4.2 ESW5211.................................................................................................................... 4
6.4.3 Channel Clock Timing ................................................................................................ 5
7 Absolute Operation Maximum Ratings............................................................. 5
8 DC/AC Electrical Characteristic ........................................................................ 6
9 Application Circuit.............................................................................................. 7
9.1
9.1
ESW5210 ............................................................................................................................... 7
ESW5211 ............................................................................................................................... 8
10 Components List ................................................................................................ 9
11 Packaging Reference ....................................................................................... 10
12 Receiver Demo Board Introduction ................................................................ 11
12.1
12.2
Top View ...............................................................................................................................11
Bottom View ........................................................................................................................ 12
Product Specification (V1.0) 06.05.2008
• iii
Contents
Specification Revision History
Version
1.0
iv •
Revision Description
Initial Release Edition
Date
2000/06/05
Product Specification (V1.0) 06.05.2008
ESW5210/5211
27MHz FSK Receiver
1
Introduction
The ESW5210/5211 single-chip solution is an integrated circuit intended for use as a
low cost FSK receiver to establish a frequency-agile RF link.
The device is designed
to provide a 10-channel receiver and intended for digital (FSK) modulated applications
in the wireless Mouse and Keyboard.
The chip operates at 2.7V minimum and is
expressly designed for low power consumption.
It offers synthesizer with a typical
channel spacing of approximately 30KHz to allow narrow-band applications.
2
3
4
Feature Description
„
On-Chip Phase-Locked Loop (PLL)
„
Include oscillation circuit with external X-TAL (4.0MHz).
„
Standby mode for power saving.
„
2.7 to 5.5V power supply range
Application
„
Wireless Mouse
„
Wireless Keyboard
„
Wireless Communication Products
Block Diagram
MIX_IN
MIX_O
LIM_I
DEC1
DEC2
LIM_O
DEM_I
DEM_O
FIL_P PIL_N
MIXER
FIL_0
Demodulator
IF & Limiting AMP
Prescaler
&
N counter
VCO
Phase
Detector
PFSET
R Counter
Control Logic
ROM Code
V Reference
Bandgap
ENB
Oscillator
VCO1
VCO2
CPO
XTAL
D3
D2
D1
D0
CHCLK
VDD
GND VDD
Figure 4-1 ESW5210/5211 Block Diagram
Product Specification (V1.0) 06.05.2008
(This specification is subject to change without further notice)
• 1
ESW5210/5211
27MHz FSK Receiver
5
Pin Configuration
5.1 Pin Assignment
CHCLK
D3
D2
ENB
ENB
D1
VCO1
VCO1
D0
VCO2
VDD
VCO2
VDD
MIX_I
XTAL
MIX_I
XTAL
MIX_O
VDD
MIX_O
VDD
GND
CPO
CPO
GND
LIM_I
FIL_P
LIM_I
FIL_P
DEC1
GND
DEC1
GND
DEC2
FIL_O
DEC2
FIL_O
LIM_O
FIL_N
LIM_O
FIL_N
DEM_I
DEM_O
DEM_I
DEM_O
Figure 5-1
ESW5210/5211 SOP-24L (300mil) Package
5.2 Pin Descriptions
Pin No
Pin Name
Description
ESW5210
ESW5211
19, 21
19, 21
VDD
Positive power. A 0.1μF de-coupling capacitor should be
connected as close as possible from this pin to ground
7,16
2
7,16
2
GND
ENB
This pin should be a low inductance, direct connection to ground.
Active Low, enable input
20
5
20
5
XTAL
MIX_I
Crystal (4MHz) Connection Input
RF signal input for mixer
6
8
6
8
MIX_O
LIM_I
Mixer signal output
Inter Frequency Amplifier input
11
12
11
12
LIM_O
DEM_I
Limiting amplifier output
Demodulator input
13
14
13
14
DEM_O
FIL_N
Demodulator output
Filter amplifier negative input
15
17
15
17
FIL_O
FIL_P
Filter amplifier output
Filter amplifier positive input
9
10
9
10
DEC1
DEC2
IF decoupling. External 0.1µFcapacitor connected to ground
IF decoupling. External 0.1µFcapacitor connected to ground
3
4
3
4
VCO1
VCO2
For external LC tank
For external LC tank
18
1
18
–
CPO
CHCLK
–
Reserved
1
22
D3
D0
The channel selected pin
The channel selected pin
Reserved
Reserved
23
24
D1
D2
The channel selected pin
The channel selected pin.
2 •
Phase detector output, connected to external low pass filter
Clock input for channel selection
Product Specification (V1.0) 06.05.2008
(This specification is subject to change without further notice)
ESW5210/5211
27MHz FSK Receiver
6
Function Description
The ESW5210/5211 single-chip solution is a CMOS technology integrated circuit
intended for low cost FSK receiver application and to establish a frequency-agile RF
link. The device is capable of providing 10-channel receiver.
6.1 Mixer and Limiter
The mixer-oscillator (VCO) combination converts the input frequency (e.g., 27MHz)
down to 455KHz, where, after external bandpass filtering, most of the amplification is
done.
The audio is recovered using a conventional quadrature FM detector.
After
suitable bandpass filtering (ceramic or LC), the signal goes to the input of limiter
amplifier at Pin 8. The output of the limiter at Pin 11 drives a multiplier to detect the
FM.
This is accomplished both internally (direct access), and externally through a
quadrature coil or discriminator. The other side of the limiter stages is decoupled at
Pins 9 and 10.
The limiter IF amplifier typically has about 75dB of gain.
Decoupling
capacitors should be placed close to the decoupling Pins 9 and 10 to ensure low noise
and stable operation.
A simple inverter OP amp is provided with an output at Pin 15 providing DC bias to be
input at Pin 14, and positive input at Pin 17 for reference voltage set.
The filter can
be made with external impedance elements to discriminate between frequencies.
6.2 VCO
The circuit employed an LC-tank structure to achieve low-phase noise characteristic
where “L” is an off-chip high-Q inductor, and “C” is provided by a varactor with different
tuning ranges.
6.3 PLL
The PLL includes 64/65 prescaler, charge pump, PFD, N-A swallow counters, and
R-counter for the multi-channel applications.
The channels are selected for
ESW5211 via mechanical switches of parallel BCD input.
For ESW5210, the
channels can be easily set by an input pin CHCLK which directly selects the ROM
table addresses.
Product Specification (V1.0) 06.05.2008
(This specification is subject to change without further notice)
• 3
ESW5210/5211
27MHz FSK Receiver
6.4 Channel Selections
6.4.1 ESW5210
The channel is set by rising edge of clock at Pin 1 (CHCLK) of MCU.
The initial or
default channel at power on (internal power on reset) is set at Channel 10.
6.4.2 ESW5211
The input provides BCD code for selecting one of ten channels to be locked in both
transmit and receive loop. When address data other than 1 – 10 are input, the
decoding logic defaults to channel 10.
shown in the table below.
The frequency assignments with D0 – D3 are
The D0 – D3 inputs have internal pull up devices.
„ VCO Frequency and Divider Ratio
Oscillator Frequency 4.0MHz, Ref. Divider 800
VCO
Frequency
RXO
Frequency
Rx Divider
(5.0KHz Ref)
D3
D2
D1
D0
1
26.530 MHz
26.985MHz
5306
0
0
0
1
2
26.560 MHz
27.015 MHz
5312
0
0
1
0
3
26.590 MHz
27.045 MHz
5318
0
0
1
1
4
26.620 MHz
27.075MHz
5324
0
1
0
0
5
26.650 MHz
27.105 MHz
5330
0
1
0
1
6
26.680 MHz
27.135 MHz
5336
0
1
1
0
7
26.710 MHz
27.165 MHz
5342
0
1
1
1
8
26.740 MHz
27.195 MHz
5348
1
0
0
0
9
26.770 MHz
27.225MHz
5354
1
0
0
1
10
26.800 MHz
27.255MHz
5360
1
0
1
0
-
26.800 MHz
27.255MHz
5360
1
0
1
1
-
26.800 MHz
27.255MHz
5360
1
1
0
0
-
26.800 MHz
27.255MHz
5360
1
1
0
1
-
26.800 MHz
27.255MHz
5360
1
1
1
0
NOTE:
4 •
Input
Channel
1: open;
0: ground
Product Specification (V1.0) 06.05.2008
(This specification is subject to change without further notice)
ESW5210/5211
27MHz FSK Receiver
6.4.3 Channel Clock Timing
„ Timing Diagram
Channel DATA by FDIVIDER Clock
Figure 6-1
ESW5210/ ESW5211 Timing Diagram
„ Channel Clock Timing
The channel clock tolerance of the CHCLK signal should be within ± 150µS.
Channel
CHCLK
Channel
CHCLK
1
600µS
6
3.6mS
2
1.2mS
7
4.2mS
3
1.8mS
8
4.8mS
4
2.4mS
9
5.4mS
5
3.0mS
10
6.0mS
NOTE
„ Only Channel 10 applies to ESW5210
„ Channels 1 ~ 10 applies to ESW5211
7
Absolute Operation Maximum Ratings
Rating
Symbol
Value
Unit
DC Supply Voltage
VDD
– 0 .3 to 6
V
Input Voltage
Vin
– 0 .5 to VDD+0.5
V
Operating Temperature Range
Ta
0 to 70
°C
Product Specification (V1.0) 06.05.2008
(This specification is subject to change without further notice)
• 5
ESW5210/5211
27MHz FSK Receiver
8
DC/AC Electrical Characteristic
(VDD=3.0V VSS=0V)
Parameter
Min.
Typical
Max.
Unit
5.5
V
10
mA
µA
Overall
Operating Voltage
2.7
Current Consumption:
Operating Mode
Power Down Mode
6
Mixer
Mixer input signal frequency
27
Mixer input impedance
Conversion gain
Noise figure
IIP3
Lo Leakage to Mixer input
MHz
2.65K-j5.7K
28
dB
14.8
dB
– 28
dBm
-40
dBm
IF Section
Limiter Amp Voltage Gain
75
S/N Ratio @60dBµV
Sensitivity @12dB SINAD
dB
40
dB
-90
dBm
Filter Amplifier
Voltage Gain
80
dB
PLL Operating Frequency
27
MHz
OSC Operating Frequency
4
MHz
– 90
– 110
dBc/Hz
PLL Section
VCO phase noise:
100KHz offset
1MHz offset
VCO Sensitivity
0.8
MHz/V
Output rise time
200
ns
Output fall time
200
ns
Input rise time
10
µs
Input fall time
10
µs
CHCLK
BCD Input
Pull up resistance
6 •
300
KΩ
Product Specification (V1.0) 06.05.2008
(This specification is subject to change without further notice)
ESW5210/5211
27MHz FSK Receiver
9
Application Circuit
9.1 ESW5210
*
ENB
C5
L2/C12
FO=30.6MHz
C12
D1
L2
C8
C10
L3
27MHz
RFIN
C17
C18
VDD
CHCLK
VC
C11
1
24
2
23
3
22
4
21
5
20
6
19
ESW5210
ESW5210
7
CF1
C7
C6
C4
R6
C9
Y1
17
9
16
10
15
11
14
12
13
RG
R5
CP
DATA O/P
R3
VDD
C1
455K LC Tank or Discriminator
YIC CDBM455C28
R7
RP
R4
L1
DC5V
R8
18
8
C16
R2
C14
C15
C3
R1
C2
* ENB: “Low” for Operating Mode / “High” for Idle Mode
Figure 9-1
ESW5210 Application Circuit
Product Specification (V1.0) 06.05.2008
(This specification is subject to change without further notice)
• 7
ESW5210/5211
27MHz FSK Receiver
9.1 ESW5211
ENB
C5
L2/C12
FO=30.6MHz
C12
D1
L2
CH6
VC
C8
C10
L3
27MHz
RFIN
C17
C18
*
C11
1
24
2
23
3
22
4
21
5
20
6
19
ESW5211
ESW5211
7
CF1
C7
C6
C4
R6
C16
Y1
17
9
16
10
15
11
14
12
13
R5
CP
DATA O/P
C1
455K LC Tank or Discriminator
YIC CDBM455C28
R7
RG
R3
VDD
DC5V
RP
R4
L1
VDD
R8
18
8
C9
R2
C14
C15
C3
R1
C2
* ENB: “Low” for Operating Mode / “High” for Idle Mode
Figure 9-2
8 •
ESW5211 Application Circuit
Product Specification (V1.0) 06.05.2008
(This specification is subject to change without further notice)
ESW5210/5211
27MHz FSK Receiver
10 Components List
Item
Part Type
Designators
Manufacturer
Remarks
1
C.F Resistor 2K2Ω
R8.
Walsin or equalvalent
2
C.F Resistor 100Ω
R1.
Walsin or equalvalent
3
C.F Resistor 22KΩ
R7.
Walsin or equalvalent
4
C.F Resistor39KΩ
R3.
Walsin or equalvalent
5
C.F Resistor 47KΩ
R5.
Walsin or equalvalent
6
C.F Resistor 100KΩ
R6, R9, R10.
Walsin or equalvalent
7
C.F Resis tor 10MΩ
R2.
Walsin or equalvalent
8
Ceramic Capacitor 30P NPO
C10.
Walsin or equalvalent
9
Ceramic Capacitor 33P NPO
C11.
Walsin or equalvalent
10
Ceramic Capacitor 150P NPO
C5.
Walsin or equalvalent
11
Ceramic Capacitor 220P NPO
C18.
Walsin or equalvalent
12
Ceramic Capacitor 1n X7R
C17.
Walsin or equalvalent
13
Ceramic Capacitor 820P X7R
C1.
Walsin or equalvalent
14
Ceramic Capacitor 10n X7R
C2.
Walsin or equalvalent
15
Ceramic Capacitor 4n7 X7R
C14.
Walsin or equalvalent
16
Ceramic Capacitor 100n X7R
C6,C7, C8, C9. Walsin or equalvalent
17
Ceramic Capacitor 100n X7R
C15.
Walsin or equalvalent
18
Electrolytic Capacitor 100u 6.3V
C16.
Walsin or equalvalent
19
Varactor 1SV270
D1.
Toshiba
1SV229
20
Variable Inductor 820nH
L2.
Sumida or equalvalent
With 33P
21
Inductor 1uH-JWI
L3
Jantek or equalvalent
Q>30
22
Crystal 4M30P1 49US
Y1.
YIC or equalvalent
23
Dip Switch 4P
SW1.
24
Ceramic Filter 455KHz
CF1
YIC or Murata
LT455DW
BW±15KHz
25
Discriminator 455KHz
L1.
YIC
CDBM455C28
26
C.F Resistor 5K1Ω
R4.
L2 with YIC-C28
27
Ceramic Capacitor 50P NPO
C4.
L2 with YIC-C28
28
ESW5210/211
U1
29
Variable Capacitor 20P
VC
Product Specification (V1.0) 06.05.2008
(This specification is subject to change without further notice)
For ESW5211
Elan
• 9
ESW5210/5211
27MHz FSK Receiver
11 Packaging Reference
„
Dimension: mm
Figure 11-1
10 •
ESW5210/5211 SOP Packaging Dimensions
Product Specification (V1.0) 06.05.2008
(This specification is subject to change without further notice)
ESW5210/5211
27MHz FSK Receiver
12 Receiver Demo Board Introduction
12.1 Top View
6-Pin Connector
Channel Select (D0~D3):
Up: Ground (0)
Down: Open (1)
CPO (TPV)
Variable Capacitor (VC)
Crystal
Antenna 50Ω
Antenna 75Ω
Figure 12-1
ESW5210/5211 RX Board (Top View)
NOTE
1.
CPO: When Channel-10 is selected, adjust VC until the TPV is at 2 Voltage.
2.
ENB: Should be Active Low in order to enable input.
Product Specification (V1.0) 06.05.2008
(This specification is subject to change without further notice)
• 11
ESW5210/5211
27MHz FSK Receiver
12.2
Bottom View
30mm
ESW5210/5211 Chip
33mm
Figure 12-2
12 •
ESW5210/5211 RX Board (Bottom View)
Product Specification (V1.0) 06.05.2008
(This specification is subject to change without further notice)